1 | /*****************************************************************************\ |
2 | Snes9x - Portable Super Nintendo Entertainment System (TM) emulator. |
3 | This file is licensed under the Snes9x License. |
4 | For further information, consult the LICENSE file in the root directory. |
5 | \*****************************************************************************/ |
6 | |
7 | /***** |
8 | * SPC7110 emulator - version 0.03 (2008-08-10) |
9 | * Copyright (c) 2008, byuu and neviksti |
10 | * |
11 | * Permission to use, copy, modify, and/or distribute this software for any |
12 | * purpose with or without fee is hereby granted, provided that the above |
13 | * copyright notice and this permission notice appear in all copies. |
14 | * |
15 | * The software is provided "as is" and the author disclaims all warranties |
16 | * with regard to this software including all implied warranties of |
17 | * merchantibility and fitness, in no event shall the author be liable for |
18 | * any special, direct, indirect, or consequential damages or any damages |
19 | * whatsoever resulting from loss of use, data or profits, whether in an |
20 | * action of contract, negligence or other tortious action, arising out of |
21 | * or in connection with the use or performance of this software. |
22 | *****/ |
23 | |
24 | |
25 | #include <limits> |
26 | |
27 | #include "snes9x.h" |
28 | #include "memmap.h" |
29 | #include "srtc.h" |
30 | #include "display.h" |
31 | |
32 | #define memory_cartrom_size() Memory.CalculatedSize |
33 | #define memory_cartrom_read(a) Memory.ROM[(a)] |
34 | #define memory_cartrtc_read(a) RTCData.reg[(a)] |
35 | #define memory_cartrtc_write(a, b) { RTCData.reg[(a)] = (b); } |
36 | #define cartridge_info_spc7110rtc Settings.SPC7110RTC |
37 | #define cpu_regs_mdr OpenBus |
38 | |
39 | #include "spc7110emu.h" |
40 | #include "spc7110emu.cpp" |
41 | |
42 | SPC7110 s7emu; |
43 | |
44 | static void SetSPC7110SRAMMap (uint8); |
45 | |
46 | |
47 | void S9xInitSPC7110 (void) |
48 | { |
49 | s7emu.power(); |
50 | memset(RTCData.reg, 0, 20); |
51 | } |
52 | |
53 | void S9xResetSPC7110 (void) |
54 | { |
55 | s7emu.reset(); |
56 | } |
57 | |
58 | static void SetSPC7110SRAMMap (uint8 newstate) |
59 | { |
60 | if (newstate & 0x80) |
61 | { |
62 | Memory.Map[0x006] = (uint8 *) Memory.MAP_HIROM_SRAM; |
63 | Memory.Map[0x007] = (uint8 *) Memory.MAP_HIROM_SRAM; |
64 | Memory.Map[0x306] = (uint8 *) Memory.MAP_HIROM_SRAM; |
65 | Memory.Map[0x307] = (uint8 *) Memory.MAP_HIROM_SRAM; |
66 | } |
67 | else |
68 | { |
69 | Memory.Map[0x006] = (uint8 *) Memory.MAP_RONLY_SRAM; |
70 | Memory.Map[0x007] = (uint8 *) Memory.MAP_RONLY_SRAM; |
71 | Memory.Map[0x306] = (uint8 *) Memory.MAP_RONLY_SRAM; |
72 | Memory.Map[0x307] = (uint8 *) Memory.MAP_RONLY_SRAM; |
73 | } |
74 | } |
75 | |
76 | uint8 * S9xGetBasePointerSPC7110 (uint32 address) |
77 | { |
78 | uint32 i; |
79 | |
80 | switch (address & 0xf00000) |
81 | { |
82 | case 0xd00000: |
83 | i = s7emu.dx_offset; |
84 | break; |
85 | |
86 | case 0xe00000: |
87 | i = s7emu.ex_offset; |
88 | break; |
89 | |
90 | case 0xf00000: |
91 | i = s7emu.fx_offset; |
92 | break; |
93 | |
94 | default: |
95 | i = 0; |
96 | break; |
97 | } |
98 | |
99 | i += address & 0x0f0000; |
100 | |
101 | return (&Memory.ROM[i]); |
102 | } |
103 | |
104 | uint8 S9xGetSPC7110Byte (uint32 address) |
105 | { |
106 | uint32 i; |
107 | |
108 | switch (address & 0xf00000) |
109 | { |
110 | case 0xd00000: |
111 | i = s7emu.dx_offset; |
112 | break; |
113 | |
114 | case 0xe00000: |
115 | i = s7emu.ex_offset; |
116 | break; |
117 | |
118 | case 0xf00000: |
119 | i = s7emu.fx_offset; |
120 | break; |
121 | |
122 | default: |
123 | i = 0; |
124 | break; |
125 | } |
126 | |
127 | i += address & 0x0fffff; |
128 | |
129 | return (Memory.ROM[i]); |
130 | } |
131 | |
132 | uint8 S9xGetSPC7110 (uint16 address) |
133 | { |
134 | if (!Settings.SPC7110RTC && address > 0x483f) |
135 | return (OpenBus); |
136 | |
137 | return (s7emu.mmio_read(address)); |
138 | } |
139 | |
140 | void S9xSetSPC7110 (uint8 byte, uint16 address) |
141 | { |
142 | if (!Settings.SPC7110RTC && address > 0x483f) |
143 | return; |
144 | |
145 | if (address == 0x4830) |
146 | SetSPC7110SRAMMap(byte); |
147 | |
148 | s7emu.mmio_write(address, byte); |
149 | } |
150 | |
151 | void S9xSPC7110PreSaveState (void) |
152 | { |
153 | s7snap.r4801 = s7emu.r4801; |
154 | s7snap.r4802 = s7emu.r4802; |
155 | s7snap.r4803 = s7emu.r4803; |
156 | s7snap.r4804 = s7emu.r4804; |
157 | s7snap.r4805 = s7emu.r4805; |
158 | s7snap.r4806 = s7emu.r4806; |
159 | s7snap.r4807 = s7emu.r4807; |
160 | s7snap.r4808 = s7emu.r4808; |
161 | s7snap.r4809 = s7emu.r4809; |
162 | s7snap.r480a = s7emu.r480a; |
163 | s7snap.r480b = s7emu.r480b; |
164 | s7snap.r480c = s7emu.r480c; |
165 | |
166 | s7snap.r4811 = s7emu.r4811; |
167 | s7snap.r4812 = s7emu.r4812; |
168 | s7snap.r4813 = s7emu.r4813; |
169 | s7snap.r4814 = s7emu.r4814; |
170 | s7snap.r4815 = s7emu.r4815; |
171 | s7snap.r4816 = s7emu.r4816; |
172 | s7snap.r4817 = s7emu.r4817; |
173 | s7snap.r4818 = s7emu.r4818; |
174 | |
175 | s7snap.r481x = s7emu.r481x; |
176 | |
177 | s7snap.r4814_latch = s7emu.r4814_latch ? TRUE : FALSE; |
178 | s7snap.r4815_latch = s7emu.r4815_latch ? TRUE : FALSE; |
179 | |
180 | s7snap.r4820 = s7emu.r4820; |
181 | s7snap.r4821 = s7emu.r4821; |
182 | s7snap.r4822 = s7emu.r4822; |
183 | s7snap.r4823 = s7emu.r4823; |
184 | s7snap.r4824 = s7emu.r4824; |
185 | s7snap.r4825 = s7emu.r4825; |
186 | s7snap.r4826 = s7emu.r4826; |
187 | s7snap.r4827 = s7emu.r4827; |
188 | s7snap.r4828 = s7emu.r4828; |
189 | s7snap.r4829 = s7emu.r4829; |
190 | s7snap.r482a = s7emu.r482a; |
191 | s7snap.r482b = s7emu.r482b; |
192 | s7snap.r482c = s7emu.r482c; |
193 | s7snap.r482d = s7emu.r482d; |
194 | s7snap.r482e = s7emu.r482e; |
195 | s7snap.r482f = s7emu.r482f; |
196 | |
197 | s7snap.r4830 = s7emu.r4830; |
198 | s7snap.r4831 = s7emu.r4831; |
199 | s7snap.r4832 = s7emu.r4832; |
200 | s7snap.r4833 = s7emu.r4833; |
201 | s7snap.r4834 = s7emu.r4834; |
202 | |
203 | s7snap.dx_offset = (uint32) s7emu.dx_offset; |
204 | s7snap.ex_offset = (uint32) s7emu.ex_offset; |
205 | s7snap.fx_offset = (uint32) s7emu.fx_offset; |
206 | |
207 | s7snap.r4840 = s7emu.r4840; |
208 | s7snap.r4841 = s7emu.r4841; |
209 | s7snap.r4842 = s7emu.r4842; |
210 | |
211 | s7snap.rtc_state = (int32) s7emu.rtc_state; |
212 | s7snap.rtc_mode = (int32) s7emu.rtc_mode; |
213 | s7snap.rtc_index = (uint32) s7emu.rtc_index; |
214 | |
215 | s7snap.decomp_mode = (uint32) s7emu.decomp.decomp_mode; |
216 | s7snap.decomp_offset = (uint32) s7emu.decomp.decomp_offset; |
217 | |
218 | for (int i = 0; i < SPC7110_DECOMP_BUFFER_SIZE; i++) |
219 | s7snap.decomp_buffer[i] = s7emu.decomp.decomp_buffer[i]; |
220 | |
221 | s7snap.decomp_buffer_rdoffset = (uint32) s7emu.decomp.decomp_buffer_rdoffset; |
222 | s7snap.decomp_buffer_wroffset = (uint32) s7emu.decomp.decomp_buffer_wroffset; |
223 | s7snap.decomp_buffer_length = (uint32) s7emu.decomp.decomp_buffer_length; |
224 | |
225 | for (int i = 0; i < 32; i++) |
226 | { |
227 | s7snap.context[i].index = s7emu.decomp.context[i].index; |
228 | s7snap.context[i].invert = s7emu.decomp.context[i].invert; |
229 | } |
230 | } |
231 | |
232 | void S9xSPC7110PostLoadState (int version) |
233 | { |
234 | s7emu.r4801 = s7snap.r4801; |
235 | s7emu.r4802 = s7snap.r4802; |
236 | s7emu.r4803 = s7snap.r4803; |
237 | s7emu.r4804 = s7snap.r4804; |
238 | s7emu.r4805 = s7snap.r4805; |
239 | s7emu.r4806 = s7snap.r4806; |
240 | s7emu.r4807 = s7snap.r4807; |
241 | s7emu.r4808 = s7snap.r4808; |
242 | s7emu.r4809 = s7snap.r4809; |
243 | s7emu.r480a = s7snap.r480a; |
244 | s7emu.r480b = s7snap.r480b; |
245 | s7emu.r480c = s7snap.r480c; |
246 | |
247 | s7emu.r4811 = s7snap.r4811; |
248 | s7emu.r4812 = s7snap.r4812; |
249 | s7emu.r4813 = s7snap.r4813; |
250 | s7emu.r4814 = s7snap.r4814; |
251 | s7emu.r4815 = s7snap.r4815; |
252 | s7emu.r4816 = s7snap.r4816; |
253 | s7emu.r4817 = s7snap.r4817; |
254 | s7emu.r4818 = s7snap.r4818; |
255 | |
256 | s7emu.r481x = s7snap.r481x; |
257 | |
258 | s7emu.r4814_latch = s7snap.r4814_latch ? true : false; |
259 | s7emu.r4815_latch = s7snap.r4815_latch ? true : false; |
260 | |
261 | s7emu.r4820 = s7snap.r4820; |
262 | s7emu.r4821 = s7snap.r4821; |
263 | s7emu.r4822 = s7snap.r4822; |
264 | s7emu.r4823 = s7snap.r4823; |
265 | s7emu.r4824 = s7snap.r4824; |
266 | s7emu.r4825 = s7snap.r4825; |
267 | s7emu.r4826 = s7snap.r4826; |
268 | s7emu.r4827 = s7snap.r4827; |
269 | s7emu.r4828 = s7snap.r4828; |
270 | s7emu.r4829 = s7snap.r4829; |
271 | s7emu.r482a = s7snap.r482a; |
272 | s7emu.r482b = s7snap.r482b; |
273 | s7emu.r482c = s7snap.r482c; |
274 | s7emu.r482d = s7snap.r482d; |
275 | s7emu.r482e = s7snap.r482e; |
276 | s7emu.r482f = s7snap.r482f; |
277 | |
278 | s7emu.r4830 = s7snap.r4830; |
279 | s7emu.r4831 = s7snap.r4831; |
280 | s7emu.r4832 = s7snap.r4832; |
281 | s7emu.r4833 = s7snap.r4833; |
282 | s7emu.r4834 = s7snap.r4834; |
283 | |
284 | s7emu.dx_offset = (unsigned) s7snap.dx_offset; |
285 | s7emu.ex_offset = (unsigned) s7snap.ex_offset; |
286 | s7emu.fx_offset = (unsigned) s7snap.fx_offset; |
287 | |
288 | s7emu.r4840 = s7snap.r4840; |
289 | s7emu.r4841 = s7snap.r4841; |
290 | s7emu.r4842 = s7snap.r4842; |
291 | |
292 | s7emu.rtc_state = (SPC7110::RTC_State) s7snap.rtc_state; |
293 | s7emu.rtc_mode = (SPC7110::RTC_Mode) s7snap.rtc_mode; |
294 | s7emu.rtc_index = (unsigned) s7snap.rtc_index; |
295 | |
296 | s7emu.decomp.decomp_mode = (unsigned) s7snap.decomp_mode; |
297 | s7emu.decomp.decomp_offset = (unsigned) s7snap.decomp_offset; |
298 | |
299 | for (int i = 0; i < SPC7110_DECOMP_BUFFER_SIZE; i++) |
300 | s7emu.decomp.decomp_buffer[i] = s7snap.decomp_buffer[i]; |
301 | |
302 | s7emu.decomp.decomp_buffer_rdoffset = (unsigned) s7snap.decomp_buffer_rdoffset; |
303 | s7emu.decomp.decomp_buffer_wroffset = (unsigned) s7snap.decomp_buffer_wroffset; |
304 | s7emu.decomp.decomp_buffer_length = (unsigned) s7snap.decomp_buffer_length; |
305 | |
306 | for (int i = 0; i < 32; i++) |
307 | { |
308 | s7emu.decomp.context[i].index = s7snap.context[i].index; |
309 | s7emu.decomp.context[i].invert = s7snap.context[i].invert; |
310 | } |
311 | |
312 | s7emu.update_time(0); |
313 | } |
314 | |