1 | /* |
2 | * Copyright (c) 2000-2007 Apple Computer, Inc. All rights reserved. |
3 | * |
4 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ |
5 | * |
6 | * This file contains Original Code and/or Modifications of Original Code |
7 | * as defined in and that are subject to the Apple Public Source License |
8 | * Version 2.0 (the 'License'). You may not use this file except in |
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27 | */ |
28 | /* |
29 | * Mach Operating System |
30 | * Copyright (c) 1991,1990,1989,1988,1987 Carnegie Mellon University |
31 | * All Rights Reserved. |
32 | * |
33 | * Permission to use, copy, modify and distribute this software and its |
34 | * documentation is hereby granted, provided that both the copyright |
35 | * notice and this permission notice appear in all copies of the |
36 | * software, derivative works or modified versions, and any portions |
37 | * thereof, and that both notices appear in supporting documentation. |
38 | * |
39 | * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" |
40 | * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR |
41 | * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. |
42 | * |
43 | * Carnegie Mellon requests users of this software to return to |
44 | * |
45 | * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU |
46 | * School of Computer Science |
47 | * Carnegie Mellon University |
48 | * Pittsburgh PA 15213-3890 |
49 | * |
50 | * any improvements or extensions that they make and grant Carnegie Mellon |
51 | * the rights to redistribute these changes. |
52 | */ |
53 | /* File: machine.h |
54 | * Author: Avadis Tevanian, Jr. |
55 | * Date: 1986 |
56 | * |
57 | * Machine independent machine abstraction. |
58 | */ |
59 | |
60 | #ifndef _MACH_MACHINE_H_ |
61 | #define _MACH_MACHINE_H_ |
62 | |
63 | #include <stdint.h> |
64 | #include <mach/machine/vm_types.h> |
65 | #include <mach/boolean.h> |
66 | |
67 | typedef integer_t cpu_type_t; |
68 | typedef integer_t cpu_subtype_t; |
69 | typedef integer_t cpu_threadtype_t; |
70 | |
71 | #define CPU_STATE_MAX 4 |
72 | |
73 | #define CPU_STATE_USER 0 |
74 | #define CPU_STATE_SYSTEM 1 |
75 | #define CPU_STATE_IDLE 2 |
76 | #define CPU_STATE_NICE 3 |
77 | |
78 | |
79 | |
80 | /* |
81 | * Capability bits used in the definition of cpu_type. |
82 | */ |
83 | #define CPU_ARCH_MASK 0xff000000 /* mask for architecture bits */ |
84 | #define CPU_ARCH_ABI64 0x01000000 /* 64 bit ABI */ |
85 | |
86 | /* |
87 | * Machine types known by all. |
88 | */ |
89 | |
90 | #define CPU_TYPE_ANY ((cpu_type_t) -1) |
91 | |
92 | #define CPU_TYPE_VAX ((cpu_type_t) 1) |
93 | /* skip ((cpu_type_t) 2) */ |
94 | /* skip ((cpu_type_t) 3) */ |
95 | /* skip ((cpu_type_t) 4) */ |
96 | /* skip ((cpu_type_t) 5) */ |
97 | #define CPU_TYPE_MC680x0 ((cpu_type_t) 6) |
98 | #define CPU_TYPE_X86 ((cpu_type_t) 7) |
99 | #define CPU_TYPE_I386 CPU_TYPE_X86 /* compatibility */ |
100 | #define CPU_TYPE_X86_64 (CPU_TYPE_X86 | CPU_ARCH_ABI64) |
101 | |
102 | /* skip CPU_TYPE_MIPS ((cpu_type_t) 8) */ |
103 | /* skip ((cpu_type_t) 9) */ |
104 | #define CPU_TYPE_MC98000 ((cpu_type_t) 10) |
105 | #define CPU_TYPE_HPPA ((cpu_type_t) 11) |
106 | #define CPU_TYPE_ARM ((cpu_type_t) 12) |
107 | #define CPU_TYPE_MC88000 ((cpu_type_t) 13) |
108 | #define CPU_TYPE_SPARC ((cpu_type_t) 14) |
109 | #define CPU_TYPE_I860 ((cpu_type_t) 15) |
110 | /* skip CPU_TYPE_ALPHA ((cpu_type_t) 16) */ |
111 | /* skip ((cpu_type_t) 17) */ |
112 | #define CPU_TYPE_POWERPC ((cpu_type_t) 18) |
113 | #define CPU_TYPE_POWERPC64 (CPU_TYPE_POWERPC | CPU_ARCH_ABI64) |
114 | |
115 | /* |
116 | * Machine subtypes (these are defined here, instead of in a machine |
117 | * dependent directory, so that any program can get all definitions |
118 | * regardless of where is it compiled). |
119 | */ |
120 | |
121 | /* |
122 | * Capability bits used in the definition of cpu_subtype. |
123 | */ |
124 | #define CPU_SUBTYPE_MASK 0xff000000 /* mask for feature flags */ |
125 | #define CPU_SUBTYPE_LIB64 0x80000000 /* 64 bit libraries */ |
126 | |
127 | |
128 | /* |
129 | * Object files that are hand-crafted to run on any |
130 | * implementation of an architecture are tagged with |
131 | * CPU_SUBTYPE_MULTIPLE. This functions essentially the same as |
132 | * the "ALL" subtype of an architecture except that it allows us |
133 | * to easily find object files that may need to be modified |
134 | * whenever a new implementation of an architecture comes out. |
135 | * |
136 | * It is the responsibility of the implementor to make sure the |
137 | * software handles unsupported implementations elegantly. |
138 | */ |
139 | #define CPU_SUBTYPE_MULTIPLE ((cpu_subtype_t) -1) |
140 | #define CPU_SUBTYPE_LITTLE_ENDIAN ((cpu_subtype_t) 0) |
141 | #define CPU_SUBTYPE_BIG_ENDIAN ((cpu_subtype_t) 1) |
142 | |
143 | /* |
144 | * Machine threadtypes. |
145 | * This is none - not defined - for most machine types/subtypes. |
146 | */ |
147 | #define CPU_THREADTYPE_NONE ((cpu_threadtype_t) 0) |
148 | |
149 | /* |
150 | * VAX subtypes (these do *not* necessary conform to the actual cpu |
151 | * ID assigned by DEC available via the SID register). |
152 | */ |
153 | |
154 | #define CPU_SUBTYPE_VAX_ALL ((cpu_subtype_t) 0) |
155 | #define CPU_SUBTYPE_VAX780 ((cpu_subtype_t) 1) |
156 | #define CPU_SUBTYPE_VAX785 ((cpu_subtype_t) 2) |
157 | #define CPU_SUBTYPE_VAX750 ((cpu_subtype_t) 3) |
158 | #define CPU_SUBTYPE_VAX730 ((cpu_subtype_t) 4) |
159 | #define CPU_SUBTYPE_UVAXI ((cpu_subtype_t) 5) |
160 | #define CPU_SUBTYPE_UVAXII ((cpu_subtype_t) 6) |
161 | #define CPU_SUBTYPE_VAX8200 ((cpu_subtype_t) 7) |
162 | #define CPU_SUBTYPE_VAX8500 ((cpu_subtype_t) 8) |
163 | #define CPU_SUBTYPE_VAX8600 ((cpu_subtype_t) 9) |
164 | #define CPU_SUBTYPE_VAX8650 ((cpu_subtype_t) 10) |
165 | #define CPU_SUBTYPE_VAX8800 ((cpu_subtype_t) 11) |
166 | #define CPU_SUBTYPE_UVAXIII ((cpu_subtype_t) 12) |
167 | |
168 | /* |
169 | * 680x0 subtypes |
170 | * |
171 | * The subtype definitions here are unusual for historical reasons. |
172 | * NeXT used to consider 68030 code as generic 68000 code. For |
173 | * backwards compatability: |
174 | * |
175 | * CPU_SUBTYPE_MC68030 symbol has been preserved for source code |
176 | * compatability. |
177 | * |
178 | * CPU_SUBTYPE_MC680x0_ALL has been defined to be the same |
179 | * subtype as CPU_SUBTYPE_MC68030 for binary comatability. |
180 | * |
181 | * CPU_SUBTYPE_MC68030_ONLY has been added to allow new object |
182 | * files to be tagged as containing 68030-specific instructions. |
183 | */ |
184 | |
185 | #define CPU_SUBTYPE_MC680x0_ALL ((cpu_subtype_t) 1) |
186 | #define CPU_SUBTYPE_MC68030 ((cpu_subtype_t) 1) /* compat */ |
187 | #define CPU_SUBTYPE_MC68040 ((cpu_subtype_t) 2) |
188 | #define CPU_SUBTYPE_MC68030_ONLY ((cpu_subtype_t) 3) |
189 | |
190 | /* |
191 | * I386 subtypes |
192 | */ |
193 | |
194 | #define CPU_SUBTYPE_INTEL(f, m) ((cpu_subtype_t) (f) + ((m) << 4)) |
195 | |
196 | #define CPU_SUBTYPE_I386_ALL CPU_SUBTYPE_INTEL(3, 0) |
197 | #define CPU_SUBTYPE_386 CPU_SUBTYPE_INTEL(3, 0) |
198 | #define CPU_SUBTYPE_486 CPU_SUBTYPE_INTEL(4, 0) |
199 | #define CPU_SUBTYPE_486SX CPU_SUBTYPE_INTEL(4, 8) // 8 << 4 = 128 |
200 | #define CPU_SUBTYPE_586 CPU_SUBTYPE_INTEL(5, 0) |
201 | #define CPU_SUBTYPE_PENT CPU_SUBTYPE_INTEL(5, 0) |
202 | #define CPU_SUBTYPE_PENTPRO CPU_SUBTYPE_INTEL(6, 1) |
203 | #define CPU_SUBTYPE_PENTII_M3 CPU_SUBTYPE_INTEL(6, 3) |
204 | #define CPU_SUBTYPE_PENTII_M5 CPU_SUBTYPE_INTEL(6, 5) |
205 | #define CPU_SUBTYPE_CELERON CPU_SUBTYPE_INTEL(7, 6) |
206 | #define CPU_SUBTYPE_CELERON_MOBILE CPU_SUBTYPE_INTEL(7, 7) |
207 | #define CPU_SUBTYPE_PENTIUM_3 CPU_SUBTYPE_INTEL(8, 0) |
208 | #define CPU_SUBTYPE_PENTIUM_3_M CPU_SUBTYPE_INTEL(8, 1) |
209 | #define CPU_SUBTYPE_PENTIUM_3_XEON CPU_SUBTYPE_INTEL(8, 2) |
210 | #define CPU_SUBTYPE_PENTIUM_M CPU_SUBTYPE_INTEL(9, 0) |
211 | #define CPU_SUBTYPE_PENTIUM_4 CPU_SUBTYPE_INTEL(10, 0) |
212 | #define CPU_SUBTYPE_PENTIUM_4_M CPU_SUBTYPE_INTEL(10, 1) |
213 | #define CPU_SUBTYPE_ITANIUM CPU_SUBTYPE_INTEL(11, 0) |
214 | #define CPU_SUBTYPE_ITANIUM_2 CPU_SUBTYPE_INTEL(11, 1) |
215 | #define CPU_SUBTYPE_XEON CPU_SUBTYPE_INTEL(12, 0) |
216 | #define CPU_SUBTYPE_XEON_MP CPU_SUBTYPE_INTEL(12, 1) |
217 | |
218 | #define CPU_SUBTYPE_INTEL_FAMILY(x) ((x) & 15) |
219 | #define CPU_SUBTYPE_INTEL_FAMILY_MAX 15 |
220 | |
221 | #define CPU_SUBTYPE_INTEL_MODEL(x) ((x) >> 4) |
222 | #define CPU_SUBTYPE_INTEL_MODEL_ALL 0 |
223 | |
224 | /* |
225 | * X86 subtypes. |
226 | */ |
227 | |
228 | #define CPU_SUBTYPE_X86_ALL ((cpu_subtype_t)3) |
229 | #define CPU_SUBTYPE_X86_64_ALL ((cpu_subtype_t)3) |
230 | #define CPU_SUBTYPE_X86_ARCH1 ((cpu_subtype_t)4) |
231 | #define CPU_SUBTYPE_X86_64_H ((cpu_subtype_t)8) /* Haswell feature subset */ |
232 | |
233 | |
234 | #define CPU_THREADTYPE_INTEL_HTT ((cpu_threadtype_t) 1) |
235 | |
236 | /* |
237 | * Mips subtypes. |
238 | */ |
239 | |
240 | #define CPU_SUBTYPE_MIPS_ALL ((cpu_subtype_t) 0) |
241 | #define CPU_SUBTYPE_MIPS_R2300 ((cpu_subtype_t) 1) |
242 | #define CPU_SUBTYPE_MIPS_R2600 ((cpu_subtype_t) 2) |
243 | #define CPU_SUBTYPE_MIPS_R2800 ((cpu_subtype_t) 3) |
244 | #define CPU_SUBTYPE_MIPS_R2000a ((cpu_subtype_t) 4) /* pmax */ |
245 | #define CPU_SUBTYPE_MIPS_R2000 ((cpu_subtype_t) 5) |
246 | #define CPU_SUBTYPE_MIPS_R3000a ((cpu_subtype_t) 6) /* 3max */ |
247 | #define CPU_SUBTYPE_MIPS_R3000 ((cpu_subtype_t) 7) |
248 | |
249 | /* |
250 | * MC98000 (PowerPC) subtypes |
251 | */ |
252 | #define CPU_SUBTYPE_MC98000_ALL ((cpu_subtype_t) 0) |
253 | #define CPU_SUBTYPE_MC98601 ((cpu_subtype_t) 1) |
254 | |
255 | /* |
256 | * HPPA subtypes for Hewlett-Packard HP-PA family of |
257 | * risc processors. Port by NeXT to 700 series. |
258 | */ |
259 | |
260 | #define CPU_SUBTYPE_HPPA_ALL ((cpu_subtype_t) 0) |
261 | #define CPU_SUBTYPE_HPPA_7100 ((cpu_subtype_t) 0) /* compat */ |
262 | #define CPU_SUBTYPE_HPPA_7100LC ((cpu_subtype_t) 1) |
263 | |
264 | /* |
265 | * MC88000 subtypes. |
266 | */ |
267 | #define CPU_SUBTYPE_MC88000_ALL ((cpu_subtype_t) 0) |
268 | #define CPU_SUBTYPE_MC88100 ((cpu_subtype_t) 1) |
269 | #define CPU_SUBTYPE_MC88110 ((cpu_subtype_t) 2) |
270 | |
271 | /* |
272 | * SPARC subtypes |
273 | */ |
274 | #define CPU_SUBTYPE_SPARC_ALL ((cpu_subtype_t) 0) |
275 | |
276 | /* |
277 | * I860 subtypes |
278 | */ |
279 | #define CPU_SUBTYPE_I860_ALL ((cpu_subtype_t) 0) |
280 | #define CPU_SUBTYPE_I860_860 ((cpu_subtype_t) 1) |
281 | |
282 | /* |
283 | * PowerPC subtypes |
284 | */ |
285 | #define CPU_SUBTYPE_POWERPC_ALL ((cpu_subtype_t) 0) |
286 | #define CPU_SUBTYPE_POWERPC_601 ((cpu_subtype_t) 1) |
287 | #define CPU_SUBTYPE_POWERPC_602 ((cpu_subtype_t) 2) |
288 | #define CPU_SUBTYPE_POWERPC_603 ((cpu_subtype_t) 3) |
289 | #define CPU_SUBTYPE_POWERPC_603e ((cpu_subtype_t) 4) |
290 | #define CPU_SUBTYPE_POWERPC_603ev ((cpu_subtype_t) 5) |
291 | #define CPU_SUBTYPE_POWERPC_604 ((cpu_subtype_t) 6) |
292 | #define CPU_SUBTYPE_POWERPC_604e ((cpu_subtype_t) 7) |
293 | #define CPU_SUBTYPE_POWERPC_620 ((cpu_subtype_t) 8) |
294 | #define CPU_SUBTYPE_POWERPC_750 ((cpu_subtype_t) 9) |
295 | #define CPU_SUBTYPE_POWERPC_7400 ((cpu_subtype_t) 10) |
296 | #define CPU_SUBTYPE_POWERPC_7450 ((cpu_subtype_t) 11) |
297 | #define CPU_SUBTYPE_POWERPC_970 ((cpu_subtype_t) 100) |
298 | |
299 | /* |
300 | * ARM subtypes |
301 | */ |
302 | #define CPU_SUBTYPE_ARM_ALL ((cpu_subtype_t) 0) |
303 | #define CPU_SUBTYPE_ARM_V4T ((cpu_subtype_t) 5) |
304 | #define CPU_SUBTYPE_ARM_V6 ((cpu_subtype_t) 6) |
305 | #define CPU_SUBTYPE_ARM_V5TEJ ((cpu_subtype_t) 7) |
306 | #define CPU_SUBTYPE_ARM_XSCALE ((cpu_subtype_t) 8) |
307 | #define CPU_SUBTYPE_ARM_V7 ((cpu_subtype_t) 9) |
308 | |
309 | /* |
310 | * CPU families (sysctl hw.cpufamily) |
311 | * |
312 | * These are meant to identify the CPU's marketing name - an |
313 | * application can map these to (possibly) localized strings. |
314 | * NB: the encodings of the CPU families are intentionally arbitrary. |
315 | * There is no ordering, and you should never try to deduce whether |
316 | * or not some feature is available based on the family. |
317 | * Use feature flags (eg, hw.optional.altivec) to test for optional |
318 | * functionality. |
319 | */ |
320 | #define CPUFAMILY_UNKNOWN 0 |
321 | #define CPUFAMILY_POWERPC_G3 0xcee41549 |
322 | #define CPUFAMILY_POWERPC_G4 0x77c184ae |
323 | #define CPUFAMILY_POWERPC_G5 0xed76d8aa |
324 | #define CPUFAMILY_INTEL_6_13 0xaa33392b |
325 | #define CPUFAMILY_INTEL_YONAH 0x73d67300 |
326 | #define CPUFAMILY_INTEL_MEROM 0x426f69ef |
327 | #define CPUFAMILY_INTEL_PENRYN 0x78ea4fbc |
328 | #define CPUFAMILY_INTEL_NEHALEM 0x6b5a4cd2 |
329 | #define CPUFAMILY_INTEL_WESTMERE 0x573b5eec |
330 | #define CPUFAMILY_INTEL_SANDYBRIDGE 0x5490b78c |
331 | #define CPUFAMILY_ARM_9 0xe73283ae |
332 | #define CPUFAMILY_ARM_11 0x8ff620d8 |
333 | #define CPUFAMILY_ARM_XSCALE 0x53b005f5 |
334 | #define CPUFAMILY_ARM_13 0x0cc90e64 |
335 | #define CPUFAMILY_ARM_14 0x96077ef1 |
336 | |
337 | /* The following synonyms are deprecated: */ |
338 | #define CPUFAMILY_INTEL_6_14 CPUFAMILY_INTEL_YONAH |
339 | #define CPUFAMILY_INTEL_6_15 CPUFAMILY_INTEL_MEROM |
340 | #define CPUFAMILY_INTEL_6_23 CPUFAMILY_INTEL_PENRYN |
341 | #define CPUFAMILY_INTEL_6_26 CPUFAMILY_INTEL_NEHALEM |
342 | |
343 | #define CPUFAMILY_INTEL_CORE CPUFAMILY_INTEL_YONAH |
344 | #define CPUFAMILY_INTEL_CORE2 CPUFAMILY_INTEL_MEROM |
345 | |
346 | |
347 | #endif /* _MACH_MACHINE_H_ */ |
348 | |