1/* Copyright (C) 2013-2014 Povilas Kanapickas <povilas@radix.lt>
2
3 Distributed under the Boost Software License, Version 1.0.
4 (See accompanying file LICENSE_1_0.txt or copy at
5 http://www.boost.org/LICENSE_1_0.txt)
6*/
7
8#ifndef LIBSIMDPP_SIMDPP_CORE_I_ADD_H
9#define LIBSIMDPP_SIMDPP_CORE_I_ADD_H
10
11#ifndef LIBSIMDPP_SIMD_H
12 #error "This file must be included through simd.h"
13#endif
14
15#include <simdpp/types.h>
16#include <simdpp/detail/expr/i_add.h>
17#include <simdpp/core/detail/get_expr_uint.h>
18#include <simdpp/core/detail/scalar_arg_impl.h>
19#include <simdpp/core/detail/get_expr_uint.h>
20
21namespace simdpp {
22namespace SIMDPP_ARCH_NAMESPACE {
23
24
25/** Adds 8-bit integer values.
26
27 @code
28 r0 = a0 + b0
29 ...
30 rN = aN + bN
31 @endcode
32
33 @par 256-bit version:
34 @icost{SSE2-AVX, NEON, ALTIVEC, 2}
35*/
36template<unsigned N, class V1, class V2> SIMDPP_INL
37typename detail::get_expr_uint<expr_iadd, V1, V2>::type
38 add(const any_int8<N,V1>& a,
39 const any_int8<N,V2>& b)
40{
41 return { { a.wrapped(), b.wrapped() } };
42}
43
44SIMDPP_SCALAR_ARG_IMPL_INT_UNSIGNED(add, expr_iadd, any_int8, int8)
45
46/** Adds 16-bit integer values.
47
48 @code
49 r0 = a0 + b0
50 ...
51 rN = aN + bN
52 @endcode
53
54 @par 256-bit version:
55 @icost{SSE2-AVX, NEON, ALTIVEC, 2}
56*/
57template<unsigned N, class V1, class V2> SIMDPP_INL
58typename detail::get_expr_uint<expr_iadd, V1, V2>::type
59 add(const any_int16<N,V1>& a,
60 const any_int16<N,V2>& b)
61{
62 return { { a.wrapped(), b.wrapped() } };
63}
64
65SIMDPP_SCALAR_ARG_IMPL_INT_UNSIGNED(add, expr_iadd, any_int16, int16)
66
67/** Adds 32-bit integer values.
68
69 @code
70 r0 = a0 + b0
71 ...
72 rN = aN + bN
73 @endcode
74
75 @par 256-bit version:
76 @icost{SSE2-AVX, NEON, ALTIVEC, 2}
77*/
78template<unsigned N, class V1, class V2> SIMDPP_INL
79typename detail::get_expr_uint<expr_iadd, V1, V2>::type
80 add(const any_int32<N,V1>& a,
81 const any_int32<N,V2>& b)
82{
83 return { { a.wrapped(), b.wrapped() } };
84}
85
86SIMDPP_SCALAR_ARG_IMPL_INT_UNSIGNED(add, expr_iadd, any_int32, int32)
87
88/** Adds 64-bit integer values.
89
90 @code
91 r0 = a0 + b0
92 ...
93 rN = aN + bN
94 @endcode
95
96 @par 128-bit version:
97 @icost{ALTIVEC, 5-6}
98
99 @par 256-bit version:
100 @icost{SSE2-AVX, NEON, 2}
101 @icost{ALTIVEC, 10-11}
102*/
103template<unsigned N, class V1, class V2> SIMDPP_INL
104typename detail::get_expr_uint<expr_iadd, V1, V2>::type
105 add(const any_int64<N,V1>& a,
106 const any_int64<N,V2>& b)
107{
108 return { { a.wrapped(), b.wrapped() } };
109}
110
111SIMDPP_SCALAR_ARG_IMPL_INT_UNSIGNED(add, expr_iadd, any_int64, int64)
112
113} // namespace SIMDPP_ARCH_NAMESPACE
114} // namespace simdpp
115
116#endif
117
118