1 | /* Copyright (C) 2013-2017 Povilas Kanapickas <povilas@radix.lt> |
2 | |
3 | Distributed under the Boost Software License, Version 1.0. |
4 | (See accompanying file LICENSE_1_0.txt or copy at |
5 | http://www.boost.org/LICENSE_1_0.txt) |
6 | */ |
7 | |
8 | #ifndef LIBSIMDPP_SIMDPP_CORE_SHUFFLE_BYTES16_H |
9 | #define LIBSIMDPP_SIMDPP_CORE_SHUFFLE_BYTES16_H |
10 | |
11 | #ifndef LIBSIMDPP_SIMD_H |
12 | #error "This file must be included through simd.h" |
13 | #endif |
14 | |
15 | #include <simdpp/types.h> |
16 | #include <simdpp/detail/get_expr.h> |
17 | #include <simdpp/detail/insn/shuffle_bytes16.h> |
18 | |
19 | namespace simdpp { |
20 | namespace SIMDPP_ARCH_NAMESPACE { |
21 | |
22 | /** Selects bytes from two vectors according to a mask. Each byte within the |
23 | mask defines which element to select: |
24 | * Bits 7-5 must be zero or the behavior is undefined |
25 | * Bit 4 defines which vector to select. 0 corresponds to @a a, 1 to @a b. |
26 | * Bits 3-0 define the element within the selected vector. |
27 | */ |
28 | template<unsigned N, class V1, class V2, class E3> SIMDPP_INL |
29 | typename detail::get_expr_nomask<V1>::empty |
30 | shuffle_bytes16(const any_vec8<N,V1>& a, const any_vec8<N,V2>& b, |
31 | const uint8<N,E3>& mask) |
32 | { |
33 | typename detail::get_expr_nomask<V1>::type ra = a.wrapped().eval(), |
34 | rb = b.wrapped().eval(); |
35 | return detail::insn::i_shuffle_bytes16(ra, rb, mask.eval()); |
36 | } |
37 | |
38 | template<unsigned N, class V1, class V2, class E3> SIMDPP_INL |
39 | typename detail::get_expr_nomask<V1>::empty |
40 | shuffle_bytes16(const any_vec16<N,V1>& a, const any_vec16<N,V2>& b, |
41 | const uint16<N,E3>& mask) |
42 | { |
43 | typename detail::get_expr_nomask<V1>::type ra = a.wrapped().eval(), |
44 | rb = b.wrapped().eval(); |
45 | return detail::insn::i_shuffle_bytes16(ra, rb, mask.eval()); |
46 | } |
47 | |
48 | template<unsigned N, class V1, class V2, class E3> SIMDPP_INL |
49 | typename detail::get_expr_nomask<V1>::empty |
50 | shuffle_bytes16(const any_vec32<N,V1>& a, const any_vec32<N,V2>& b, |
51 | const uint32<N,E3>& mask) |
52 | { |
53 | typename detail::get_expr_nomask<V1>::type ra = a.wrapped().eval(), |
54 | rb = b.wrapped().eval(); |
55 | return detail::insn::i_shuffle_bytes16(ra, rb, mask.eval()); |
56 | } |
57 | |
58 | template<unsigned N, class V1, class V2, class E3> SIMDPP_INL |
59 | typename detail::get_expr_nomask<V1>::empty |
60 | shuffle_bytes16(const any_vec64<N,V1>& a, const any_vec64<N,V2>& b, |
61 | const uint64<N,E3>& mask) |
62 | { |
63 | typename detail::get_expr_nomask<V1>::type ra = a.wrapped().eval(), |
64 | rb = b.wrapped().eval(); |
65 | return detail::insn::i_shuffle_bytes16(ra, rb, mask.eval()); |
66 | } |
67 | |
68 | } // namespace SIMDPP_ARCH_NAMESPACE |
69 | } // namespace simdpp |
70 | |
71 | #endif |
72 | |
73 | |