| 1 | /* Copyright (C) 2013-2014 Povilas Kanapickas <povilas@radix.lt> |
| 2 | |
| 3 | Distributed under the Boost Software License, Version 1.0. |
| 4 | (See accompanying file LICENSE_1_0.txt or copy at |
| 5 | http://www.boost.org/LICENSE_1_0.txt) |
| 6 | */ |
| 7 | |
| 8 | #ifndef LIBSIMDPP_SIMDPP_CORE_ZIP_HI_H |
| 9 | #define LIBSIMDPP_SIMDPP_CORE_ZIP_HI_H |
| 10 | |
| 11 | #ifndef LIBSIMDPP_SIMD_H |
| 12 | #error "This file must be included through simd.h" |
| 13 | #endif |
| 14 | |
| 15 | #include <simdpp/types.h> |
| 16 | #include <simdpp/detail/insn/zip_hi.h> |
| 17 | |
| 18 | namespace simdpp { |
| 19 | namespace SIMDPP_ARCH_NAMESPACE { |
| 20 | |
| 21 | /** Interleaves the higher halves of two vectors. |
| 22 | |
| 23 | @code |
| 24 | | 0 1 2 3 ... N-2 N-1 | |
| 25 | r = [ a(N/2) b(N/2) a(N/2+1) b(N/2+1) ... a(N-1) b(N-1) ] |
| 26 | @endcode |
| 27 | |
| 28 | @par 256-bit version: |
| 29 | The lower and higher 128-bit halves are processed as if 128-bit instruction |
| 30 | was applied to each of them separately. |
| 31 | |
| 32 | @icost{SSV2-AVX, NEON, ALTIVEC, 2} |
| 33 | */ |
| 34 | template<unsigned N, class V1, class V2> SIMDPP_INL |
| 35 | typename detail::get_expr2_nomask<V1, V2>::empty |
| 36 | zip16_hi(const any_vec8<N,V1>& a, const any_vec8<N,V2>& b) |
| 37 | { |
| 38 | typename detail::get_expr2_nomask_nosign<V1, V2>::type ra, rb; |
| 39 | ra = a.wrapped().eval(); |
| 40 | rb = b.wrapped().eval(); |
| 41 | return detail::insn::i_zip16_hi(ra, rb); |
| 42 | } |
| 43 | |
| 44 | template<unsigned N, class V1, class V2> SIMDPP_INL |
| 45 | typename detail::get_expr2_nomask<V1, V2>::empty |
| 46 | zip8_hi(const any_vec16<N,V1>& a, const any_vec16<N,V2>& b) |
| 47 | { |
| 48 | typename detail::get_expr2_nomask_nosign<V1, V2>::type ra, rb; |
| 49 | ra = a.wrapped().eval(); |
| 50 | rb = b.wrapped().eval(); |
| 51 | return detail::insn::i_zip8_hi(ra, rb); |
| 52 | } |
| 53 | |
| 54 | template<unsigned N, class V1, class V2> SIMDPP_INL |
| 55 | typename detail::get_expr2_nomask<V1, V2>::empty |
| 56 | zip4_hi(const any_vec32<N,V1>& a, const any_vec32<N,V2>& b) |
| 57 | { |
| 58 | typename detail::get_expr2_nomask_nosign<V1, V2>::type ra, rb; |
| 59 | ra = a.wrapped().eval(); |
| 60 | rb = b.wrapped().eval(); |
| 61 | return detail::insn::i_zip4_hi(ra, rb); |
| 62 | } |
| 63 | |
| 64 | template<unsigned N, class V1, class V2> SIMDPP_INL |
| 65 | typename detail::get_expr2_nomask<V1, V2>::empty |
| 66 | zip2_hi(const any_vec64<N,V1>& a, const any_vec64<N,V2>& b) |
| 67 | { |
| 68 | typename detail::get_expr2_nomask_nosign<V1, V2>::type ra, rb; |
| 69 | ra = a.wrapped().eval(); |
| 70 | rb = b.wrapped().eval(); |
| 71 | return detail::insn::i_zip2_hi(ra, rb); |
| 72 | } |
| 73 | |
| 74 | } // namespace SIMDPP_ARCH_NAMESPACE |
| 75 | } // namespace simdpp |
| 76 | |
| 77 | #endif |
| 78 | |
| 79 | |