1/*
2 * Copyright (c) 2016-2018, Intel Corporation
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * * Redistributions of source code must retain the above copyright notice,
8 * this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * * Neither the name of Intel Corporation nor the names of its contributors
13 * may be used to endorse or promote products derived from this software
14 * without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef MCSHENG_INTERNAL_H
30#define MCSHENG_INTERNAL_H
31
32#include "nfa_internal.h"
33#include "ue2common.h"
34#include "util/simd_types.h"
35
36#define ACCEPT_FLAG 0x8000
37#define ACCEL_FLAG 0x4000
38#define STATE_MASK 0x3fff
39
40#define SHERMAN_STATE 1
41
42#define SHERMAN_TYPE_OFFSET 0
43#define SHERMAN_FIXED_SIZE 32
44
45#define SHERMAN_LEN_OFFSET 1
46#define SHERMAN_DADDY_OFFSET 2
47#define SHERMAN_CHARS_OFFSET 4
48#define SHERMAN_STATES_OFFSET(sso_len) (4 + (sso_len))
49
50struct report_list {
51 u32 count;
52 ReportID report[];
53};
54
55struct mstate_aux {
56 u32 accept;
57 u32 accept_eod;
58 u16 top;
59 u32 accel_offset; /* relative to start of struct mcsheng; 0 if no accel */
60};
61
62#define MCSHENG_FLAG_SINGLE 1 /**< we raise only single accept id */
63
64struct mcsheng {
65 u16 state_count; /**< total number of states */
66 u32 length; /**< length of dfa in bytes */
67 u16 start_anchored; /**< anchored start state */
68 u16 start_floating; /**< floating start state */
69 u32 aux_offset; /**< offset of the aux structures relative to the start of
70 * the nfa structure */
71 u32 sherman_offset; /**< offset of array of sherman state offsets the
72 * state_info structures relative to the start of the
73 * nfa structure */
74 u32 sherman_end; /**< offset of the end of the state_info structures
75 * relative to the start of the nfa structure */
76 u16 sheng_end; /**< first non-sheng state */
77 u16 sheng_accel_limit; /**< first sheng accel state. state given in terms of
78 * internal sheng ids */
79 u16 accel_limit_8; /**< 8 bit, lowest accelerable state */
80 u16 accept_limit_8; /**< 8 bit, lowest accept state */
81 u16 sherman_limit; /**< lowest sherman state */
82 u8 alphaShift;
83 u8 flags;
84 u8 has_accel; /**< 1 iff there are any accel plans */
85 u8 remap[256]; /**< remaps characters to a smaller alphabet */
86 ReportID arb_report; /**< one of the accepts that this dfa may raise */
87 u32 accel_offset; /**< offset of accel structures from start of McClellan */
88 m128 sheng_masks[N_CHARS];
89};
90
91/* pext masks for the runtime to access appropriately copies of bytes 1..7
92 * representing the data from a u64a. */
93extern const u64a mcsheng_pext_mask[8];
94
95#endif
96