1/*
2 * Copyright (c) 2016-2017, Intel Corporation
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
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8 * this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * * Neither the name of Intel Corporation nor the names of its contributors
13 * may be used to endorse or promote products derived from this software
14 * without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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27 */
28
29/** \file
30 * \brief Lookup tables to support SIMD operations.
31 */
32
33#include "simd_utils.h"
34
35ALIGN_CL_DIRECTIVE const char vbs_mask_data[] = {
36 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0,
37 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0,
38
39 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
40 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
41
42 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0,
43 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0,
44};
45
46#define ZEROES_8 0, 0, 0, 0, 0, 0, 0, 0
47#define ZEROES_31 ZEROES_8, ZEROES_8, ZEROES_8, 0, 0, 0, 0, 0, 0, 0
48#define ZEROES_32 ZEROES_8, ZEROES_8, ZEROES_8, ZEROES_8
49
50/** \brief LUT for the mask1bit functions. */
51ALIGN_CL_DIRECTIVE const u8 simd_onebit_masks[] = {
52 ZEROES_32, ZEROES_32,
53 ZEROES_31, 0x01, ZEROES_32,
54 ZEROES_31, 0x02, ZEROES_32,
55 ZEROES_31, 0x04, ZEROES_32,
56 ZEROES_31, 0x08, ZEROES_32,
57 ZEROES_31, 0x10, ZEROES_32,
58 ZEROES_31, 0x20, ZEROES_32,
59 ZEROES_31, 0x40, ZEROES_32,
60 ZEROES_31, 0x80, ZEROES_32,
61 ZEROES_32, ZEROES_32,
62};
63