1/*
2 * Copyright (c) 2018-present, Facebook, Inc.
3 * All rights reserved.
4 *
5 * This source code is licensed under both the BSD-style license (found in the
6 * LICENSE file in the root directory of this source tree) and the GPLv2 (found
7 * in the COPYING file in the root directory of this source tree).
8 * You may select, at your option, one of the above-listed licenses.
9 */
10
11#ifndef ZSTD_COMMON_CPU_H
12#define ZSTD_COMMON_CPU_H
13
14/**
15 * Implementation taken from folly/CpuId.h
16 * https://github.com/facebook/folly/blob/master/folly/CpuId.h
17 */
18
19#include <string.h>
20
21#include "mem.h"
22
23#ifdef _MSC_VER
24#include <intrin.h>
25#endif
26
27typedef struct {
28 U32 f1c;
29 U32 f1d;
30 U32 f7b;
31 U32 f7c;
32} ZSTD_cpuid_t;
33
34MEM_STATIC ZSTD_cpuid_t ZSTD_cpuid(void) {
35 U32 f1c = 0;
36 U32 f1d = 0;
37 U32 f7b = 0;
38 U32 f7c = 0;
39#ifdef _MSC_VER
40 int reg[4];
41 __cpuid((int*)reg, 0);
42 {
43 int const n = reg[0];
44 if (n >= 1) {
45 __cpuid((int*)reg, 1);
46 f1c = (U32)reg[2];
47 f1d = (U32)reg[3];
48 }
49 if (n >= 7) {
50 __cpuidex((int*)reg, 7, 0);
51 f7b = (U32)reg[1];
52 f7c = (U32)reg[2];
53 }
54 }
55#elif defined(__i386__) && defined(__PIC__) && !defined(__clang__) && defined(__GNUC__)
56 /* The following block like the normal cpuid branch below, but gcc
57 * reserves ebx for use of its pic register so we must specially
58 * handle the save and restore to avoid clobbering the register
59 */
60 U32 n;
61 __asm__(
62 "pushl %%ebx\n\t"
63 "cpuid\n\t"
64 "popl %%ebx\n\t"
65 : "=a"(n)
66 : "a"(0)
67 : "ecx", "edx");
68 if (n >= 1) {
69 U32 f1a;
70 __asm__(
71 "pushl %%ebx\n\t"
72 "cpuid\n\t"
73 "popl %%ebx\n\t"
74 : "=a"(f1a), "=c"(f1c), "=d"(f1d)
75 : "a"(1)
76 :);
77 }
78 if (n >= 7) {
79 __asm__(
80 "pushl %%ebx\n\t"
81 "cpuid\n\t"
82 "movl %%ebx, %%eax\n\r"
83 "popl %%ebx"
84 : "=a"(f7b), "=c"(f7c)
85 : "a"(7), "c"(0)
86 : "edx");
87 }
88#elif defined(__x86_64__) || defined(_M_X64) || defined(__i386__)
89 U32 n;
90 __asm__("cpuid" : "=a"(n) : "a"(0) : "ebx", "ecx", "edx");
91 if (n >= 1) {
92 U32 f1a;
93 __asm__("cpuid" : "=a"(f1a), "=c"(f1c), "=d"(f1d) : "a"(1) : "ebx");
94 }
95 if (n >= 7) {
96 U32 f7a;
97 __asm__("cpuid"
98 : "=a"(f7a), "=b"(f7b), "=c"(f7c)
99 : "a"(7), "c"(0)
100 : "edx");
101 }
102#endif
103 {
104 ZSTD_cpuid_t cpuid;
105 cpuid.f1c = f1c;
106 cpuid.f1d = f1d;
107 cpuid.f7b = f7b;
108 cpuid.f7c = f7c;
109 return cpuid;
110 }
111}
112
113#define X(name, r, bit) \
114 MEM_STATIC int ZSTD_cpuid_##name(ZSTD_cpuid_t const cpuid) { \
115 return ((cpuid.r) & (1U << bit)) != 0; \
116 }
117
118/* cpuid(1): Processor Info and Feature Bits. */
119#define C(name, bit) X(name, f1c, bit)
120 C(sse3, 0)
121 C(pclmuldq, 1)
122 C(dtes64, 2)
123 C(monitor, 3)
124 C(dscpl, 4)
125 C(vmx, 5)
126 C(smx, 6)
127 C(eist, 7)
128 C(tm2, 8)
129 C(ssse3, 9)
130 C(cnxtid, 10)
131 C(fma, 12)
132 C(cx16, 13)
133 C(xtpr, 14)
134 C(pdcm, 15)
135 C(pcid, 17)
136 C(dca, 18)
137 C(sse41, 19)
138 C(sse42, 20)
139 C(x2apic, 21)
140 C(movbe, 22)
141 C(popcnt, 23)
142 C(tscdeadline, 24)
143 C(aes, 25)
144 C(xsave, 26)
145 C(osxsave, 27)
146 C(avx, 28)
147 C(f16c, 29)
148 C(rdrand, 30)
149#undef C
150#define D(name, bit) X(name, f1d, bit)
151 D(fpu, 0)
152 D(vme, 1)
153 D(de, 2)
154 D(pse, 3)
155 D(tsc, 4)
156 D(msr, 5)
157 D(pae, 6)
158 D(mce, 7)
159 D(cx8, 8)
160 D(apic, 9)
161 D(sep, 11)
162 D(mtrr, 12)
163 D(pge, 13)
164 D(mca, 14)
165 D(cmov, 15)
166 D(pat, 16)
167 D(pse36, 17)
168 D(psn, 18)
169 D(clfsh, 19)
170 D(ds, 21)
171 D(acpi, 22)
172 D(mmx, 23)
173 D(fxsr, 24)
174 D(sse, 25)
175 D(sse2, 26)
176 D(ss, 27)
177 D(htt, 28)
178 D(tm, 29)
179 D(pbe, 31)
180#undef D
181
182/* cpuid(7): Extended Features. */
183#define B(name, bit) X(name, f7b, bit)
184 B(bmi1, 3)
185 B(hle, 4)
186 B(avx2, 5)
187 B(smep, 7)
188 B(bmi2, 8)
189 B(erms, 9)
190 B(invpcid, 10)
191 B(rtm, 11)
192 B(mpx, 14)
193 B(avx512f, 16)
194 B(avx512dq, 17)
195 B(rdseed, 18)
196 B(adx, 19)
197 B(smap, 20)
198 B(avx512ifma, 21)
199 B(pcommit, 22)
200 B(clflushopt, 23)
201 B(clwb, 24)
202 B(avx512pf, 26)
203 B(avx512er, 27)
204 B(avx512cd, 28)
205 B(sha, 29)
206 B(avx512bw, 30)
207 B(avx512vl, 31)
208#undef B
209#define C(name, bit) X(name, f7c, bit)
210 C(prefetchwt1, 0)
211 C(avx512vbmi, 1)
212#undef C
213
214#undef X
215
216#endif /* ZSTD_COMMON_CPU_H */
217