1#include "ppu.hpp"
2#include "mappers/mapper1.hpp"
3
4
5/* Apply the registers state */
6void Mapper1::apply()
7{
8 // 16KB PRG:
9 if (regs[0] & 0b1000)
10 {
11 // 0x8000 swappable, 0xC000 fixed to bank 0x0F:
12 if (regs[0] & 0b100)
13 {
14 map_prg<16>(0, regs[3] & 0xF);
15 map_prg<16>(1, 0xF);
16 }
17 // 0x8000 fixed to bank 0x00, 0xC000 swappable:
18 else
19 {
20 map_prg<16>(0, 0);
21 map_prg<16>(1, regs[3] & 0xF);
22 }
23 }
24 // 32KB PRG:
25 else
26 map_prg<32>(0, (regs[3] & 0xF) >> 1);
27
28 // 4KB CHR:
29 if (regs[0] & 0b10000)
30 {
31 map_chr<4>(0, regs[1]);
32 map_chr<4>(1, regs[2]);
33 }
34 // 8KB CHR:
35 else
36 map_chr<8>(0, regs[1] >> 1);
37
38 // Set mirroring:
39 switch (regs[0] & 0b11)
40 {
41 case 2: set_mirroring(PPU::VERTICAL); break;
42 case 3: set_mirroring(PPU::HORIZONTAL); break;
43 }
44}
45
46u8 Mapper1::write(u16 addr, u8 v)
47{
48 // PRG RAM write;
49 if (addr < 0x8000)
50 prgRam[addr - 0x6000] = v;
51 // Mapper register write:
52 else if (addr & 0x8000)
53 {
54 // Reset:
55 if (v & 0x80)
56 {
57 writeN = 0;
58 tmpReg = 0;
59 regs[0] |= 0x0C;
60 apply();
61 }
62 else
63 {
64 // Write a bit into the temporary register:
65 tmpReg = ((v & 1) << 4) | (tmpReg >> 1);
66 // Finished writing all the bits:
67 if (++writeN == 5)
68 {
69 regs[(addr >> 13) & 0b11] = tmpReg;
70 writeN = 0;
71 tmpReg = 0;
72 apply();
73 }
74 }
75 }
76 return v;
77}
78
79u8 Mapper1::chr_write(u16 addr, u8 v)
80{
81 return chr[addr] = v;
82}
83