1/*
2** SSA IR (Intermediate Representation) format.
3** Copyright (C) 2005-2021 Mike Pall. See Copyright Notice in luajit.h
4*/
5
6#ifndef _LJ_IR_H
7#define _LJ_IR_H
8
9#include "lj_obj.h"
10
11/* -- IR instructions ----------------------------------------------------- */
12
13/* IR instruction definition. Order matters, see below. ORDER IR */
14#define IRDEF(_) \
15 /* Guarded assertions. */ \
16 /* Must be properly aligned to flip opposites (^1) and (un)ordered (^4). */ \
17 _(LT, N , ref, ref) \
18 _(GE, N , ref, ref) \
19 _(LE, N , ref, ref) \
20 _(GT, N , ref, ref) \
21 \
22 _(ULT, N , ref, ref) \
23 _(UGE, N , ref, ref) \
24 _(ULE, N , ref, ref) \
25 _(UGT, N , ref, ref) \
26 \
27 _(EQ, C , ref, ref) \
28 _(NE, C , ref, ref) \
29 \
30 _(ABC, N , ref, ref) \
31 _(RETF, S , ref, ref) \
32 \
33 /* Miscellaneous ops. */ \
34 _(NOP, N , ___, ___) \
35 _(BASE, N , lit, lit) \
36 _(PVAL, N , lit, ___) \
37 _(GCSTEP, S , ___, ___) \
38 _(HIOP, S , ref, ref) \
39 _(LOOP, S , ___, ___) \
40 _(USE, S , ref, ___) \
41 _(PHI, S , ref, ref) \
42 _(RENAME, S , ref, lit) \
43 _(PROF, S , ___, ___) \
44 \
45 /* Constants. */ \
46 _(KPRI, N , ___, ___) \
47 _(KINT, N , cst, ___) \
48 _(KGC, N , cst, ___) \
49 _(KPTR, N , cst, ___) \
50 _(KKPTR, N , cst, ___) \
51 _(KNULL, N , cst, ___) \
52 _(KNUM, N , cst, ___) \
53 _(KINT64, N , cst, ___) \
54 _(KSLOT, N , ref, lit) \
55 \
56 /* Bit ops. */ \
57 _(BNOT, N , ref, ___) \
58 _(BSWAP, N , ref, ___) \
59 _(BAND, C , ref, ref) \
60 _(BOR, C , ref, ref) \
61 _(BXOR, C , ref, ref) \
62 _(BSHL, N , ref, ref) \
63 _(BSHR, N , ref, ref) \
64 _(BSAR, N , ref, ref) \
65 _(BROL, N , ref, ref) \
66 _(BROR, N , ref, ref) \
67 \
68 /* Arithmetic ops. ORDER ARITH */ \
69 _(ADD, C , ref, ref) \
70 _(SUB, N , ref, ref) \
71 _(MUL, C , ref, ref) \
72 _(DIV, N , ref, ref) \
73 _(MOD, N , ref, ref) \
74 _(POW, N , ref, ref) \
75 _(NEG, N , ref, ref) \
76 \
77 _(ABS, N , ref, ref) \
78 _(LDEXP, N , ref, ref) \
79 _(MIN, C , ref, ref) \
80 _(MAX, C , ref, ref) \
81 _(FPMATH, N , ref, lit) \
82 \
83 /* Overflow-checking arithmetic ops. */ \
84 _(ADDOV, CW, ref, ref) \
85 _(SUBOV, NW, ref, ref) \
86 _(MULOV, CW, ref, ref) \
87 \
88 /* Memory ops. A = array, H = hash, U = upvalue, F = field, S = stack. */ \
89 \
90 /* Memory references. */ \
91 _(AREF, R , ref, ref) \
92 _(HREFK, R , ref, ref) \
93 _(HREF, L , ref, ref) \
94 _(NEWREF, S , ref, ref) \
95 _(UREFO, LW, ref, lit) \
96 _(UREFC, LW, ref, lit) \
97 _(FREF, R , ref, lit) \
98 _(STRREF, N , ref, ref) \
99 _(LREF, L , ___, ___) \
100 \
101 /* Loads and Stores. These must be in the same order. */ \
102 _(ALOAD, L , ref, ___) \
103 _(HLOAD, L , ref, ___) \
104 _(ULOAD, L , ref, ___) \
105 _(FLOAD, L , ref, lit) \
106 _(XLOAD, L , ref, lit) \
107 _(SLOAD, L , lit, lit) \
108 _(VLOAD, L , ref, ___) \
109 _(ALEN, L , ref, ref) \
110 \
111 _(ASTORE, S , ref, ref) \
112 _(HSTORE, S , ref, ref) \
113 _(USTORE, S , ref, ref) \
114 _(FSTORE, S , ref, ref) \
115 _(XSTORE, S , ref, ref) \
116 \
117 /* Allocations. */ \
118 _(SNEW, N , ref, ref) /* CSE is ok, not marked as A. */ \
119 _(XSNEW, A , ref, ref) \
120 _(TNEW, AW, lit, lit) \
121 _(TDUP, AW, ref, ___) \
122 _(CNEW, AW, ref, ref) \
123 _(CNEWI, NW, ref, ref) /* CSE is ok, not marked as A. */ \
124 \
125 /* Buffer operations. */ \
126 _(BUFHDR, L , ref, lit) \
127 _(BUFPUT, LW, ref, ref) \
128 _(BUFSTR, AW, ref, ref) \
129 \
130 /* Barriers. */ \
131 _(TBAR, S , ref, ___) \
132 _(OBAR, S , ref, ref) \
133 _(XBAR, S , ___, ___) \
134 \
135 /* Type conversions. */ \
136 _(CONV, N , ref, lit) \
137 _(TOBIT, N , ref, ref) \
138 _(TOSTR, N , ref, lit) \
139 _(STRTO, N , ref, ___) \
140 \
141 /* Calls. */ \
142 _(CALLN, NW, ref, lit) \
143 _(CALLA, AW, ref, lit) \
144 _(CALLL, LW, ref, lit) \
145 _(CALLS, S , ref, lit) \
146 _(CALLXS, S , ref, ref) \
147 _(CARG, N , ref, ref) \
148 \
149 /* End of list. */
150
151/* IR opcodes (max. 256). */
152typedef enum {
153#define IRENUM(name, m, m1, m2) IR_##name,
154IRDEF(IRENUM)
155#undef IRENUM
156 IR__MAX
157} IROp;
158
159/* Stored opcode. */
160typedef uint8_t IROp1;
161
162LJ_STATIC_ASSERT(((int)IR_EQ^1) == (int)IR_NE);
163LJ_STATIC_ASSERT(((int)IR_LT^1) == (int)IR_GE);
164LJ_STATIC_ASSERT(((int)IR_LE^1) == (int)IR_GT);
165LJ_STATIC_ASSERT(((int)IR_LT^3) == (int)IR_GT);
166LJ_STATIC_ASSERT(((int)IR_LT^4) == (int)IR_ULT);
167
168/* Delta between xLOAD and xSTORE. */
169#define IRDELTA_L2S ((int)IR_ASTORE - (int)IR_ALOAD)
170
171LJ_STATIC_ASSERT((int)IR_HLOAD + IRDELTA_L2S == (int)IR_HSTORE);
172LJ_STATIC_ASSERT((int)IR_ULOAD + IRDELTA_L2S == (int)IR_USTORE);
173LJ_STATIC_ASSERT((int)IR_FLOAD + IRDELTA_L2S == (int)IR_FSTORE);
174LJ_STATIC_ASSERT((int)IR_XLOAD + IRDELTA_L2S == (int)IR_XSTORE);
175
176/* -- Named IR literals --------------------------------------------------- */
177
178/* FPMATH sub-functions. ORDER FPM. */
179#define IRFPMDEF(_) \
180 _(FLOOR) _(CEIL) _(TRUNC) /* Must be first and in this order. */ \
181 _(SQRT) _(LOG) _(LOG2) \
182 _(OTHER)
183
184typedef enum {
185#define FPMENUM(name) IRFPM_##name,
186IRFPMDEF(FPMENUM)
187#undef FPMENUM
188 IRFPM__MAX
189} IRFPMathOp;
190
191/* FLOAD fields. */
192#define IRFLDEF(_) \
193 _(STR_LEN, offsetof(GCstr, len)) \
194 _(FUNC_ENV, offsetof(GCfunc, l.env)) \
195 _(FUNC_PC, offsetof(GCfunc, l.pc)) \
196 _(FUNC_FFID, offsetof(GCfunc, l.ffid)) \
197 _(THREAD_ENV, offsetof(lua_State, env)) \
198 _(TAB_META, offsetof(GCtab, metatable)) \
199 _(TAB_ARRAY, offsetof(GCtab, array)) \
200 _(TAB_NODE, offsetof(GCtab, node)) \
201 _(TAB_ASIZE, offsetof(GCtab, asize)) \
202 _(TAB_HMASK, offsetof(GCtab, hmask)) \
203 _(TAB_NOMM, offsetof(GCtab, nomm)) \
204 _(UDATA_META, offsetof(GCudata, metatable)) \
205 _(UDATA_UDTYPE, offsetof(GCudata, udtype)) \
206 _(UDATA_FILE, sizeof(GCudata)) \
207 _(CDATA_CTYPEID, offsetof(GCcdata, ctypeid)) \
208 _(CDATA_PTR, sizeof(GCcdata)) \
209 _(CDATA_INT, sizeof(GCcdata)) \
210 _(CDATA_INT64, sizeof(GCcdata)) \
211 _(CDATA_INT64_4, sizeof(GCcdata) + 4)
212
213typedef enum {
214#define FLENUM(name, ofs) IRFL_##name,
215IRFLDEF(FLENUM)
216#undef FLENUM
217 IRFL__MAX
218} IRFieldID;
219
220/* SLOAD mode bits, stored in op2. */
221#define IRSLOAD_PARENT 0x01 /* Coalesce with parent trace. */
222#define IRSLOAD_FRAME 0x02 /* Load 32 bits of ftsz. */
223#define IRSLOAD_TYPECHECK 0x04 /* Needs type check. */
224#define IRSLOAD_CONVERT 0x08 /* Number to integer conversion. */
225#define IRSLOAD_READONLY 0x10 /* Read-only, omit slot store. */
226#define IRSLOAD_INHERIT 0x20 /* Inherited by exits/side traces. */
227
228/* XLOAD mode, stored in op2. */
229#define IRXLOAD_READONLY 1 /* Load from read-only data. */
230#define IRXLOAD_VOLATILE 2 /* Load from volatile data. */
231#define IRXLOAD_UNALIGNED 4 /* Unaligned load. */
232
233/* BUFHDR mode, stored in op2. */
234#define IRBUFHDR_RESET 0 /* Reset buffer. */
235#define IRBUFHDR_APPEND 1 /* Append to buffer. */
236
237/* CONV mode, stored in op2. */
238#define IRCONV_SRCMASK 0x001f /* Source IRType. */
239#define IRCONV_DSTMASK 0x03e0 /* Dest. IRType (also in ir->t). */
240#define IRCONV_DSH 5
241#define IRCONV_NUM_INT ((IRT_NUM<<IRCONV_DSH)|IRT_INT)
242#define IRCONV_INT_NUM ((IRT_INT<<IRCONV_DSH)|IRT_NUM)
243#define IRCONV_SEXT 0x0800 /* Sign-extend integer to integer. */
244#define IRCONV_MODEMASK 0x0fff
245#define IRCONV_CONVMASK 0xf000
246#define IRCONV_CSH 12
247/* Number to integer conversion mode. Ordered by strength of the checks. */
248#define IRCONV_TOBIT (0<<IRCONV_CSH) /* None. Cache only: TOBIT conv. */
249#define IRCONV_ANY (1<<IRCONV_CSH) /* Any FP number is ok. */
250#define IRCONV_INDEX (2<<IRCONV_CSH) /* Check + special backprop rules. */
251#define IRCONV_CHECK (3<<IRCONV_CSH) /* Number checked for integerness. */
252
253/* TOSTR mode, stored in op2. */
254#define IRTOSTR_INT 0 /* Convert integer to string. */
255#define IRTOSTR_NUM 1 /* Convert number to string. */
256#define IRTOSTR_CHAR 2 /* Convert char value to string. */
257
258/* -- IR operands --------------------------------------------------------- */
259
260/* IR operand mode (2 bit). */
261typedef enum {
262 IRMref, /* IR reference. */
263 IRMlit, /* 16 bit unsigned literal. */
264 IRMcst, /* Constant literal: i, gcr or ptr. */
265 IRMnone /* Unused operand. */
266} IRMode;
267#define IRM___ IRMnone
268
269/* Mode bits: Commutative, {Normal/Ref, Alloc, Load, Store}, Non-weak guard. */
270#define IRM_C 0x10
271
272#define IRM_N 0x00
273#define IRM_R IRM_N
274#define IRM_A 0x20
275#define IRM_L 0x40
276#define IRM_S 0x60
277
278#define IRM_W 0x80
279
280#define IRM_NW (IRM_N|IRM_W)
281#define IRM_CW (IRM_C|IRM_W)
282#define IRM_AW (IRM_A|IRM_W)
283#define IRM_LW (IRM_L|IRM_W)
284
285#define irm_op1(m) ((IRMode)((m)&3))
286#define irm_op2(m) ((IRMode)(((m)>>2)&3))
287#define irm_iscomm(m) ((m) & IRM_C)
288#define irm_kind(m) ((m) & IRM_S)
289
290#define IRMODE(name, m, m1, m2) (((IRM##m1)|((IRM##m2)<<2)|(IRM_##m))^IRM_W),
291
292LJ_DATA const uint8_t lj_ir_mode[IR__MAX+1];
293
294/* -- IR instruction types ------------------------------------------------ */
295
296#define IRTSIZE_PGC (LJ_GC64 ? 8 : 4)
297
298/* Map of itypes to non-negative numbers and their sizes. ORDER LJ_T.
299** LJ_TUPVAL/LJ_TTRACE never appear in a TValue. Use these itypes for
300** IRT_P32 and IRT_P64, which never escape the IR.
301** The various integers are only used in the IR and can only escape to
302** a TValue after implicit or explicit conversion. Their types must be
303** contiguous and next to IRT_NUM (see the typerange macros below).
304*/
305#define IRTDEF(_) \
306 _(NIL, 4) _(FALSE, 4) _(TRUE, 4) _(LIGHTUD, LJ_64 ? 8 : 4) \
307 _(STR, IRTSIZE_PGC) _(P32, 4) _(THREAD, IRTSIZE_PGC) _(PROTO, IRTSIZE_PGC) \
308 _(FUNC, IRTSIZE_PGC) _(P64, 8) _(CDATA, IRTSIZE_PGC) _(TAB, IRTSIZE_PGC) \
309 _(UDATA, IRTSIZE_PGC) \
310 _(FLOAT, 4) _(NUM, 8) _(I8, 1) _(U8, 1) _(I16, 2) _(U16, 2) \
311 _(INT, 4) _(U32, 4) _(I64, 8) _(U64, 8) \
312 _(SOFTFP, 4) /* There is room for 8 more types. */
313
314/* IR result type and flags (8 bit). */
315typedef enum {
316#define IRTENUM(name, size) IRT_##name,
317IRTDEF(IRTENUM)
318#undef IRTENUM
319 IRT__MAX,
320
321 /* Native pointer type and the corresponding integer type. */
322 IRT_PTR = LJ_64 ? IRT_P64 : IRT_P32,
323 IRT_PGC = LJ_GC64 ? IRT_P64 : IRT_P32,
324 IRT_IGC = LJ_GC64 ? IRT_I64 : IRT_INT,
325 IRT_INTP = LJ_64 ? IRT_I64 : IRT_INT,
326 IRT_UINTP = LJ_64 ? IRT_U64 : IRT_U32,
327
328 /* Additional flags. */
329 IRT_MARK = 0x20, /* Marker for misc. purposes. */
330 IRT_ISPHI = 0x40, /* Instruction is left or right PHI operand. */
331 IRT_GUARD = 0x80, /* Instruction is a guard. */
332
333 /* Masks. */
334 IRT_TYPE = 0x1f,
335 IRT_T = 0xff
336} IRType;
337
338#define irtype_ispri(irt) ((uint32_t)(irt) <= IRT_TRUE)
339
340/* Stored IRType. */
341typedef struct IRType1 { uint8_t irt; } IRType1;
342
343#define IRT(o, t) ((uint32_t)(((o)<<8) | (t)))
344#define IRTI(o) (IRT((o), IRT_INT))
345#define IRTN(o) (IRT((o), IRT_NUM))
346#define IRTG(o, t) (IRT((o), IRT_GUARD|(t)))
347#define IRTGI(o) (IRT((o), IRT_GUARD|IRT_INT))
348
349#define irt_t(t) ((IRType)(t).irt)
350#define irt_type(t) ((IRType)((t).irt & IRT_TYPE))
351#define irt_sametype(t1, t2) ((((t1).irt ^ (t2).irt) & IRT_TYPE) == 0)
352#define irt_typerange(t, first, last) \
353 ((uint32_t)((t).irt & IRT_TYPE) - (uint32_t)(first) <= (uint32_t)(last-first))
354
355#define irt_isnil(t) (irt_type(t) == IRT_NIL)
356#define irt_ispri(t) ((uint32_t)irt_type(t) <= IRT_TRUE)
357#define irt_islightud(t) (irt_type(t) == IRT_LIGHTUD)
358#define irt_isstr(t) (irt_type(t) == IRT_STR)
359#define irt_istab(t) (irt_type(t) == IRT_TAB)
360#define irt_iscdata(t) (irt_type(t) == IRT_CDATA)
361#define irt_isfloat(t) (irt_type(t) == IRT_FLOAT)
362#define irt_isnum(t) (irt_type(t) == IRT_NUM)
363#define irt_isint(t) (irt_type(t) == IRT_INT)
364#define irt_isi8(t) (irt_type(t) == IRT_I8)
365#define irt_isu8(t) (irt_type(t) == IRT_U8)
366#define irt_isi16(t) (irt_type(t) == IRT_I16)
367#define irt_isu16(t) (irt_type(t) == IRT_U16)
368#define irt_isu32(t) (irt_type(t) == IRT_U32)
369#define irt_isi64(t) (irt_type(t) == IRT_I64)
370#define irt_isu64(t) (irt_type(t) == IRT_U64)
371
372#define irt_isfp(t) (irt_isnum(t) || irt_isfloat(t))
373#define irt_isinteger(t) (irt_typerange((t), IRT_I8, IRT_INT))
374#define irt_isgcv(t) (irt_typerange((t), IRT_STR, IRT_UDATA))
375#define irt_isaddr(t) (irt_typerange((t), IRT_LIGHTUD, IRT_UDATA))
376#define irt_isint64(t) (irt_typerange((t), IRT_I64, IRT_U64))
377
378#if LJ_GC64
379/* Include IRT_NIL, so IR(ASMREF_L) (aka REF_NIL) is considered 64 bit. */
380#define IRT_IS64 \
381 ((1u<<IRT_NUM)|(1u<<IRT_I64)|(1u<<IRT_U64)|(1u<<IRT_P64)|\
382 (1u<<IRT_LIGHTUD)|(1u<<IRT_STR)|(1u<<IRT_THREAD)|(1u<<IRT_PROTO)|\
383 (1u<<IRT_FUNC)|(1u<<IRT_CDATA)|(1u<<IRT_TAB)|(1u<<IRT_UDATA)|\
384 (1u<<IRT_NIL))
385#elif LJ_64
386#define IRT_IS64 \
387 ((1u<<IRT_NUM)|(1u<<IRT_I64)|(1u<<IRT_U64)|(1u<<IRT_P64)|(1u<<IRT_LIGHTUD))
388#else
389#define IRT_IS64 \
390 ((1u<<IRT_NUM)|(1u<<IRT_I64)|(1u<<IRT_U64))
391#endif
392
393#define irt_is64(t) ((IRT_IS64 >> irt_type(t)) & 1)
394#define irt_is64orfp(t) (((IRT_IS64|(1u<<IRT_FLOAT))>>irt_type(t)) & 1)
395
396#define irt_size(t) (lj_ir_type_size[irt_t((t))])
397
398LJ_DATA const uint8_t lj_ir_type_size[];
399
400static LJ_AINLINE IRType itype2irt(const TValue *tv)
401{
402 if (tvisint(tv))
403 return IRT_INT;
404 else if (tvisnum(tv))
405 return IRT_NUM;
406#if LJ_64 && !LJ_GC64
407 else if (tvislightud(tv))
408 return IRT_LIGHTUD;
409#endif
410 else
411 return (IRType)~itype(tv);
412}
413
414static LJ_AINLINE uint32_t irt_toitype_(IRType t)
415{
416 lj_assertX(!LJ_64 || LJ_GC64 || t != IRT_LIGHTUD,
417 "no plain type tag for lightuserdata");
418 if (LJ_DUALNUM && t > IRT_NUM) {
419 return LJ_TISNUM;
420 } else {
421 lj_assertX(t <= IRT_NUM, "no plain type tag for IR type %d", t);
422 return ~(uint32_t)t;
423 }
424}
425
426#define irt_toitype(t) irt_toitype_(irt_type((t)))
427
428#define irt_isguard(t) ((t).irt & IRT_GUARD)
429#define irt_ismarked(t) ((t).irt & IRT_MARK)
430#define irt_setmark(t) ((t).irt |= IRT_MARK)
431#define irt_clearmark(t) ((t).irt &= ~IRT_MARK)
432#define irt_isphi(t) ((t).irt & IRT_ISPHI)
433#define irt_setphi(t) ((t).irt |= IRT_ISPHI)
434#define irt_clearphi(t) ((t).irt &= ~IRT_ISPHI)
435
436/* Stored combined IR opcode and type. */
437typedef uint16_t IROpT;
438
439/* -- IR references ------------------------------------------------------- */
440
441/* IR references. */
442typedef uint16_t IRRef1; /* One stored reference. */
443typedef uint32_t IRRef2; /* Two stored references. */
444typedef uint32_t IRRef; /* Used to pass around references. */
445
446/* Fixed references. */
447enum {
448 REF_BIAS = 0x8000,
449 REF_TRUE = REF_BIAS-3,
450 REF_FALSE = REF_BIAS-2,
451 REF_NIL = REF_BIAS-1, /* \--- Constants grow downwards. */
452 REF_BASE = REF_BIAS, /* /--- IR grows upwards. */
453 REF_FIRST = REF_BIAS+1,
454 REF_DROP = 0xffff
455};
456
457/* Note: IRMlit operands must be < REF_BIAS, too!
458** This allows for fast and uniform manipulation of all operands
459** without looking up the operand mode in lj_ir_mode:
460** - CSE calculates the maximum reference of two operands.
461** This must work with mixed reference/literal operands, too.
462** - DCE marking only checks for operand >= REF_BIAS.
463** - LOOP needs to substitute reference operands.
464** Constant references and literals must not be modified.
465*/
466
467#define IRREF2(lo, hi) ((IRRef2)(lo) | ((IRRef2)(hi) << 16))
468
469#define irref_isk(ref) ((ref) < REF_BIAS)
470
471/* Tagged IR references (32 bit).
472**
473** +-------+-------+---------------+
474** | irt | flags | ref |
475** +-------+-------+---------------+
476**
477** The tag holds a copy of the IRType and speeds up IR type checks.
478*/
479typedef uint32_t TRef;
480
481#define TREF_REFMASK 0x0000ffff
482#define TREF_FRAME 0x00010000
483#define TREF_CONT 0x00020000
484
485#define TREF(ref, t) ((TRef)((ref) + ((t)<<24)))
486
487#define tref_ref(tr) ((IRRef1)(tr))
488#define tref_t(tr) ((IRType)((tr)>>24))
489#define tref_type(tr) ((IRType)(((tr)>>24) & IRT_TYPE))
490#define tref_typerange(tr, first, last) \
491 ((((tr)>>24) & IRT_TYPE) - (TRef)(first) <= (TRef)(last-first))
492
493#define tref_istype(tr, t) (((tr) & (IRT_TYPE<<24)) == ((t)<<24))
494#define tref_isnil(tr) (tref_istype((tr), IRT_NIL))
495#define tref_isfalse(tr) (tref_istype((tr), IRT_FALSE))
496#define tref_istrue(tr) (tref_istype((tr), IRT_TRUE))
497#define tref_islightud(tr) (tref_istype((tr), IRT_LIGHTUD))
498#define tref_isstr(tr) (tref_istype((tr), IRT_STR))
499#define tref_isfunc(tr) (tref_istype((tr), IRT_FUNC))
500#define tref_iscdata(tr) (tref_istype((tr), IRT_CDATA))
501#define tref_istab(tr) (tref_istype((tr), IRT_TAB))
502#define tref_isudata(tr) (tref_istype((tr), IRT_UDATA))
503#define tref_isnum(tr) (tref_istype((tr), IRT_NUM))
504#define tref_isint(tr) (tref_istype((tr), IRT_INT))
505
506#define tref_isbool(tr) (tref_typerange((tr), IRT_FALSE, IRT_TRUE))
507#define tref_ispri(tr) (tref_typerange((tr), IRT_NIL, IRT_TRUE))
508#define tref_istruecond(tr) (!tref_typerange((tr), IRT_NIL, IRT_FALSE))
509#define tref_isinteger(tr) (tref_typerange((tr), IRT_I8, IRT_INT))
510#define tref_isnumber(tr) (tref_typerange((tr), IRT_NUM, IRT_INT))
511#define tref_isnumber_str(tr) (tref_isnumber((tr)) || tref_isstr((tr)))
512#define tref_isgcv(tr) (tref_typerange((tr), IRT_STR, IRT_UDATA))
513
514#define tref_isk(tr) (irref_isk(tref_ref((tr))))
515#define tref_isk2(tr1, tr2) (irref_isk(tref_ref((tr1) | (tr2))))
516
517#define TREF_PRI(t) (TREF(REF_NIL-(t), (t)))
518#define TREF_NIL (TREF_PRI(IRT_NIL))
519#define TREF_FALSE (TREF_PRI(IRT_FALSE))
520#define TREF_TRUE (TREF_PRI(IRT_TRUE))
521
522/* -- IR format ----------------------------------------------------------- */
523
524/* IR instruction format (64 bit).
525**
526** 16 16 8 8 8 8
527** +-------+-------+---+---+---+---+
528** | op1 | op2 | t | o | r | s |
529** +-------+-------+---+---+---+---+
530** | op12/i/gco32 | ot | prev | (alternative fields in union)
531** +-------+-------+---+---+---+---+
532** | TValue/gco64 | (2nd IR slot for 64 bit constants)
533** +---------------+-------+-------+
534** 32 16 16
535**
536** prev is only valid prior to register allocation and then reused for r + s.
537*/
538
539typedef union IRIns {
540 struct {
541 LJ_ENDIAN_LOHI(
542 IRRef1 op1; /* IR operand 1. */
543 , IRRef1 op2; /* IR operand 2. */
544 )
545 IROpT ot; /* IR opcode and type (overlaps t and o). */
546 IRRef1 prev; /* Previous ins in same chain (overlaps r and s). */
547 };
548 struct {
549 IRRef2 op12; /* IR operand 1 and 2 (overlaps op1 and op2). */
550 LJ_ENDIAN_LOHI(
551 IRType1 t; /* IR type. */
552 , IROp1 o; /* IR opcode. */
553 )
554 LJ_ENDIAN_LOHI(
555 uint8_t r; /* Register allocation (overlaps prev). */
556 , uint8_t s; /* Spill slot allocation (overlaps prev). */
557 )
558 };
559 int32_t i; /* 32 bit signed integer literal (overlaps op12). */
560 GCRef gcr; /* GCobj constant (overlaps op12 or entire slot). */
561 MRef ptr; /* Pointer constant (overlaps op12 or entire slot). */
562 TValue tv; /* TValue constant (overlaps entire slot). */
563} IRIns;
564
565#define ir_isk64(ir) \
566 ((ir)->o == IR_KNUM || (ir)->o == IR_KINT64 || \
567 (LJ_GC64 && \
568 ((ir)->o == IR_KGC || (ir)->o == IR_KPTR || (ir)->o == IR_KKPTR)))
569
570#define ir_kgc(ir) check_exp((ir)->o == IR_KGC, gcref((ir)[LJ_GC64].gcr))
571#define ir_kstr(ir) (gco2str(ir_kgc((ir))))
572#define ir_ktab(ir) (gco2tab(ir_kgc((ir))))
573#define ir_kfunc(ir) (gco2func(ir_kgc((ir))))
574#define ir_kcdata(ir) (gco2cd(ir_kgc((ir))))
575#define ir_knum(ir) check_exp((ir)->o == IR_KNUM, &(ir)[1].tv)
576#define ir_kint64(ir) check_exp((ir)->o == IR_KINT64, &(ir)[1].tv)
577#define ir_k64(ir) check_exp(ir_isk64(ir), &(ir)[1].tv)
578#define ir_kptr(ir) \
579 check_exp((ir)->o == IR_KPTR || (ir)->o == IR_KKPTR, \
580 mref((ir)[LJ_GC64].ptr, void))
581
582/* A store or any other op with a non-weak guard has a side-effect. */
583static LJ_AINLINE int ir_sideeff(IRIns *ir)
584{
585 return (((ir->t.irt | ~IRT_GUARD) & lj_ir_mode[ir->o]) >= IRM_S);
586}
587
588LJ_STATIC_ASSERT((int)IRT_GUARD == (int)IRM_W);
589
590/* Replace IR instruction with NOP. */
591static LJ_AINLINE void lj_ir_nop(IRIns *ir)
592{
593 ir->ot = IRT(IR_NOP, IRT_NIL);
594 ir->op1 = ir->op2 = 0;
595 ir->prev = 0;
596}
597
598#endif
599