1/*
2 * This file is part of the MicroPython project, http://micropython.org/
3 *
4 * The MIT License (MIT)
5 *
6 * Copyright (c) 2013, 2014 Damien P. George
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 */
26
27#include <stdio.h>
28#include <assert.h>
29#include <string.h>
30
31#include "py/mpconfig.h"
32
33// wrapper around everything in this file
34#if MICROPY_EMIT_THUMB || MICROPY_EMIT_INLINE_THUMB
35
36#include "py/mpstate.h"
37#include "py/persistentcode.h"
38#include "py/mphal.h"
39#include "py/asmthumb.h"
40
41#define UNSIGNED_FIT5(x) ((uint32_t)(x) < 32)
42#define UNSIGNED_FIT7(x) ((uint32_t)(x) < 128)
43#define UNSIGNED_FIT8(x) (((x) & 0xffffff00) == 0)
44#define UNSIGNED_FIT16(x) (((x) & 0xffff0000) == 0)
45#define SIGNED_FIT8(x) (((x) & 0xffffff80) == 0) || (((x) & 0xffffff80) == 0xffffff80)
46#define SIGNED_FIT9(x) (((x) & 0xffffff00) == 0) || (((x) & 0xffffff00) == 0xffffff00)
47#define SIGNED_FIT12(x) (((x) & 0xfffff800) == 0) || (((x) & 0xfffff800) == 0xfffff800)
48#define SIGNED_FIT23(x) (((x) & 0xffc00000) == 0) || (((x) & 0xffc00000) == 0xffc00000)
49
50#if MICROPY_EMIT_THUMB_ARMV7M
51// Note: these actually take an imm12 but the high-bit is not encoded here
52#define OP_ADD_W_RRI_HI(reg_src) (0xf200 | (reg_src))
53#define OP_ADD_W_RRI_LO(reg_dest, imm11) ((imm11 << 4 & 0x7000) | reg_dest << 8 | (imm11 & 0xff))
54#define OP_SUB_W_RRI_HI(reg_src) (0xf2a0 | (reg_src))
55#define OP_SUB_W_RRI_LO(reg_dest, imm11) ((imm11 << 4 & 0x7000) | reg_dest << 8 | (imm11 & 0xff))
56
57#define OP_LDR_W_HI(reg_base) (0xf8d0 | (reg_base))
58#define OP_LDR_W_LO(reg_dest, imm12) ((reg_dest) << 12 | (imm12))
59#endif
60
61static inline byte *asm_thumb_get_cur_to_write_bytes(asm_thumb_t *as, int n) {
62 return mp_asm_base_get_cur_to_write_bytes(&as->base, n);
63}
64
65void asm_thumb_end_pass(asm_thumb_t *as) {
66 (void)as;
67 // could check labels are resolved...
68
69 #if __ICACHE_PRESENT == 1
70 if (as->base.pass == MP_ASM_PASS_EMIT) {
71 // flush D-cache, so the code emitted is stored in memory
72 MP_HAL_CLEAN_DCACHE(as->base.code_base, as->base.code_size);
73 // invalidate I-cache
74 SCB_InvalidateICache();
75 }
76 #endif
77}
78
79/*
80STATIC void asm_thumb_write_byte_1(asm_thumb_t *as, byte b1) {
81 byte *c = asm_thumb_get_cur_to_write_bytes(as, 1);
82 c[0] = b1;
83}
84*/
85
86/*
87#define IMM32_L0(x) ((x) & 0xff)
88#define IMM32_L1(x) (((x) >> 8) & 0xff)
89#define IMM32_L2(x) (((x) >> 16) & 0xff)
90#define IMM32_L3(x) (((x) >> 24) & 0xff)
91
92STATIC void asm_thumb_write_word32(asm_thumb_t *as, int w32) {
93 byte *c = asm_thumb_get_cur_to_write_bytes(as, 4);
94 c[0] = IMM32_L0(w32);
95 c[1] = IMM32_L1(w32);
96 c[2] = IMM32_L2(w32);
97 c[3] = IMM32_L3(w32);
98}
99*/
100
101// rlolist is a bit map indicating desired lo-registers
102#define OP_PUSH_RLIST(rlolist) (0xb400 | (rlolist))
103#define OP_PUSH_RLIST_LR(rlolist) (0xb400 | 0x0100 | (rlolist))
104#define OP_POP_RLIST(rlolist) (0xbc00 | (rlolist))
105#define OP_POP_RLIST_PC(rlolist) (0xbc00 | 0x0100 | (rlolist))
106
107// The number of words must fit in 7 unsigned bits
108#define OP_ADD_SP(num_words) (0xb000 | (num_words))
109#define OP_SUB_SP(num_words) (0xb080 | (num_words))
110
111// locals:
112// - stored on the stack in ascending order
113// - numbered 0 through num_locals-1
114// - SP points to first local
115//
116// | SP
117// v
118// l0 l1 l2 ... l(n-1)
119// ^ ^
120// | low address | high address in RAM
121
122void asm_thumb_entry(asm_thumb_t *as, int num_locals) {
123 assert(num_locals >= 0);
124
125 // If this Thumb machine code is run from ARM state then add a prelude
126 // to switch to Thumb state for the duration of the function.
127 #if MICROPY_DYNAMIC_COMPILER || MICROPY_EMIT_ARM || (defined(__arm__) && !defined(__thumb2__) && !defined(__thumb__))
128 #if MICROPY_DYNAMIC_COMPILER
129 if (mp_dynamic_compiler.native_arch == MP_NATIVE_ARCH_ARMV6)
130 #endif
131 {
132 asm_thumb_op32(as, 0x4010, 0xe92d); // push {r4, lr}
133 asm_thumb_op32(as, 0xe009, 0xe28f); // add lr, pc, 8 + 1
134 asm_thumb_op32(as, 0xff3e, 0xe12f); // blx lr
135 asm_thumb_op32(as, 0x4010, 0xe8bd); // pop {r4, lr}
136 asm_thumb_op32(as, 0xff1e, 0xe12f); // bx lr
137 }
138 #endif
139
140 // work out what to push and how many extra spaces to reserve on stack
141 // so that we have enough for all locals and it's aligned an 8-byte boundary
142 // we push extra regs (r1, r2, r3) to help do the stack adjustment
143 // we probably should just always subtract from sp, since this would be more efficient
144 // for push rlist, lowest numbered register at the lowest address
145 uint reglist;
146 uint stack_adjust;
147 // don't pop r0 because it's used for return value
148 switch (num_locals) {
149 case 0:
150 reglist = 0xf2;
151 stack_adjust = 0;
152 break;
153
154 case 1:
155 reglist = 0xf2;
156 stack_adjust = 0;
157 break;
158
159 case 2:
160 reglist = 0xfe;
161 stack_adjust = 0;
162 break;
163
164 case 3:
165 reglist = 0xfe;
166 stack_adjust = 0;
167 break;
168
169 default:
170 reglist = 0xfe;
171 stack_adjust = ((num_locals - 3) + 1) & (~1);
172 break;
173 }
174 asm_thumb_op16(as, OP_PUSH_RLIST_LR(reglist));
175 if (stack_adjust > 0) {
176 #if MICROPY_EMIT_THUMB_ARMV7M
177 if (UNSIGNED_FIT7(stack_adjust)) {
178 asm_thumb_op16(as, OP_SUB_SP(stack_adjust));
179 } else {
180 asm_thumb_op32(as, OP_SUB_W_RRI_HI(ASM_THUMB_REG_SP), OP_SUB_W_RRI_LO(ASM_THUMB_REG_SP, stack_adjust * 4));
181 }
182 #else
183 int adj = stack_adjust;
184 // we don't expect the stack_adjust to be massive
185 while (!UNSIGNED_FIT7(adj)) {
186 asm_thumb_op16(as, OP_SUB_SP(127));
187 adj -= 127;
188 }
189 asm_thumb_op16(as, OP_SUB_SP(adj));
190 #endif
191 }
192 as->push_reglist = reglist;
193 as->stack_adjust = stack_adjust;
194}
195
196void asm_thumb_exit(asm_thumb_t *as) {
197 if (as->stack_adjust > 0) {
198 #if MICROPY_EMIT_THUMB_ARMV7M
199 if (UNSIGNED_FIT7(as->stack_adjust)) {
200 asm_thumb_op16(as, OP_ADD_SP(as->stack_adjust));
201 } else {
202 asm_thumb_op32(as, OP_ADD_W_RRI_HI(ASM_THUMB_REG_SP), OP_ADD_W_RRI_LO(ASM_THUMB_REG_SP, as->stack_adjust * 4));
203 }
204 #else
205 int adj = as->stack_adjust;
206 // we don't expect the stack_adjust to be massive
207 while (!UNSIGNED_FIT7(adj)) {
208 asm_thumb_op16(as, OP_ADD_SP(127));
209 adj -= 127;
210 }
211 asm_thumb_op16(as, OP_ADD_SP(adj));
212 #endif
213 }
214 asm_thumb_op16(as, OP_POP_RLIST_PC(as->push_reglist));
215}
216
217STATIC mp_uint_t get_label_dest(asm_thumb_t *as, uint label) {
218 assert(label < as->base.max_num_labels);
219 return as->base.label_offsets[label];
220}
221
222void asm_thumb_op16(asm_thumb_t *as, uint op) {
223 byte *c = asm_thumb_get_cur_to_write_bytes(as, 2);
224 if (c != NULL) {
225 // little endian
226 c[0] = op;
227 c[1] = op >> 8;
228 }
229}
230
231void asm_thumb_op32(asm_thumb_t *as, uint op1, uint op2) {
232 byte *c = asm_thumb_get_cur_to_write_bytes(as, 4);
233 if (c != NULL) {
234 // little endian, op1 then op2
235 c[0] = op1;
236 c[1] = op1 >> 8;
237 c[2] = op2;
238 c[3] = op2 >> 8;
239 }
240}
241
242#define OP_FORMAT_4(op, rlo_dest, rlo_src) ((op) | ((rlo_src) << 3) | (rlo_dest))
243
244void asm_thumb_format_4(asm_thumb_t *as, uint op, uint rlo_dest, uint rlo_src) {
245 assert(rlo_dest < ASM_THUMB_REG_R8);
246 assert(rlo_src < ASM_THUMB_REG_R8);
247 asm_thumb_op16(as, OP_FORMAT_4(op, rlo_dest, rlo_src));
248}
249
250void asm_thumb_mov_reg_reg(asm_thumb_t *as, uint reg_dest, uint reg_src) {
251 uint op_lo;
252 if (reg_src < 8) {
253 op_lo = reg_src << 3;
254 } else {
255 op_lo = 0x40 | ((reg_src - 8) << 3);
256 }
257 if (reg_dest < 8) {
258 op_lo |= reg_dest;
259 } else {
260 op_lo |= 0x80 | (reg_dest - 8);
261 }
262 // mov reg_dest, reg_src
263 asm_thumb_op16(as, 0x4600 | op_lo);
264}
265
266#if MICROPY_EMIT_THUMB_ARMV7M
267
268// if loading lo half with movw, the i16 value will be zero extended into the r32 register!
269size_t asm_thumb_mov_reg_i16(asm_thumb_t *as, uint mov_op, uint reg_dest, int i16_src) {
270 assert(reg_dest < ASM_THUMB_REG_R15);
271 size_t loc = mp_asm_base_get_code_pos(&as->base);
272 // mov[wt] reg_dest, #i16_src
273 asm_thumb_op32(as, mov_op | ((i16_src >> 1) & 0x0400) | ((i16_src >> 12) & 0xf), ((i16_src << 4) & 0x7000) | (reg_dest << 8) | (i16_src & 0xff));
274 return loc;
275}
276
277#else
278
279void asm_thumb_mov_rlo_i16(asm_thumb_t *as, uint rlo_dest, int i16_src) {
280 asm_thumb_mov_rlo_i8(as, rlo_dest, (i16_src >> 8) & 0xff);
281 asm_thumb_lsl_rlo_rlo_i5(as, rlo_dest, rlo_dest, 8);
282 asm_thumb_add_rlo_i8(as, rlo_dest, i16_src & 0xff);
283}
284
285#endif
286
287#define OP_B_N(byte_offset) (0xe000 | (((byte_offset) >> 1) & 0x07ff))
288
289bool asm_thumb_b_n_label(asm_thumb_t *as, uint label) {
290 mp_uint_t dest = get_label_dest(as, label);
291 mp_int_t rel = dest - as->base.code_offset;
292 rel -= 4; // account for instruction prefetch, PC is 4 bytes ahead of this instruction
293 asm_thumb_op16(as, OP_B_N(rel));
294 return as->base.pass != MP_ASM_PASS_EMIT || SIGNED_FIT12(rel);
295}
296
297#define OP_BCC_N(cond, byte_offset) (0xd000 | ((cond) << 8) | (((byte_offset) >> 1) & 0x00ff))
298
299// all these bit arithmetics need coverage testing!
300#define OP_BCC_W_HI(cond, byte_offset) (0xf000 | ((cond) << 6) | (((byte_offset) >> 10) & 0x0400) | (((byte_offset) >> 14) & 0x003f))
301#define OP_BCC_W_LO(byte_offset) (0x8000 | ((byte_offset) & 0x2000) | (((byte_offset) >> 1) & 0x0fff))
302
303bool asm_thumb_bcc_nw_label(asm_thumb_t *as, int cond, uint label, bool wide) {
304 mp_uint_t dest = get_label_dest(as, label);
305 mp_int_t rel = dest - as->base.code_offset;
306 rel -= 4; // account for instruction prefetch, PC is 4 bytes ahead of this instruction
307 if (!wide) {
308 asm_thumb_op16(as, OP_BCC_N(cond, rel));
309 return as->base.pass != MP_ASM_PASS_EMIT || SIGNED_FIT9(rel);
310 } else {
311 #if MICROPY_EMIT_THUMB_ARMV7M
312 asm_thumb_op32(as, OP_BCC_W_HI(cond, rel), OP_BCC_W_LO(rel));
313 return true;
314 #else
315 // this method should not be called for ARMV6M
316 return false;
317 #endif
318 }
319}
320
321#define OP_BL_HI(byte_offset) (0xf000 | (((byte_offset) >> 12) & 0x07ff))
322#define OP_BL_LO(byte_offset) (0xf800 | (((byte_offset) >> 1) & 0x07ff))
323
324bool asm_thumb_bl_label(asm_thumb_t *as, uint label) {
325 mp_uint_t dest = get_label_dest(as, label);
326 mp_int_t rel = dest - as->base.code_offset;
327 rel -= 4; // account for instruction prefetch, PC is 4 bytes ahead of this instruction
328 asm_thumb_op32(as, OP_BL_HI(rel), OP_BL_LO(rel));
329 return as->base.pass != MP_ASM_PASS_EMIT || SIGNED_FIT23(rel);
330}
331
332size_t asm_thumb_mov_reg_i32(asm_thumb_t *as, uint reg_dest, mp_uint_t i32) {
333 // movw, movt does it in 8 bytes
334 // ldr [pc, #], dw does it in 6 bytes, but we might not reach to end of code for dw
335
336 size_t loc = mp_asm_base_get_code_pos(&as->base);
337
338 #if MICROPY_EMIT_THUMB_ARMV7M
339 asm_thumb_mov_reg_i16(as, ASM_THUMB_OP_MOVW, reg_dest, i32);
340 asm_thumb_mov_reg_i16(as, ASM_THUMB_OP_MOVT, reg_dest, i32 >> 16);
341 #else
342 // should only be called with lo reg for ARMV6M
343 assert(reg_dest < ASM_THUMB_REG_R8);
344
345 // sanity check that generated code is aligned
346 assert(!as->base.code_base || !(3u & (uintptr_t)as->base.code_base));
347
348 // basically:
349 // (nop)
350 // ldr reg_dest, _data
351 // b 1f
352 // _data: .word i32
353 // 1:
354 if (as->base.code_offset & 2u) {
355 asm_thumb_op16(as, ASM_THUMB_OP_NOP);
356 }
357 asm_thumb_ldr_rlo_pcrel_i8(as, reg_dest, 0);
358 asm_thumb_op16(as, OP_B_N(2));
359 asm_thumb_op16(as, i32 & 0xffff);
360 asm_thumb_op16(as, i32 >> 16);
361 #endif
362
363 return loc;
364}
365
366void asm_thumb_mov_reg_i32_optimised(asm_thumb_t *as, uint reg_dest, int i32) {
367 if (reg_dest < 8 && UNSIGNED_FIT8(i32)) {
368 asm_thumb_mov_rlo_i8(as, reg_dest, i32);
369 } else {
370 #if MICROPY_EMIT_THUMB_ARMV7M
371 if (UNSIGNED_FIT16(i32)) {
372 asm_thumb_mov_reg_i16(as, ASM_THUMB_OP_MOVW, reg_dest, i32);
373 } else {
374 asm_thumb_mov_reg_i32(as, reg_dest, i32);
375 }
376 #else
377 uint rlo_dest = reg_dest;
378 assert(rlo_dest < ASM_THUMB_REG_R8); // should never be called for ARMV6M
379
380 bool negate = i32 < 0 && ((i32 + i32) & 0xffffffffu); // don't negate 0x80000000
381 if (negate) {
382 i32 = -i32;
383 }
384
385 uint clz = __builtin_clz(i32);
386 uint ctz = i32 ? __builtin_ctz(i32) : 0;
387 assert(clz + ctz <= 32);
388 if (clz + ctz >= 24) {
389 asm_thumb_mov_rlo_i8(as, rlo_dest, (i32 >> ctz) & 0xff);
390 asm_thumb_lsl_rlo_rlo_i5(as, rlo_dest, rlo_dest, ctz);
391 } else if (UNSIGNED_FIT16(i32)) {
392 asm_thumb_mov_rlo_i16(as, rlo_dest, i32);
393 } else {
394 if (negate) {
395 // no point in negating if we're storing in 32 bit anyway
396 negate = false;
397 i32 = -i32;
398 }
399 asm_thumb_mov_reg_i32(as, rlo_dest, i32);
400 }
401 if (negate) {
402 asm_thumb_neg_rlo_rlo(as, rlo_dest, rlo_dest);
403 }
404 #endif
405 }
406}
407
408#define OP_STR_TO_SP_OFFSET(rlo_dest, word_offset) (0x9000 | ((rlo_dest) << 8) | ((word_offset) & 0x00ff))
409#define OP_LDR_FROM_SP_OFFSET(rlo_dest, word_offset) (0x9800 | ((rlo_dest) << 8) | ((word_offset) & 0x00ff))
410
411static void asm_thumb_mov_local_check(asm_thumb_t *as, int word_offset) {
412 if (as->base.pass >= MP_ASM_PASS_EMIT) {
413 assert(word_offset >= 0);
414 if (!UNSIGNED_FIT8(word_offset)) {
415 mp_raise_NotImplementedError(MP_ERROR_TEXT("too many locals for native method"));
416 }
417 }
418}
419
420void asm_thumb_mov_local_reg(asm_thumb_t *as, int local_num, uint rlo_src) {
421 assert(rlo_src < ASM_THUMB_REG_R8);
422 int word_offset = local_num;
423 asm_thumb_mov_local_check(as, word_offset);
424 asm_thumb_op16(as, OP_STR_TO_SP_OFFSET(rlo_src, word_offset));
425}
426
427void asm_thumb_mov_reg_local(asm_thumb_t *as, uint rlo_dest, int local_num) {
428 assert(rlo_dest < ASM_THUMB_REG_R8);
429 int word_offset = local_num;
430 asm_thumb_mov_local_check(as, word_offset);
431 asm_thumb_op16(as, OP_LDR_FROM_SP_OFFSET(rlo_dest, word_offset));
432}
433
434#define OP_ADD_REG_SP_OFFSET(rlo_dest, word_offset) (0xa800 | ((rlo_dest) << 8) | ((word_offset) & 0x00ff))
435
436void asm_thumb_mov_reg_local_addr(asm_thumb_t *as, uint rlo_dest, int local_num) {
437 assert(rlo_dest < ASM_THUMB_REG_R8);
438 int word_offset = local_num;
439 assert(as->base.pass < MP_ASM_PASS_EMIT || word_offset >= 0);
440 asm_thumb_op16(as, OP_ADD_REG_SP_OFFSET(rlo_dest, word_offset));
441}
442
443void asm_thumb_mov_reg_pcrel(asm_thumb_t *as, uint rlo_dest, uint label) {
444 mp_uint_t dest = get_label_dest(as, label);
445 mp_int_t rel = dest - as->base.code_offset;
446 rel |= 1; // to stay in Thumb state when jumping to this address
447 #if MICROPY_EMIT_THUMB_ARMV7M
448 rel -= 4 + 4; // adjust for mov_reg_i16 and then PC+4 prefetch of add_reg_reg
449 asm_thumb_mov_reg_i16(as, ASM_THUMB_OP_MOVW, rlo_dest, rel); // 4 bytes
450 #else
451 rel -= 8 + 4; // adjust for four instructions and then PC+4 prefetch of add_reg_reg
452 // 6 bytes
453 asm_thumb_mov_rlo_i16(as, rlo_dest, rel);
454 // 2 bytes - not always needed, but we want to keep the size the same
455 asm_thumb_sxth_rlo_rlo(as, rlo_dest, rlo_dest);
456 #endif
457 asm_thumb_add_reg_reg(as, rlo_dest, ASM_THUMB_REG_R15); // 2 bytes
458}
459
460#if MICROPY_EMIT_THUMB_ARMV7M
461static inline void asm_thumb_ldr_reg_reg_i12(asm_thumb_t *as, uint reg_dest, uint reg_base, uint word_offset) {
462 asm_thumb_op32(as, OP_LDR_W_HI(reg_base), OP_LDR_W_LO(reg_dest, word_offset * 4));
463}
464#endif
465
466void asm_thumb_ldr_reg_reg_i12_optimised(asm_thumb_t *as, uint reg_dest, uint reg_base, uint word_offset) {
467 if (reg_dest < ASM_THUMB_REG_R8 && reg_base < ASM_THUMB_REG_R8 && UNSIGNED_FIT5(word_offset)) {
468 asm_thumb_ldr_rlo_rlo_i5(as, reg_dest, reg_base, word_offset);
469 } else {
470 #if MICROPY_EMIT_THUMB_ARMV7M
471 asm_thumb_ldr_reg_reg_i12(as, reg_dest, reg_base, word_offset);
472 #else
473 word_offset -= 31;
474 if (reg_dest < ASM_THUMB_REG_R8 && reg_base < ASM_THUMB_REG_R8) {
475 if (UNSIGNED_FIT8(word_offset) && (word_offset < 64 || reg_dest != reg_base)) {
476 if (word_offset < 64) {
477 if (reg_dest != reg_base) {
478 asm_thumb_mov_reg_reg(as, reg_dest, reg_base);
479 }
480 asm_thumb_add_rlo_i8(as, reg_dest, word_offset * 4);
481 } else {
482 asm_thumb_mov_rlo_i8(as, reg_dest, word_offset);
483 asm_thumb_lsl_rlo_rlo_i5(as, reg_dest, reg_dest, 2);
484 asm_thumb_add_rlo_rlo_rlo(as, reg_dest, reg_dest, reg_base);
485 }
486 } else {
487 if (reg_dest != reg_base) {
488 asm_thumb_mov_rlo_i16(as, reg_dest, word_offset * 4);
489 asm_thumb_add_rlo_rlo_rlo(as, reg_dest, reg_dest, reg_dest);
490 } else {
491 uint reg_other = reg_dest ^ 7;
492 asm_thumb_op16(as, OP_PUSH_RLIST((1 << reg_other)));
493 asm_thumb_mov_rlo_i16(as, reg_other, word_offset * 4);
494 asm_thumb_add_rlo_rlo_rlo(as, reg_dest, reg_dest, reg_other);
495 asm_thumb_op16(as, OP_POP_RLIST((1 << reg_other)));
496 }
497 }
498 } else {
499 assert(0); // should never be called for ARMV6M
500 }
501 asm_thumb_ldr_rlo_rlo_i5(as, reg_dest, reg_dest, 31);
502 #endif
503 }
504}
505
506// this could be wrong, because it should have a range of +/- 16MiB...
507#define OP_BW_HI(byte_offset) (0xf000 | (((byte_offset) >> 12) & 0x07ff))
508#define OP_BW_LO(byte_offset) (0xb800 | (((byte_offset) >> 1) & 0x07ff))
509
510void asm_thumb_b_label(asm_thumb_t *as, uint label) {
511 mp_uint_t dest = get_label_dest(as, label);
512 mp_int_t rel = dest - as->base.code_offset;
513 rel -= 4; // account for instruction prefetch, PC is 4 bytes ahead of this instruction
514 if (dest != (mp_uint_t)-1 && rel <= -4) {
515 // is a backwards jump, so we know the size of the jump on the first pass
516 // calculate rel assuming 12 bit relative jump
517 if (SIGNED_FIT12(rel)) {
518 asm_thumb_op16(as, OP_B_N(rel));
519 } else {
520 goto large_jump;
521 }
522 } else {
523 // is a forwards jump, so need to assume it's large
524 large_jump:
525 #if MICROPY_EMIT_THUMB_ARMV7M
526 asm_thumb_op32(as, OP_BW_HI(rel), OP_BW_LO(rel));
527 #else
528 if (SIGNED_FIT12(rel)) {
529 // this code path has to be the same number of instructions irrespective of rel
530 asm_thumb_op16(as, OP_B_N(rel));
531 } else {
532 asm_thumb_op16(as, ASM_THUMB_OP_NOP);
533 if (dest != (mp_uint_t)-1) {
534 // we have an actual branch > 12 bits; this is not handled yet
535 mp_raise_NotImplementedError(MP_ERROR_TEXT("native method too big"));
536 }
537 }
538 #endif
539 }
540}
541
542void asm_thumb_bcc_label(asm_thumb_t *as, int cond, uint label) {
543 mp_uint_t dest = get_label_dest(as, label);
544 mp_int_t rel = dest - as->base.code_offset;
545 rel -= 4; // account for instruction prefetch, PC is 4 bytes ahead of this instruction
546 if (dest != (mp_uint_t)-1 && rel <= -4) {
547 // is a backwards jump, so we know the size of the jump on the first pass
548 // calculate rel assuming 9 bit relative jump
549 if (SIGNED_FIT9(rel)) {
550 asm_thumb_op16(as, OP_BCC_N(cond, rel));
551 } else {
552 goto large_jump;
553 }
554 } else {
555 // is a forwards jump, so need to assume it's large
556 large_jump:
557 #if MICROPY_EMIT_THUMB_ARMV7M
558 asm_thumb_op32(as, OP_BCC_W_HI(cond, rel), OP_BCC_W_LO(rel));
559 #else
560 // reverse the sense of the branch to jump over a longer branch
561 asm_thumb_op16(as, OP_BCC_N(cond ^ 1, 0));
562 asm_thumb_b_label(as, label);
563 #endif
564 }
565}
566
567void asm_thumb_bcc_rel9(asm_thumb_t *as, int cond, int rel) {
568 rel -= 4; // account for instruction prefetch, PC is 4 bytes ahead of this instruction
569 assert(SIGNED_FIT9(rel));
570 asm_thumb_op16(as, OP_BCC_N(cond, rel));
571}
572
573void asm_thumb_b_rel12(asm_thumb_t *as, int rel) {
574 rel -= 4; // account for instruction prefetch, PC is 4 bytes ahead of this instruction
575 assert(SIGNED_FIT12(rel));
576 asm_thumb_op16(as, OP_B_N(rel));
577}
578
579#define OP_BLX(reg) (0x4780 | ((reg) << 3))
580#define OP_SVC(arg) (0xdf00 | (arg))
581
582void asm_thumb_bl_ind(asm_thumb_t *as, uint fun_id, uint reg_temp) {
583 // Load ptr to function from table, indexed by fun_id, then call it
584 asm_thumb_ldr_reg_reg_i12_optimised(as, reg_temp, ASM_THUMB_REG_FUN_TABLE, fun_id);
585 asm_thumb_op16(as, OP_BLX(reg_temp));
586}
587
588#endif // MICROPY_EMIT_THUMB || MICROPY_EMIT_INLINE_THUMB
589