1 | /* |
2 | * Copyright (c) 2019, Oracle and/or its affiliates. All rights reserved. |
3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 | * |
5 | * This code is free software; you can redistribute it and/or modify it |
6 | * under the terms of the GNU General Public License version 2 only, as |
7 | * published by the Free Software Foundation. |
8 | * |
9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
12 | * version 2 for more details (a copy is included in the LICENSE file that |
13 | * accompanied this code). |
14 | * |
15 | * You should have received a copy of the GNU General Public License version |
16 | * 2 along with this work; if not, write to the Free Software Foundation, |
17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
18 | * |
19 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
20 | * or visit www.oracle.com if you need additional information or have any |
21 | * questions. |
22 | * |
23 | */ |
24 | |
25 | #include "precompiled.hpp" |
26 | #include "runtime/atomic.hpp" |
27 | #include "runtime/orderAccess.hpp" |
28 | #include "runtime/os.hpp" |
29 | #include "utilities/waitBarrier_generic.hpp" |
30 | #include "utilities/spinYield.hpp" |
31 | |
32 | void GenericWaitBarrier::arm(int barrier_tag) { |
33 | assert(_barrier_tag == 0, "Already armed" ); |
34 | assert(_waiters == 0, "We left a thread hanging" ); |
35 | _barrier_tag = barrier_tag; |
36 | _waiters = 0; |
37 | OrderAccess::fence(); |
38 | } |
39 | |
40 | int GenericWaitBarrier::wake_if_needed() { |
41 | assert(_barrier_tag == 0, "Not disarmed" ); |
42 | int w = _waiters; |
43 | if (w == 0) { |
44 | // Load of _barrier_threads in caller must not pass the load of _waiters. |
45 | OrderAccess::loadload(); |
46 | return 0; |
47 | } |
48 | assert(w > 0, "Bad counting" ); |
49 | // We need an exact count which never goes below zero, |
50 | // otherwise the semaphore may be signalled too many times. |
51 | if (Atomic::cmpxchg(w - 1, &_waiters, w) == w) { |
52 | _sem_barrier.signal(); |
53 | return w - 1; |
54 | } |
55 | return w; |
56 | } |
57 | |
58 | void GenericWaitBarrier::disarm() { |
59 | assert(_barrier_tag != 0, "Not armed" ); |
60 | _barrier_tag = 0; |
61 | // Loads of _barrier_threads/_waiters must not float above disarm store and |
62 | // disarm store must not sink below. |
63 | OrderAccess::fence(); |
64 | int left; |
65 | SpinYield sp; |
66 | do { |
67 | left = GenericWaitBarrier::wake_if_needed(); |
68 | if (left == 0 && _barrier_threads > 0) { |
69 | // There is no thread to wake but we still have barrier threads. |
70 | sp.wait(); |
71 | } |
72 | // We must loop here until there are no waiters or potential waiters. |
73 | } while (left > 0 || _barrier_threads > 0); |
74 | // API specifies disarm() must provide a trailing fence. |
75 | OrderAccess::fence(); |
76 | } |
77 | |
78 | void GenericWaitBarrier::wait(int barrier_tag) { |
79 | assert(barrier_tag != 0, "Trying to wait on disarmed value" ); |
80 | if (barrier_tag != _barrier_tag) { |
81 | // API specifies wait() must provide a trailing fence. |
82 | OrderAccess::fence(); |
83 | return; |
84 | } |
85 | Atomic::add(1, &_barrier_threads); |
86 | if (barrier_tag != 0 && barrier_tag == _barrier_tag) { |
87 | Atomic::add(1, &_waiters); |
88 | _sem_barrier.wait(); |
89 | // We help out with posting, but we need to do so before we decrement the |
90 | // _barrier_threads otherwise we might wake threads up in next wait. |
91 | GenericWaitBarrier::wake_if_needed(); |
92 | } |
93 | Atomic::add(-1, &_barrier_threads); |
94 | } |
95 | |