1 | /* This file is autogenerated by tracetool, do not edit. */ |
2 | |
3 | #ifndef TRACE_HW_SCSI_GENERATED_TRACERS_H |
4 | #define TRACE_HW_SCSI_GENERATED_TRACERS_H |
5 | |
6 | #include "trace/control.h" |
7 | |
8 | extern TraceEvent _TRACE_SCSI_REQ_ALLOC_EVENT; |
9 | extern TraceEvent _TRACE_SCSI_REQ_CANCEL_EVENT; |
10 | extern TraceEvent _TRACE_SCSI_REQ_DATA_EVENT; |
11 | extern TraceEvent _TRACE_SCSI_REQ_DATA_CANCELED_EVENT; |
12 | extern TraceEvent _TRACE_SCSI_REQ_DEQUEUE_EVENT; |
13 | extern TraceEvent _TRACE_SCSI_REQ_CONTINUE_EVENT; |
14 | extern TraceEvent _TRACE_SCSI_REQ_CONTINUE_CANCELED_EVENT; |
15 | extern TraceEvent _TRACE_SCSI_REQ_PARSED_EVENT; |
16 | extern TraceEvent _TRACE_SCSI_REQ_PARSED_LBA_EVENT; |
17 | extern TraceEvent _TRACE_SCSI_REQ_PARSE_BAD_EVENT; |
18 | extern TraceEvent _TRACE_SCSI_REQ_BUILD_SENSE_EVENT; |
19 | extern TraceEvent _TRACE_SCSI_DEVICE_SET_UA_EVENT; |
20 | extern TraceEvent _TRACE_SCSI_REPORT_LUNS_EVENT; |
21 | extern TraceEvent _TRACE_SCSI_INQUIRY_EVENT; |
22 | extern TraceEvent _TRACE_SCSI_TEST_UNIT_READY_EVENT; |
23 | extern TraceEvent _TRACE_SCSI_REQUEST_SENSE_EVENT; |
24 | extern TraceEvent _TRACE_MPTSAS_COMMAND_COMPLETE_EVENT; |
25 | extern TraceEvent _TRACE_MPTSAS_DIAG_READ_EVENT; |
26 | extern TraceEvent _TRACE_MPTSAS_DIAG_WRITE_EVENT; |
27 | extern TraceEvent _TRACE_MPTSAS_IRQ_INTX_EVENT; |
28 | extern TraceEvent _TRACE_MPTSAS_IRQ_MSI_EVENT; |
29 | extern TraceEvent _TRACE_MPTSAS_MMIO_READ_EVENT; |
30 | extern TraceEvent _TRACE_MPTSAS_MMIO_UNHANDLED_READ_EVENT; |
31 | extern TraceEvent _TRACE_MPTSAS_MMIO_UNHANDLED_WRITE_EVENT; |
32 | extern TraceEvent _TRACE_MPTSAS_MMIO_WRITE_EVENT; |
33 | extern TraceEvent _TRACE_MPTSAS_PROCESS_MESSAGE_EVENT; |
34 | extern TraceEvent _TRACE_MPTSAS_PROCESS_SCSI_IO_REQUEST_EVENT; |
35 | extern TraceEvent _TRACE_MPTSAS_RESET_EVENT; |
36 | extern TraceEvent _TRACE_MPTSAS_SCSI_OVERFLOW_EVENT; |
37 | extern TraceEvent _TRACE_MPTSAS_SGL_OVERFLOW_EVENT; |
38 | extern TraceEvent _TRACE_MPTSAS_UNHANDLED_CMD_EVENT; |
39 | extern TraceEvent _TRACE_MPTSAS_UNHANDLED_DOORBELL_CMD_EVENT; |
40 | extern TraceEvent _TRACE_MPTSAS_CONFIG_SAS_DEVICE_EVENT; |
41 | extern TraceEvent _TRACE_MPTSAS_CONFIG_SAS_PHY_EVENT; |
42 | extern TraceEvent _TRACE_MEGASAS_INIT_FIRMWARE_EVENT; |
43 | extern TraceEvent _TRACE_MEGASAS_INIT_QUEUE_EVENT; |
44 | extern TraceEvent _TRACE_MEGASAS_INITQ_MAP_FAILED_EVENT; |
45 | extern TraceEvent _TRACE_MEGASAS_INITQ_MAPPED_EVENT; |
46 | extern TraceEvent _TRACE_MEGASAS_INITQ_MISMATCH_EVENT; |
47 | extern TraceEvent _TRACE_MEGASAS_QF_MAPPED_EVENT; |
48 | extern TraceEvent _TRACE_MEGASAS_QF_NEW_EVENT; |
49 | extern TraceEvent _TRACE_MEGASAS_QF_BUSY_EVENT; |
50 | extern TraceEvent _TRACE_MEGASAS_QF_ENQUEUE_EVENT; |
51 | extern TraceEvent _TRACE_MEGASAS_QF_UPDATE_EVENT; |
52 | extern TraceEvent _TRACE_MEGASAS_QF_MAP_FAILED_EVENT; |
53 | extern TraceEvent _TRACE_MEGASAS_QF_COMPLETE_NOIRQ_EVENT; |
54 | extern TraceEvent _TRACE_MEGASAS_QF_COMPLETE_EVENT; |
55 | extern TraceEvent _TRACE_MEGASAS_FRAME_BUSY_EVENT; |
56 | extern TraceEvent _TRACE_MEGASAS_UNHANDLED_FRAME_CMD_EVENT; |
57 | extern TraceEvent _TRACE_MEGASAS_HANDLE_SCSI_EVENT; |
58 | extern TraceEvent _TRACE_MEGASAS_SCSI_TARGET_NOT_PRESENT_EVENT; |
59 | extern TraceEvent _TRACE_MEGASAS_SCSI_INVALID_CDB_LEN_EVENT; |
60 | extern TraceEvent _TRACE_MEGASAS_IOV_READ_OVERFLOW_EVENT; |
61 | extern TraceEvent _TRACE_MEGASAS_IOV_WRITE_OVERFLOW_EVENT; |
62 | extern TraceEvent _TRACE_MEGASAS_IOV_READ_UNDERFLOW_EVENT; |
63 | extern TraceEvent _TRACE_MEGASAS_IOV_WRITE_UNDERFLOW_EVENT; |
64 | extern TraceEvent _TRACE_MEGASAS_SCSI_REQ_ALLOC_FAILED_EVENT; |
65 | extern TraceEvent _TRACE_MEGASAS_SCSI_READ_START_EVENT; |
66 | extern TraceEvent _TRACE_MEGASAS_SCSI_WRITE_START_EVENT; |
67 | extern TraceEvent _TRACE_MEGASAS_SCSI_NODATA_EVENT; |
68 | extern TraceEvent _TRACE_MEGASAS_SCSI_COMPLETE_EVENT; |
69 | extern TraceEvent _TRACE_MEGASAS_COMMAND_COMPLETE_EVENT; |
70 | extern TraceEvent _TRACE_MEGASAS_HANDLE_IO_EVENT; |
71 | extern TraceEvent _TRACE_MEGASAS_IO_TARGET_NOT_PRESENT_EVENT; |
72 | extern TraceEvent _TRACE_MEGASAS_IO_READ_START_EVENT; |
73 | extern TraceEvent _TRACE_MEGASAS_IO_WRITE_START_EVENT; |
74 | extern TraceEvent _TRACE_MEGASAS_IO_COMPLETE_EVENT; |
75 | extern TraceEvent _TRACE_MEGASAS_IOVEC_SGL_OVERFLOW_EVENT; |
76 | extern TraceEvent _TRACE_MEGASAS_IOVEC_SGL_UNDERFLOW_EVENT; |
77 | extern TraceEvent _TRACE_MEGASAS_IOVEC_SGL_INVALID_EVENT; |
78 | extern TraceEvent _TRACE_MEGASAS_IOVEC_OVERFLOW_EVENT; |
79 | extern TraceEvent _TRACE_MEGASAS_IOVEC_UNDERFLOW_EVENT; |
80 | extern TraceEvent _TRACE_MEGASAS_HANDLE_DCMD_EVENT; |
81 | extern TraceEvent _TRACE_MEGASAS_FINISH_DCMD_EVENT; |
82 | extern TraceEvent _TRACE_MEGASAS_DCMD_REQ_ALLOC_FAILED_EVENT; |
83 | extern TraceEvent _TRACE_MEGASAS_DCMD_INTERNAL_SUBMIT_EVENT; |
84 | extern TraceEvent _TRACE_MEGASAS_DCMD_INTERNAL_FINISH_EVENT; |
85 | extern TraceEvent _TRACE_MEGASAS_DCMD_INTERNAL_INVALID_EVENT; |
86 | extern TraceEvent _TRACE_MEGASAS_DCMD_UNHANDLED_EVENT; |
87 | extern TraceEvent _TRACE_MEGASAS_DCMD_ZERO_SGE_EVENT; |
88 | extern TraceEvent _TRACE_MEGASAS_DCMD_INVALID_SGE_EVENT; |
89 | extern TraceEvent _TRACE_MEGASAS_DCMD_INVALID_XFER_LEN_EVENT; |
90 | extern TraceEvent _TRACE_MEGASAS_DCMD_ENTER_EVENT; |
91 | extern TraceEvent _TRACE_MEGASAS_DCMD_DUMMY_EVENT; |
92 | extern TraceEvent _TRACE_MEGASAS_DCMD_SET_FW_TIME_EVENT; |
93 | extern TraceEvent _TRACE_MEGASAS_DCMD_PD_GET_LIST_EVENT; |
94 | extern TraceEvent _TRACE_MEGASAS_DCMD_LD_GET_LIST_EVENT; |
95 | extern TraceEvent _TRACE_MEGASAS_DCMD_LD_GET_INFO_EVENT; |
96 | extern TraceEvent _TRACE_MEGASAS_DCMD_LD_LIST_QUERY_EVENT; |
97 | extern TraceEvent _TRACE_MEGASAS_DCMD_PD_GET_INFO_EVENT; |
98 | extern TraceEvent _TRACE_MEGASAS_DCMD_PD_LIST_QUERY_EVENT; |
99 | extern TraceEvent _TRACE_MEGASAS_DCMD_RESET_LD_EVENT; |
100 | extern TraceEvent _TRACE_MEGASAS_DCMD_UNSUPPORTED_EVENT; |
101 | extern TraceEvent _TRACE_MEGASAS_ABORT_FRAME_EVENT; |
102 | extern TraceEvent _TRACE_MEGASAS_ABORT_NO_CMD_EVENT; |
103 | extern TraceEvent _TRACE_MEGASAS_ABORT_INVALID_CONTEXT_EVENT; |
104 | extern TraceEvent _TRACE_MEGASAS_RESET_EVENT; |
105 | extern TraceEvent _TRACE_MEGASAS_INIT_EVENT; |
106 | extern TraceEvent _TRACE_MEGASAS_MSIX_RAISE_EVENT; |
107 | extern TraceEvent _TRACE_MEGASAS_MSI_RAISE_EVENT; |
108 | extern TraceEvent _TRACE_MEGASAS_IRQ_LOWER_EVENT; |
109 | extern TraceEvent _TRACE_MEGASAS_IRQ_RAISE_EVENT; |
110 | extern TraceEvent _TRACE_MEGASAS_INTR_ENABLED_EVENT; |
111 | extern TraceEvent _TRACE_MEGASAS_INTR_DISABLED_EVENT; |
112 | extern TraceEvent _TRACE_MEGASAS_MSIX_ENABLED_EVENT; |
113 | extern TraceEvent _TRACE_MEGASAS_MSI_ENABLED_EVENT; |
114 | extern TraceEvent _TRACE_MEGASAS_MMIO_READL_EVENT; |
115 | extern TraceEvent _TRACE_MEGASAS_MMIO_INVALID_READL_EVENT; |
116 | extern TraceEvent _TRACE_MEGASAS_MMIO_WRITEL_EVENT; |
117 | extern TraceEvent _TRACE_MEGASAS_MMIO_INVALID_WRITEL_EVENT; |
118 | extern TraceEvent _TRACE_PVSCSI_RING_INIT_DATA_EVENT; |
119 | extern TraceEvent _TRACE_PVSCSI_RING_INIT_MSG_EVENT; |
120 | extern TraceEvent _TRACE_PVSCSI_RING_FLUSH_CMP_EVENT; |
121 | extern TraceEvent _TRACE_PVSCSI_RING_FLUSH_MSG_EVENT; |
122 | extern TraceEvent _TRACE_PVSCSI_UPDATE_IRQ_LEVEL_EVENT; |
123 | extern TraceEvent _TRACE_PVSCSI_UPDATE_IRQ_MSI_EVENT; |
124 | extern TraceEvent _TRACE_PVSCSI_CMP_RING_PUT_EVENT; |
125 | extern TraceEvent _TRACE_PVSCSI_MSG_RING_PUT_EVENT; |
126 | extern TraceEvent _TRACE_PVSCSI_COMPLETE_REQUEST_EVENT; |
127 | extern TraceEvent _TRACE_PVSCSI_GET_SG_LIST_EVENT; |
128 | extern TraceEvent _TRACE_PVSCSI_GET_NEXT_SG_ELEM_EVENT; |
129 | extern TraceEvent _TRACE_PVSCSI_COMMAND_COMPLETE_NOT_FOUND_EVENT; |
130 | extern TraceEvent _TRACE_PVSCSI_COMMAND_COMPLETE_DATA_RUN_EVENT; |
131 | extern TraceEvent _TRACE_PVSCSI_COMMAND_COMPLETE_SENSE_LEN_EVENT; |
132 | extern TraceEvent _TRACE_PVSCSI_CONVERT_SGLIST_EVENT; |
133 | extern TraceEvent _TRACE_PVSCSI_PROCESS_REQ_DESCR_EVENT; |
134 | extern TraceEvent _TRACE_PVSCSI_PROCESS_REQ_DESCR_UNKNOWN_DEVICE_EVENT; |
135 | extern TraceEvent _TRACE_PVSCSI_PROCESS_REQ_DESCR_INVALID_DIR_EVENT; |
136 | extern TraceEvent _TRACE_PVSCSI_PROCESS_IO_EVENT; |
137 | extern TraceEvent _TRACE_PVSCSI_ON_CMD_NOIMPL_EVENT; |
138 | extern TraceEvent _TRACE_PVSCSI_ON_CMD_RESET_DEV_EVENT; |
139 | extern TraceEvent _TRACE_PVSCSI_ON_CMD_ARRIVED_EVENT; |
140 | extern TraceEvent _TRACE_PVSCSI_ON_CMD_ABORT_EVENT; |
141 | extern TraceEvent _TRACE_PVSCSI_ON_CMD_UNKNOWN_EVENT; |
142 | extern TraceEvent _TRACE_PVSCSI_ON_CMD_UNKNOWN_DATA_EVENT; |
143 | extern TraceEvent _TRACE_PVSCSI_IO_WRITE_EVENT; |
144 | extern TraceEvent _TRACE_PVSCSI_IO_WRITE_UNKNOWN_EVENT; |
145 | extern TraceEvent _TRACE_PVSCSI_IO_READ_EVENT; |
146 | extern TraceEvent _TRACE_PVSCSI_IO_READ_UNKNOWN_EVENT; |
147 | extern TraceEvent _TRACE_PVSCSI_INIT_MSI_FAIL_EVENT; |
148 | extern TraceEvent _TRACE_PVSCSI_STATE_EVENT; |
149 | extern TraceEvent _TRACE_PVSCSI_TX_RINGS_PPN_EVENT; |
150 | extern TraceEvent _TRACE_PVSCSI_TX_RINGS_NUM_PAGES_EVENT; |
151 | extern TraceEvent _TRACE_ESP_ERROR_FIFO_OVERRUN_EVENT; |
152 | extern TraceEvent _TRACE_ESP_ERROR_UNHANDLED_COMMAND_EVENT; |
153 | extern TraceEvent _TRACE_ESP_ERROR_INVALID_WRITE_EVENT; |
154 | extern TraceEvent _TRACE_ESP_RAISE_IRQ_EVENT; |
155 | extern TraceEvent _TRACE_ESP_LOWER_IRQ_EVENT; |
156 | extern TraceEvent _TRACE_ESP_DMA_ENABLE_EVENT; |
157 | extern TraceEvent _TRACE_ESP_DMA_DISABLE_EVENT; |
158 | extern TraceEvent _TRACE_ESP_GET_CMD_EVENT; |
159 | extern TraceEvent _TRACE_ESP_DO_BUSID_CMD_EVENT; |
160 | extern TraceEvent _TRACE_ESP_HANDLE_SATN_STOP_EVENT; |
161 | extern TraceEvent _TRACE_ESP_WRITE_RESPONSE_EVENT; |
162 | extern TraceEvent _TRACE_ESP_DO_DMA_EVENT; |
163 | extern TraceEvent _TRACE_ESP_COMMAND_COMPLETE_EVENT; |
164 | extern TraceEvent _TRACE_ESP_COMMAND_COMPLETE_DEFERRED_EVENT; |
165 | extern TraceEvent _TRACE_ESP_COMMAND_COMPLETE_UNEXPECTED_EVENT; |
166 | extern TraceEvent _TRACE_ESP_COMMAND_COMPLETE_FAIL_EVENT; |
167 | extern TraceEvent _TRACE_ESP_TRANSFER_DATA_EVENT; |
168 | extern TraceEvent _TRACE_ESP_HANDLE_TI_EVENT; |
169 | extern TraceEvent _TRACE_ESP_HANDLE_TI_CMD_EVENT; |
170 | extern TraceEvent _TRACE_ESP_MEM_READB_EVENT; |
171 | extern TraceEvent _TRACE_ESP_MEM_WRITEB_EVENT; |
172 | extern TraceEvent _TRACE_ESP_MEM_WRITEB_CMD_NOP_EVENT; |
173 | extern TraceEvent _TRACE_ESP_MEM_WRITEB_CMD_FLUSH_EVENT; |
174 | extern TraceEvent _TRACE_ESP_MEM_WRITEB_CMD_RESET_EVENT; |
175 | extern TraceEvent _TRACE_ESP_MEM_WRITEB_CMD_BUS_RESET_EVENT; |
176 | extern TraceEvent _TRACE_ESP_MEM_WRITEB_CMD_ICCS_EVENT; |
177 | extern TraceEvent _TRACE_ESP_MEM_WRITEB_CMD_MSGACC_EVENT; |
178 | extern TraceEvent _TRACE_ESP_MEM_WRITEB_CMD_PAD_EVENT; |
179 | extern TraceEvent _TRACE_ESP_MEM_WRITEB_CMD_SATN_EVENT; |
180 | extern TraceEvent _TRACE_ESP_MEM_WRITEB_CMD_RSTATN_EVENT; |
181 | extern TraceEvent _TRACE_ESP_MEM_WRITEB_CMD_SEL_EVENT; |
182 | extern TraceEvent _TRACE_ESP_MEM_WRITEB_CMD_SELATN_EVENT; |
183 | extern TraceEvent _TRACE_ESP_MEM_WRITEB_CMD_SELATNS_EVENT; |
184 | extern TraceEvent _TRACE_ESP_MEM_WRITEB_CMD_ENSEL_EVENT; |
185 | extern TraceEvent _TRACE_ESP_MEM_WRITEB_CMD_DISSEL_EVENT; |
186 | extern TraceEvent _TRACE_ESP_PCI_ERROR_INVALID_DMA_DIRECTION_EVENT; |
187 | extern TraceEvent _TRACE_ESP_PCI_ERROR_INVALID_READ_EVENT; |
188 | extern TraceEvent _TRACE_ESP_PCI_ERROR_INVALID_WRITE_EVENT; |
189 | extern TraceEvent _TRACE_ESP_PCI_ERROR_INVALID_WRITE_DMA_EVENT; |
190 | extern TraceEvent _TRACE_ESP_PCI_DMA_READ_EVENT; |
191 | extern TraceEvent _TRACE_ESP_PCI_DMA_WRITE_EVENT; |
192 | extern TraceEvent _TRACE_ESP_PCI_DMA_IDLE_EVENT; |
193 | extern TraceEvent _TRACE_ESP_PCI_DMA_BLAST_EVENT; |
194 | extern TraceEvent _TRACE_ESP_PCI_DMA_ABORT_EVENT; |
195 | extern TraceEvent _TRACE_ESP_PCI_DMA_START_EVENT; |
196 | extern TraceEvent _TRACE_ESP_PCI_SBAC_READ_EVENT; |
197 | extern TraceEvent _TRACE_ESP_PCI_SBAC_WRITE_EVENT; |
198 | extern TraceEvent _TRACE_SPAPR_VSCSI_SEND_RSP_EVENT; |
199 | extern TraceEvent _TRACE_SPAPR_VSCSI_FETCH_DESC_NO_DATA_EVENT; |
200 | extern TraceEvent _TRACE_SPAPR_VSCSI_FETCH_DESC_DIRECT_EVENT; |
201 | extern TraceEvent _TRACE_SPAPR_VSCSI_FETCH_DESC_INDIRECT_EVENT; |
202 | extern TraceEvent _TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_RANGE_EVENT; |
203 | extern TraceEvent _TRACE_SPAPR_VSCSI_FETCH_DESC_DMA_READ_ERROR_EVENT; |
204 | extern TraceEvent _TRACE_SPAPR_VSCSI_FETCH_DESC_INDIRECT_SEG_EXT_EVENT; |
205 | extern TraceEvent _TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_DESC_EVENT; |
206 | extern TraceEvent _TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_DESC_BOUNDARY_EVENT; |
207 | extern TraceEvent _TRACE_SPAPR_VSCSI_FETCH_DESC_DONE_EVENT; |
208 | extern TraceEvent _TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_EVENT; |
209 | extern TraceEvent _TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_RW_EVENT; |
210 | extern TraceEvent _TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_BUF_EVENT; |
211 | extern TraceEvent _TRACE_SPAPR_VSCSI_SRP_TRANSFER_DATA_EVENT; |
212 | extern TraceEvent _TRACE_SPAPR_VSCSI_TRANSFER_DATA_EVENT; |
213 | extern TraceEvent _TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_EVENT; |
214 | extern TraceEvent _TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_SENSE_DATA1_EVENT; |
215 | extern TraceEvent _TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_SENSE_DATA2_EVENT; |
216 | extern TraceEvent _TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_STATUS_EVENT; |
217 | extern TraceEvent _TRACE_SPAPR_VSCSI_SAVE_REQUEST_EVENT; |
218 | extern TraceEvent _TRACE_SPAPR_VSCSI_LOAD_REQUEST_EVENT; |
219 | extern TraceEvent _TRACE_SPAPR_VSCSI_PROCESS_LOGIN_EVENT; |
220 | extern TraceEvent _TRACE_SPAPR_VSCSI_QUEUE_CMD_NO_DRIVE_EVENT; |
221 | extern TraceEvent _TRACE_SPAPR_VSCSI_QUEUE_CMD_EVENT; |
222 | extern TraceEvent _TRACE_SPAPR_VSCSI_DO_CRQ_EVENT; |
223 | extern TraceEvent _TRACE_LSI_RESET_EVENT; |
224 | extern TraceEvent _TRACE_LSI_UPDATE_IRQ_EVENT; |
225 | extern TraceEvent _TRACE_LSI_UPDATE_IRQ_DISCONNECTED_EVENT; |
226 | extern TraceEvent _TRACE_LSI_SCRIPT_SCSI_INTERRUPT_EVENT; |
227 | extern TraceEvent _TRACE_LSI_SCRIPT_DMA_INTERRUPT_EVENT; |
228 | extern TraceEvent _TRACE_LSI_BAD_PHASE_JUMP_EVENT; |
229 | extern TraceEvent _TRACE_LSI_BAD_PHASE_INTERRUPT_EVENT; |
230 | extern TraceEvent _TRACE_LSI_BAD_SELECTION_EVENT; |
231 | extern TraceEvent _TRACE_LSI_DO_DMA_UNAVAILABLE_EVENT; |
232 | extern TraceEvent _TRACE_LSI_DO_DMA_EVENT; |
233 | extern TraceEvent _TRACE_LSI_QUEUE_COMMAND_EVENT; |
234 | extern TraceEvent _TRACE_LSI_ADD_MSG_BYTE_ERROR_EVENT; |
235 | extern TraceEvent _TRACE_LSI_ADD_MSG_BYTE_EVENT; |
236 | extern TraceEvent _TRACE_LSI_RESELECT_EVENT; |
237 | extern TraceEvent _TRACE_LSI_QUEUE_REQ_ERROR_EVENT; |
238 | extern TraceEvent _TRACE_LSI_QUEUE_REQ_EVENT; |
239 | extern TraceEvent _TRACE_LSI_COMMAND_COMPLETE_EVENT; |
240 | extern TraceEvent _TRACE_LSI_TRANSFER_DATA_EVENT; |
241 | extern TraceEvent _TRACE_LSI_DO_COMMAND_EVENT; |
242 | extern TraceEvent _TRACE_LSI_DO_STATUS_EVENT; |
243 | extern TraceEvent _TRACE_LSI_DO_STATUS_ERROR_EVENT; |
244 | extern TraceEvent _TRACE_LSI_DO_MSGIN_EVENT; |
245 | extern TraceEvent _TRACE_LSI_DO_MSGOUT_EVENT; |
246 | extern TraceEvent _TRACE_LSI_DO_MSGOUT_DISCONNECT_EVENT; |
247 | extern TraceEvent _TRACE_LSI_DO_MSGOUT_NOOP_EVENT; |
248 | extern TraceEvent _TRACE_LSI_DO_MSGOUT_EXTENDED_EVENT; |
249 | extern TraceEvent _TRACE_LSI_DO_MSGOUT_IGNORED_EVENT; |
250 | extern TraceEvent _TRACE_LSI_DO_MSGOUT_SIMPLEQUEUE_EVENT; |
251 | extern TraceEvent _TRACE_LSI_DO_MSGOUT_ABORT_EVENT; |
252 | extern TraceEvent _TRACE_LSI_DO_MSGOUT_CLEARQUEUE_EVENT; |
253 | extern TraceEvent _TRACE_LSI_DO_MSGOUT_BUSDEVICERESET_EVENT; |
254 | extern TraceEvent _TRACE_LSI_DO_MSGOUT_SELECT_EVENT; |
255 | extern TraceEvent _TRACE_LSI_MEMCPY_EVENT; |
256 | extern TraceEvent _TRACE_LSI_WAIT_RESELECT_EVENT; |
257 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_EVENT; |
258 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_BLOCKMOVE_DELAYED_EVENT; |
259 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_BLOCKMOVE_BADPHASE_EVENT; |
260 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_IO_ALREADYRESELECTED_EVENT; |
261 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_IO_SELECTED_EVENT; |
262 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_IO_DISCONNECT_EVENT; |
263 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_IO_SET_EVENT; |
264 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_IO_CLEAR_EVENT; |
265 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_IO_OPCODE_EVENT; |
266 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_TC_NOP_EVENT; |
267 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_TC_DELAYEDSELECT_TIMEOUT_EVENT; |
268 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_TC_COMPC_EVENT; |
269 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_TC_COMPP_EVENT; |
270 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_TC_COMPD_EVENT; |
271 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_TC_JUMP_EVENT; |
272 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_TC_CALL_EVENT; |
273 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_TC_RETURN_EVENT; |
274 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_TC_INTERRUPT_EVENT; |
275 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_TC_ILLEGAL_EVENT; |
276 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_TC_CC_FAILED_EVENT; |
277 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_MM_LOAD_EVENT; |
278 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_MM_STORE_EVENT; |
279 | extern TraceEvent _TRACE_LSI_EXECUTE_SCRIPT_STOP_EVENT; |
280 | extern TraceEvent _TRACE_LSI_AWOKEN_EVENT; |
281 | extern TraceEvent _TRACE_LSI_REG_READ_EVENT; |
282 | extern TraceEvent _TRACE_LSI_REG_WRITE_EVENT; |
283 | extern TraceEvent _TRACE_SCSI_DISK_CHECK_CONDITION_EVENT; |
284 | extern TraceEvent _TRACE_SCSI_DISK_READ_COMPLETE_EVENT; |
285 | extern TraceEvent _TRACE_SCSI_DISK_READ_DATA_COUNT_EVENT; |
286 | extern TraceEvent _TRACE_SCSI_DISK_READ_DATA_INVALID_EVENT; |
287 | extern TraceEvent _TRACE_SCSI_DISK_WRITE_COMPLETE_NOIO_EVENT; |
288 | extern TraceEvent _TRACE_SCSI_DISK_WRITE_DATA_INVALID_EVENT; |
289 | extern TraceEvent _TRACE_SCSI_DISK_EMULATE_VPD_PAGE_00_EVENT; |
290 | extern TraceEvent _TRACE_SCSI_DISK_EMULATE_VPD_PAGE_80_NOT_SUPPORTED_EVENT; |
291 | extern TraceEvent _TRACE_SCSI_DISK_EMULATE_VPD_PAGE_80_EVENT; |
292 | extern TraceEvent _TRACE_SCSI_DISK_EMULATE_VPD_PAGE_83_EVENT; |
293 | extern TraceEvent _TRACE_SCSI_DISK_EMULATE_VPD_PAGE_B0_NOT_SUPPORTED_EVENT; |
294 | extern TraceEvent _TRACE_SCSI_DISK_EMULATE_MODE_SENSE_EVENT; |
295 | extern TraceEvent _TRACE_SCSI_DISK_EMULATE_READ_TOC_EVENT; |
296 | extern TraceEvent _TRACE_SCSI_DISK_EMULATE_READ_DATA_EVENT; |
297 | extern TraceEvent _TRACE_SCSI_DISK_EMULATE_WRITE_DATA_EVENT; |
298 | extern TraceEvent _TRACE_SCSI_DISK_EMULATE_COMMAND_SAI_16_EVENT; |
299 | extern TraceEvent _TRACE_SCSI_DISK_EMULATE_COMMAND_SAI_UNSUPPORTED_EVENT; |
300 | extern TraceEvent _TRACE_SCSI_DISK_EMULATE_COMMAND_SEEK_10_EVENT; |
301 | extern TraceEvent _TRACE_SCSI_DISK_EMULATE_COMMAND_MODE_SELECT_EVENT; |
302 | extern TraceEvent _TRACE_SCSI_DISK_EMULATE_COMMAND_MODE_SELECT_10_EVENT; |
303 | extern TraceEvent _TRACE_SCSI_DISK_EMULATE_COMMAND_UNMAP_EVENT; |
304 | extern TraceEvent _TRACE_SCSI_DISK_EMULATE_COMMAND_VERIFY_EVENT; |
305 | extern TraceEvent _TRACE_SCSI_DISK_EMULATE_COMMAND_WRITE_SAME_EVENT; |
306 | extern TraceEvent _TRACE_SCSI_DISK_EMULATE_COMMAND_UNKNOWN_EVENT; |
307 | extern TraceEvent _TRACE_SCSI_DISK_DMA_COMMAND_READ_EVENT; |
308 | extern TraceEvent _TRACE_SCSI_DISK_DMA_COMMAND_WRITE_EVENT; |
309 | extern TraceEvent _TRACE_SCSI_DISK_NEW_REQUEST_EVENT; |
310 | extern TraceEvent _TRACE_SCSI_GENERIC_COMMAND_COMPLETE_NOIO_EVENT; |
311 | extern TraceEvent _TRACE_SCSI_GENERIC_READ_COMPLETE_EVENT; |
312 | extern TraceEvent _TRACE_SCSI_GENERIC_READ_DATA_EVENT; |
313 | extern TraceEvent _TRACE_SCSI_GENERIC_WRITE_COMPLETE_EVENT; |
314 | extern TraceEvent _TRACE_SCSI_GENERIC_WRITE_COMPLETE_BLOCKSIZE_EVENT; |
315 | extern TraceEvent _TRACE_SCSI_GENERIC_WRITE_DATA_EVENT; |
316 | extern TraceEvent _TRACE_SCSI_GENERIC_SEND_COMMAND_EVENT; |
317 | extern TraceEvent _TRACE_SCSI_GENERIC_REALIZE_TYPE_EVENT; |
318 | extern TraceEvent _TRACE_SCSI_GENERIC_REALIZE_BLOCKSIZE_EVENT; |
319 | extern uint16_t _TRACE_SCSI_REQ_ALLOC_DSTATE; |
320 | extern uint16_t _TRACE_SCSI_REQ_CANCEL_DSTATE; |
321 | extern uint16_t _TRACE_SCSI_REQ_DATA_DSTATE; |
322 | extern uint16_t _TRACE_SCSI_REQ_DATA_CANCELED_DSTATE; |
323 | extern uint16_t _TRACE_SCSI_REQ_DEQUEUE_DSTATE; |
324 | extern uint16_t _TRACE_SCSI_REQ_CONTINUE_DSTATE; |
325 | extern uint16_t _TRACE_SCSI_REQ_CONTINUE_CANCELED_DSTATE; |
326 | extern uint16_t _TRACE_SCSI_REQ_PARSED_DSTATE; |
327 | extern uint16_t _TRACE_SCSI_REQ_PARSED_LBA_DSTATE; |
328 | extern uint16_t _TRACE_SCSI_REQ_PARSE_BAD_DSTATE; |
329 | extern uint16_t _TRACE_SCSI_REQ_BUILD_SENSE_DSTATE; |
330 | extern uint16_t _TRACE_SCSI_DEVICE_SET_UA_DSTATE; |
331 | extern uint16_t _TRACE_SCSI_REPORT_LUNS_DSTATE; |
332 | extern uint16_t _TRACE_SCSI_INQUIRY_DSTATE; |
333 | extern uint16_t _TRACE_SCSI_TEST_UNIT_READY_DSTATE; |
334 | extern uint16_t _TRACE_SCSI_REQUEST_SENSE_DSTATE; |
335 | extern uint16_t _TRACE_MPTSAS_COMMAND_COMPLETE_DSTATE; |
336 | extern uint16_t _TRACE_MPTSAS_DIAG_READ_DSTATE; |
337 | extern uint16_t _TRACE_MPTSAS_DIAG_WRITE_DSTATE; |
338 | extern uint16_t _TRACE_MPTSAS_IRQ_INTX_DSTATE; |
339 | extern uint16_t _TRACE_MPTSAS_IRQ_MSI_DSTATE; |
340 | extern uint16_t _TRACE_MPTSAS_MMIO_READ_DSTATE; |
341 | extern uint16_t _TRACE_MPTSAS_MMIO_UNHANDLED_READ_DSTATE; |
342 | extern uint16_t _TRACE_MPTSAS_MMIO_UNHANDLED_WRITE_DSTATE; |
343 | extern uint16_t _TRACE_MPTSAS_MMIO_WRITE_DSTATE; |
344 | extern uint16_t _TRACE_MPTSAS_PROCESS_MESSAGE_DSTATE; |
345 | extern uint16_t _TRACE_MPTSAS_PROCESS_SCSI_IO_REQUEST_DSTATE; |
346 | extern uint16_t _TRACE_MPTSAS_RESET_DSTATE; |
347 | extern uint16_t _TRACE_MPTSAS_SCSI_OVERFLOW_DSTATE; |
348 | extern uint16_t _TRACE_MPTSAS_SGL_OVERFLOW_DSTATE; |
349 | extern uint16_t _TRACE_MPTSAS_UNHANDLED_CMD_DSTATE; |
350 | extern uint16_t _TRACE_MPTSAS_UNHANDLED_DOORBELL_CMD_DSTATE; |
351 | extern uint16_t _TRACE_MPTSAS_CONFIG_SAS_DEVICE_DSTATE; |
352 | extern uint16_t _TRACE_MPTSAS_CONFIG_SAS_PHY_DSTATE; |
353 | extern uint16_t _TRACE_MEGASAS_INIT_FIRMWARE_DSTATE; |
354 | extern uint16_t _TRACE_MEGASAS_INIT_QUEUE_DSTATE; |
355 | extern uint16_t _TRACE_MEGASAS_INITQ_MAP_FAILED_DSTATE; |
356 | extern uint16_t _TRACE_MEGASAS_INITQ_MAPPED_DSTATE; |
357 | extern uint16_t _TRACE_MEGASAS_INITQ_MISMATCH_DSTATE; |
358 | extern uint16_t _TRACE_MEGASAS_QF_MAPPED_DSTATE; |
359 | extern uint16_t _TRACE_MEGASAS_QF_NEW_DSTATE; |
360 | extern uint16_t _TRACE_MEGASAS_QF_BUSY_DSTATE; |
361 | extern uint16_t _TRACE_MEGASAS_QF_ENQUEUE_DSTATE; |
362 | extern uint16_t _TRACE_MEGASAS_QF_UPDATE_DSTATE; |
363 | extern uint16_t _TRACE_MEGASAS_QF_MAP_FAILED_DSTATE; |
364 | extern uint16_t _TRACE_MEGASAS_QF_COMPLETE_NOIRQ_DSTATE; |
365 | extern uint16_t _TRACE_MEGASAS_QF_COMPLETE_DSTATE; |
366 | extern uint16_t _TRACE_MEGASAS_FRAME_BUSY_DSTATE; |
367 | extern uint16_t _TRACE_MEGASAS_UNHANDLED_FRAME_CMD_DSTATE; |
368 | extern uint16_t _TRACE_MEGASAS_HANDLE_SCSI_DSTATE; |
369 | extern uint16_t _TRACE_MEGASAS_SCSI_TARGET_NOT_PRESENT_DSTATE; |
370 | extern uint16_t _TRACE_MEGASAS_SCSI_INVALID_CDB_LEN_DSTATE; |
371 | extern uint16_t _TRACE_MEGASAS_IOV_READ_OVERFLOW_DSTATE; |
372 | extern uint16_t _TRACE_MEGASAS_IOV_WRITE_OVERFLOW_DSTATE; |
373 | extern uint16_t _TRACE_MEGASAS_IOV_READ_UNDERFLOW_DSTATE; |
374 | extern uint16_t _TRACE_MEGASAS_IOV_WRITE_UNDERFLOW_DSTATE; |
375 | extern uint16_t _TRACE_MEGASAS_SCSI_REQ_ALLOC_FAILED_DSTATE; |
376 | extern uint16_t _TRACE_MEGASAS_SCSI_READ_START_DSTATE; |
377 | extern uint16_t _TRACE_MEGASAS_SCSI_WRITE_START_DSTATE; |
378 | extern uint16_t _TRACE_MEGASAS_SCSI_NODATA_DSTATE; |
379 | extern uint16_t _TRACE_MEGASAS_SCSI_COMPLETE_DSTATE; |
380 | extern uint16_t _TRACE_MEGASAS_COMMAND_COMPLETE_DSTATE; |
381 | extern uint16_t _TRACE_MEGASAS_HANDLE_IO_DSTATE; |
382 | extern uint16_t _TRACE_MEGASAS_IO_TARGET_NOT_PRESENT_DSTATE; |
383 | extern uint16_t _TRACE_MEGASAS_IO_READ_START_DSTATE; |
384 | extern uint16_t _TRACE_MEGASAS_IO_WRITE_START_DSTATE; |
385 | extern uint16_t _TRACE_MEGASAS_IO_COMPLETE_DSTATE; |
386 | extern uint16_t _TRACE_MEGASAS_IOVEC_SGL_OVERFLOW_DSTATE; |
387 | extern uint16_t _TRACE_MEGASAS_IOVEC_SGL_UNDERFLOW_DSTATE; |
388 | extern uint16_t _TRACE_MEGASAS_IOVEC_SGL_INVALID_DSTATE; |
389 | extern uint16_t _TRACE_MEGASAS_IOVEC_OVERFLOW_DSTATE; |
390 | extern uint16_t _TRACE_MEGASAS_IOVEC_UNDERFLOW_DSTATE; |
391 | extern uint16_t _TRACE_MEGASAS_HANDLE_DCMD_DSTATE; |
392 | extern uint16_t _TRACE_MEGASAS_FINISH_DCMD_DSTATE; |
393 | extern uint16_t _TRACE_MEGASAS_DCMD_REQ_ALLOC_FAILED_DSTATE; |
394 | extern uint16_t _TRACE_MEGASAS_DCMD_INTERNAL_SUBMIT_DSTATE; |
395 | extern uint16_t _TRACE_MEGASAS_DCMD_INTERNAL_FINISH_DSTATE; |
396 | extern uint16_t _TRACE_MEGASAS_DCMD_INTERNAL_INVALID_DSTATE; |
397 | extern uint16_t _TRACE_MEGASAS_DCMD_UNHANDLED_DSTATE; |
398 | extern uint16_t _TRACE_MEGASAS_DCMD_ZERO_SGE_DSTATE; |
399 | extern uint16_t _TRACE_MEGASAS_DCMD_INVALID_SGE_DSTATE; |
400 | extern uint16_t _TRACE_MEGASAS_DCMD_INVALID_XFER_LEN_DSTATE; |
401 | extern uint16_t _TRACE_MEGASAS_DCMD_ENTER_DSTATE; |
402 | extern uint16_t _TRACE_MEGASAS_DCMD_DUMMY_DSTATE; |
403 | extern uint16_t _TRACE_MEGASAS_DCMD_SET_FW_TIME_DSTATE; |
404 | extern uint16_t _TRACE_MEGASAS_DCMD_PD_GET_LIST_DSTATE; |
405 | extern uint16_t _TRACE_MEGASAS_DCMD_LD_GET_LIST_DSTATE; |
406 | extern uint16_t _TRACE_MEGASAS_DCMD_LD_GET_INFO_DSTATE; |
407 | extern uint16_t _TRACE_MEGASAS_DCMD_LD_LIST_QUERY_DSTATE; |
408 | extern uint16_t _TRACE_MEGASAS_DCMD_PD_GET_INFO_DSTATE; |
409 | extern uint16_t _TRACE_MEGASAS_DCMD_PD_LIST_QUERY_DSTATE; |
410 | extern uint16_t _TRACE_MEGASAS_DCMD_RESET_LD_DSTATE; |
411 | extern uint16_t _TRACE_MEGASAS_DCMD_UNSUPPORTED_DSTATE; |
412 | extern uint16_t _TRACE_MEGASAS_ABORT_FRAME_DSTATE; |
413 | extern uint16_t _TRACE_MEGASAS_ABORT_NO_CMD_DSTATE; |
414 | extern uint16_t _TRACE_MEGASAS_ABORT_INVALID_CONTEXT_DSTATE; |
415 | extern uint16_t _TRACE_MEGASAS_RESET_DSTATE; |
416 | extern uint16_t _TRACE_MEGASAS_INIT_DSTATE; |
417 | extern uint16_t _TRACE_MEGASAS_MSIX_RAISE_DSTATE; |
418 | extern uint16_t _TRACE_MEGASAS_MSI_RAISE_DSTATE; |
419 | extern uint16_t _TRACE_MEGASAS_IRQ_LOWER_DSTATE; |
420 | extern uint16_t _TRACE_MEGASAS_IRQ_RAISE_DSTATE; |
421 | extern uint16_t _TRACE_MEGASAS_INTR_ENABLED_DSTATE; |
422 | extern uint16_t _TRACE_MEGASAS_INTR_DISABLED_DSTATE; |
423 | extern uint16_t _TRACE_MEGASAS_MSIX_ENABLED_DSTATE; |
424 | extern uint16_t _TRACE_MEGASAS_MSI_ENABLED_DSTATE; |
425 | extern uint16_t _TRACE_MEGASAS_MMIO_READL_DSTATE; |
426 | extern uint16_t _TRACE_MEGASAS_MMIO_INVALID_READL_DSTATE; |
427 | extern uint16_t _TRACE_MEGASAS_MMIO_WRITEL_DSTATE; |
428 | extern uint16_t _TRACE_MEGASAS_MMIO_INVALID_WRITEL_DSTATE; |
429 | extern uint16_t _TRACE_PVSCSI_RING_INIT_DATA_DSTATE; |
430 | extern uint16_t _TRACE_PVSCSI_RING_INIT_MSG_DSTATE; |
431 | extern uint16_t _TRACE_PVSCSI_RING_FLUSH_CMP_DSTATE; |
432 | extern uint16_t _TRACE_PVSCSI_RING_FLUSH_MSG_DSTATE; |
433 | extern uint16_t _TRACE_PVSCSI_UPDATE_IRQ_LEVEL_DSTATE; |
434 | extern uint16_t _TRACE_PVSCSI_UPDATE_IRQ_MSI_DSTATE; |
435 | extern uint16_t _TRACE_PVSCSI_CMP_RING_PUT_DSTATE; |
436 | extern uint16_t _TRACE_PVSCSI_MSG_RING_PUT_DSTATE; |
437 | extern uint16_t _TRACE_PVSCSI_COMPLETE_REQUEST_DSTATE; |
438 | extern uint16_t _TRACE_PVSCSI_GET_SG_LIST_DSTATE; |
439 | extern uint16_t _TRACE_PVSCSI_GET_NEXT_SG_ELEM_DSTATE; |
440 | extern uint16_t _TRACE_PVSCSI_COMMAND_COMPLETE_NOT_FOUND_DSTATE; |
441 | extern uint16_t _TRACE_PVSCSI_COMMAND_COMPLETE_DATA_RUN_DSTATE; |
442 | extern uint16_t _TRACE_PVSCSI_COMMAND_COMPLETE_SENSE_LEN_DSTATE; |
443 | extern uint16_t _TRACE_PVSCSI_CONVERT_SGLIST_DSTATE; |
444 | extern uint16_t _TRACE_PVSCSI_PROCESS_REQ_DESCR_DSTATE; |
445 | extern uint16_t _TRACE_PVSCSI_PROCESS_REQ_DESCR_UNKNOWN_DEVICE_DSTATE; |
446 | extern uint16_t _TRACE_PVSCSI_PROCESS_REQ_DESCR_INVALID_DIR_DSTATE; |
447 | extern uint16_t _TRACE_PVSCSI_PROCESS_IO_DSTATE; |
448 | extern uint16_t _TRACE_PVSCSI_ON_CMD_NOIMPL_DSTATE; |
449 | extern uint16_t _TRACE_PVSCSI_ON_CMD_RESET_DEV_DSTATE; |
450 | extern uint16_t _TRACE_PVSCSI_ON_CMD_ARRIVED_DSTATE; |
451 | extern uint16_t _TRACE_PVSCSI_ON_CMD_ABORT_DSTATE; |
452 | extern uint16_t _TRACE_PVSCSI_ON_CMD_UNKNOWN_DSTATE; |
453 | extern uint16_t _TRACE_PVSCSI_ON_CMD_UNKNOWN_DATA_DSTATE; |
454 | extern uint16_t _TRACE_PVSCSI_IO_WRITE_DSTATE; |
455 | extern uint16_t _TRACE_PVSCSI_IO_WRITE_UNKNOWN_DSTATE; |
456 | extern uint16_t _TRACE_PVSCSI_IO_READ_DSTATE; |
457 | extern uint16_t _TRACE_PVSCSI_IO_READ_UNKNOWN_DSTATE; |
458 | extern uint16_t _TRACE_PVSCSI_INIT_MSI_FAIL_DSTATE; |
459 | extern uint16_t _TRACE_PVSCSI_STATE_DSTATE; |
460 | extern uint16_t _TRACE_PVSCSI_TX_RINGS_PPN_DSTATE; |
461 | extern uint16_t _TRACE_PVSCSI_TX_RINGS_NUM_PAGES_DSTATE; |
462 | extern uint16_t _TRACE_ESP_ERROR_FIFO_OVERRUN_DSTATE; |
463 | extern uint16_t _TRACE_ESP_ERROR_UNHANDLED_COMMAND_DSTATE; |
464 | extern uint16_t _TRACE_ESP_ERROR_INVALID_WRITE_DSTATE; |
465 | extern uint16_t _TRACE_ESP_RAISE_IRQ_DSTATE; |
466 | extern uint16_t _TRACE_ESP_LOWER_IRQ_DSTATE; |
467 | extern uint16_t _TRACE_ESP_DMA_ENABLE_DSTATE; |
468 | extern uint16_t _TRACE_ESP_DMA_DISABLE_DSTATE; |
469 | extern uint16_t _TRACE_ESP_GET_CMD_DSTATE; |
470 | extern uint16_t _TRACE_ESP_DO_BUSID_CMD_DSTATE; |
471 | extern uint16_t _TRACE_ESP_HANDLE_SATN_STOP_DSTATE; |
472 | extern uint16_t _TRACE_ESP_WRITE_RESPONSE_DSTATE; |
473 | extern uint16_t _TRACE_ESP_DO_DMA_DSTATE; |
474 | extern uint16_t _TRACE_ESP_COMMAND_COMPLETE_DSTATE; |
475 | extern uint16_t _TRACE_ESP_COMMAND_COMPLETE_DEFERRED_DSTATE; |
476 | extern uint16_t _TRACE_ESP_COMMAND_COMPLETE_UNEXPECTED_DSTATE; |
477 | extern uint16_t _TRACE_ESP_COMMAND_COMPLETE_FAIL_DSTATE; |
478 | extern uint16_t _TRACE_ESP_TRANSFER_DATA_DSTATE; |
479 | extern uint16_t _TRACE_ESP_HANDLE_TI_DSTATE; |
480 | extern uint16_t _TRACE_ESP_HANDLE_TI_CMD_DSTATE; |
481 | extern uint16_t _TRACE_ESP_MEM_READB_DSTATE; |
482 | extern uint16_t _TRACE_ESP_MEM_WRITEB_DSTATE; |
483 | extern uint16_t _TRACE_ESP_MEM_WRITEB_CMD_NOP_DSTATE; |
484 | extern uint16_t _TRACE_ESP_MEM_WRITEB_CMD_FLUSH_DSTATE; |
485 | extern uint16_t _TRACE_ESP_MEM_WRITEB_CMD_RESET_DSTATE; |
486 | extern uint16_t _TRACE_ESP_MEM_WRITEB_CMD_BUS_RESET_DSTATE; |
487 | extern uint16_t _TRACE_ESP_MEM_WRITEB_CMD_ICCS_DSTATE; |
488 | extern uint16_t _TRACE_ESP_MEM_WRITEB_CMD_MSGACC_DSTATE; |
489 | extern uint16_t _TRACE_ESP_MEM_WRITEB_CMD_PAD_DSTATE; |
490 | extern uint16_t _TRACE_ESP_MEM_WRITEB_CMD_SATN_DSTATE; |
491 | extern uint16_t _TRACE_ESP_MEM_WRITEB_CMD_RSTATN_DSTATE; |
492 | extern uint16_t _TRACE_ESP_MEM_WRITEB_CMD_SEL_DSTATE; |
493 | extern uint16_t _TRACE_ESP_MEM_WRITEB_CMD_SELATN_DSTATE; |
494 | extern uint16_t _TRACE_ESP_MEM_WRITEB_CMD_SELATNS_DSTATE; |
495 | extern uint16_t _TRACE_ESP_MEM_WRITEB_CMD_ENSEL_DSTATE; |
496 | extern uint16_t _TRACE_ESP_MEM_WRITEB_CMD_DISSEL_DSTATE; |
497 | extern uint16_t _TRACE_ESP_PCI_ERROR_INVALID_DMA_DIRECTION_DSTATE; |
498 | extern uint16_t _TRACE_ESP_PCI_ERROR_INVALID_READ_DSTATE; |
499 | extern uint16_t _TRACE_ESP_PCI_ERROR_INVALID_WRITE_DSTATE; |
500 | extern uint16_t _TRACE_ESP_PCI_ERROR_INVALID_WRITE_DMA_DSTATE; |
501 | extern uint16_t _TRACE_ESP_PCI_DMA_READ_DSTATE; |
502 | extern uint16_t _TRACE_ESP_PCI_DMA_WRITE_DSTATE; |
503 | extern uint16_t _TRACE_ESP_PCI_DMA_IDLE_DSTATE; |
504 | extern uint16_t _TRACE_ESP_PCI_DMA_BLAST_DSTATE; |
505 | extern uint16_t _TRACE_ESP_PCI_DMA_ABORT_DSTATE; |
506 | extern uint16_t _TRACE_ESP_PCI_DMA_START_DSTATE; |
507 | extern uint16_t _TRACE_ESP_PCI_SBAC_READ_DSTATE; |
508 | extern uint16_t _TRACE_ESP_PCI_SBAC_WRITE_DSTATE; |
509 | extern uint16_t _TRACE_SPAPR_VSCSI_SEND_RSP_DSTATE; |
510 | extern uint16_t _TRACE_SPAPR_VSCSI_FETCH_DESC_NO_DATA_DSTATE; |
511 | extern uint16_t _TRACE_SPAPR_VSCSI_FETCH_DESC_DIRECT_DSTATE; |
512 | extern uint16_t _TRACE_SPAPR_VSCSI_FETCH_DESC_INDIRECT_DSTATE; |
513 | extern uint16_t _TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_RANGE_DSTATE; |
514 | extern uint16_t _TRACE_SPAPR_VSCSI_FETCH_DESC_DMA_READ_ERROR_DSTATE; |
515 | extern uint16_t _TRACE_SPAPR_VSCSI_FETCH_DESC_INDIRECT_SEG_EXT_DSTATE; |
516 | extern uint16_t _TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_DESC_DSTATE; |
517 | extern uint16_t _TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_DESC_BOUNDARY_DSTATE; |
518 | extern uint16_t _TRACE_SPAPR_VSCSI_FETCH_DESC_DONE_DSTATE; |
519 | extern uint16_t _TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_DSTATE; |
520 | extern uint16_t _TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_RW_DSTATE; |
521 | extern uint16_t _TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_BUF_DSTATE; |
522 | extern uint16_t _TRACE_SPAPR_VSCSI_SRP_TRANSFER_DATA_DSTATE; |
523 | extern uint16_t _TRACE_SPAPR_VSCSI_TRANSFER_DATA_DSTATE; |
524 | extern uint16_t _TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_DSTATE; |
525 | extern uint16_t _TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_SENSE_DATA1_DSTATE; |
526 | extern uint16_t _TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_SENSE_DATA2_DSTATE; |
527 | extern uint16_t _TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_STATUS_DSTATE; |
528 | extern uint16_t _TRACE_SPAPR_VSCSI_SAVE_REQUEST_DSTATE; |
529 | extern uint16_t _TRACE_SPAPR_VSCSI_LOAD_REQUEST_DSTATE; |
530 | extern uint16_t _TRACE_SPAPR_VSCSI_PROCESS_LOGIN_DSTATE; |
531 | extern uint16_t _TRACE_SPAPR_VSCSI_QUEUE_CMD_NO_DRIVE_DSTATE; |
532 | extern uint16_t _TRACE_SPAPR_VSCSI_QUEUE_CMD_DSTATE; |
533 | extern uint16_t _TRACE_SPAPR_VSCSI_DO_CRQ_DSTATE; |
534 | extern uint16_t _TRACE_LSI_RESET_DSTATE; |
535 | extern uint16_t _TRACE_LSI_UPDATE_IRQ_DSTATE; |
536 | extern uint16_t _TRACE_LSI_UPDATE_IRQ_DISCONNECTED_DSTATE; |
537 | extern uint16_t _TRACE_LSI_SCRIPT_SCSI_INTERRUPT_DSTATE; |
538 | extern uint16_t _TRACE_LSI_SCRIPT_DMA_INTERRUPT_DSTATE; |
539 | extern uint16_t _TRACE_LSI_BAD_PHASE_JUMP_DSTATE; |
540 | extern uint16_t _TRACE_LSI_BAD_PHASE_INTERRUPT_DSTATE; |
541 | extern uint16_t _TRACE_LSI_BAD_SELECTION_DSTATE; |
542 | extern uint16_t _TRACE_LSI_DO_DMA_UNAVAILABLE_DSTATE; |
543 | extern uint16_t _TRACE_LSI_DO_DMA_DSTATE; |
544 | extern uint16_t _TRACE_LSI_QUEUE_COMMAND_DSTATE; |
545 | extern uint16_t _TRACE_LSI_ADD_MSG_BYTE_ERROR_DSTATE; |
546 | extern uint16_t _TRACE_LSI_ADD_MSG_BYTE_DSTATE; |
547 | extern uint16_t _TRACE_LSI_RESELECT_DSTATE; |
548 | extern uint16_t _TRACE_LSI_QUEUE_REQ_ERROR_DSTATE; |
549 | extern uint16_t _TRACE_LSI_QUEUE_REQ_DSTATE; |
550 | extern uint16_t _TRACE_LSI_COMMAND_COMPLETE_DSTATE; |
551 | extern uint16_t _TRACE_LSI_TRANSFER_DATA_DSTATE; |
552 | extern uint16_t _TRACE_LSI_DO_COMMAND_DSTATE; |
553 | extern uint16_t _TRACE_LSI_DO_STATUS_DSTATE; |
554 | extern uint16_t _TRACE_LSI_DO_STATUS_ERROR_DSTATE; |
555 | extern uint16_t _TRACE_LSI_DO_MSGIN_DSTATE; |
556 | extern uint16_t _TRACE_LSI_DO_MSGOUT_DSTATE; |
557 | extern uint16_t _TRACE_LSI_DO_MSGOUT_DISCONNECT_DSTATE; |
558 | extern uint16_t _TRACE_LSI_DO_MSGOUT_NOOP_DSTATE; |
559 | extern uint16_t _TRACE_LSI_DO_MSGOUT_EXTENDED_DSTATE; |
560 | extern uint16_t _TRACE_LSI_DO_MSGOUT_IGNORED_DSTATE; |
561 | extern uint16_t _TRACE_LSI_DO_MSGOUT_SIMPLEQUEUE_DSTATE; |
562 | extern uint16_t _TRACE_LSI_DO_MSGOUT_ABORT_DSTATE; |
563 | extern uint16_t _TRACE_LSI_DO_MSGOUT_CLEARQUEUE_DSTATE; |
564 | extern uint16_t _TRACE_LSI_DO_MSGOUT_BUSDEVICERESET_DSTATE; |
565 | extern uint16_t _TRACE_LSI_DO_MSGOUT_SELECT_DSTATE; |
566 | extern uint16_t _TRACE_LSI_MEMCPY_DSTATE; |
567 | extern uint16_t _TRACE_LSI_WAIT_RESELECT_DSTATE; |
568 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_DSTATE; |
569 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_BLOCKMOVE_DELAYED_DSTATE; |
570 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_BLOCKMOVE_BADPHASE_DSTATE; |
571 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_IO_ALREADYRESELECTED_DSTATE; |
572 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_IO_SELECTED_DSTATE; |
573 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_IO_DISCONNECT_DSTATE; |
574 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_IO_SET_DSTATE; |
575 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_IO_CLEAR_DSTATE; |
576 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_IO_OPCODE_DSTATE; |
577 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_TC_NOP_DSTATE; |
578 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_TC_DELAYEDSELECT_TIMEOUT_DSTATE; |
579 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_TC_COMPC_DSTATE; |
580 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_TC_COMPP_DSTATE; |
581 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_TC_COMPD_DSTATE; |
582 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_TC_JUMP_DSTATE; |
583 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_TC_CALL_DSTATE; |
584 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_TC_RETURN_DSTATE; |
585 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_TC_INTERRUPT_DSTATE; |
586 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_TC_ILLEGAL_DSTATE; |
587 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_TC_CC_FAILED_DSTATE; |
588 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_MM_LOAD_DSTATE; |
589 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_MM_STORE_DSTATE; |
590 | extern uint16_t _TRACE_LSI_EXECUTE_SCRIPT_STOP_DSTATE; |
591 | extern uint16_t _TRACE_LSI_AWOKEN_DSTATE; |
592 | extern uint16_t _TRACE_LSI_REG_READ_DSTATE; |
593 | extern uint16_t _TRACE_LSI_REG_WRITE_DSTATE; |
594 | extern uint16_t _TRACE_SCSI_DISK_CHECK_CONDITION_DSTATE; |
595 | extern uint16_t _TRACE_SCSI_DISK_READ_COMPLETE_DSTATE; |
596 | extern uint16_t _TRACE_SCSI_DISK_READ_DATA_COUNT_DSTATE; |
597 | extern uint16_t _TRACE_SCSI_DISK_READ_DATA_INVALID_DSTATE; |
598 | extern uint16_t _TRACE_SCSI_DISK_WRITE_COMPLETE_NOIO_DSTATE; |
599 | extern uint16_t _TRACE_SCSI_DISK_WRITE_DATA_INVALID_DSTATE; |
600 | extern uint16_t _TRACE_SCSI_DISK_EMULATE_VPD_PAGE_00_DSTATE; |
601 | extern uint16_t _TRACE_SCSI_DISK_EMULATE_VPD_PAGE_80_NOT_SUPPORTED_DSTATE; |
602 | extern uint16_t _TRACE_SCSI_DISK_EMULATE_VPD_PAGE_80_DSTATE; |
603 | extern uint16_t _TRACE_SCSI_DISK_EMULATE_VPD_PAGE_83_DSTATE; |
604 | extern uint16_t _TRACE_SCSI_DISK_EMULATE_VPD_PAGE_B0_NOT_SUPPORTED_DSTATE; |
605 | extern uint16_t _TRACE_SCSI_DISK_EMULATE_MODE_SENSE_DSTATE; |
606 | extern uint16_t _TRACE_SCSI_DISK_EMULATE_READ_TOC_DSTATE; |
607 | extern uint16_t _TRACE_SCSI_DISK_EMULATE_READ_DATA_DSTATE; |
608 | extern uint16_t _TRACE_SCSI_DISK_EMULATE_WRITE_DATA_DSTATE; |
609 | extern uint16_t _TRACE_SCSI_DISK_EMULATE_COMMAND_SAI_16_DSTATE; |
610 | extern uint16_t _TRACE_SCSI_DISK_EMULATE_COMMAND_SAI_UNSUPPORTED_DSTATE; |
611 | extern uint16_t _TRACE_SCSI_DISK_EMULATE_COMMAND_SEEK_10_DSTATE; |
612 | extern uint16_t _TRACE_SCSI_DISK_EMULATE_COMMAND_MODE_SELECT_DSTATE; |
613 | extern uint16_t _TRACE_SCSI_DISK_EMULATE_COMMAND_MODE_SELECT_10_DSTATE; |
614 | extern uint16_t _TRACE_SCSI_DISK_EMULATE_COMMAND_UNMAP_DSTATE; |
615 | extern uint16_t _TRACE_SCSI_DISK_EMULATE_COMMAND_VERIFY_DSTATE; |
616 | extern uint16_t _TRACE_SCSI_DISK_EMULATE_COMMAND_WRITE_SAME_DSTATE; |
617 | extern uint16_t _TRACE_SCSI_DISK_EMULATE_COMMAND_UNKNOWN_DSTATE; |
618 | extern uint16_t _TRACE_SCSI_DISK_DMA_COMMAND_READ_DSTATE; |
619 | extern uint16_t _TRACE_SCSI_DISK_DMA_COMMAND_WRITE_DSTATE; |
620 | extern uint16_t _TRACE_SCSI_DISK_NEW_REQUEST_DSTATE; |
621 | extern uint16_t _TRACE_SCSI_GENERIC_COMMAND_COMPLETE_NOIO_DSTATE; |
622 | extern uint16_t _TRACE_SCSI_GENERIC_READ_COMPLETE_DSTATE; |
623 | extern uint16_t _TRACE_SCSI_GENERIC_READ_DATA_DSTATE; |
624 | extern uint16_t _TRACE_SCSI_GENERIC_WRITE_COMPLETE_DSTATE; |
625 | extern uint16_t _TRACE_SCSI_GENERIC_WRITE_COMPLETE_BLOCKSIZE_DSTATE; |
626 | extern uint16_t _TRACE_SCSI_GENERIC_WRITE_DATA_DSTATE; |
627 | extern uint16_t _TRACE_SCSI_GENERIC_SEND_COMMAND_DSTATE; |
628 | extern uint16_t _TRACE_SCSI_GENERIC_REALIZE_TYPE_DSTATE; |
629 | extern uint16_t _TRACE_SCSI_GENERIC_REALIZE_BLOCKSIZE_DSTATE; |
630 | #define TRACE_SCSI_REQ_ALLOC_ENABLED 1 |
631 | #define TRACE_SCSI_REQ_CANCEL_ENABLED 1 |
632 | #define TRACE_SCSI_REQ_DATA_ENABLED 1 |
633 | #define TRACE_SCSI_REQ_DATA_CANCELED_ENABLED 1 |
634 | #define TRACE_SCSI_REQ_DEQUEUE_ENABLED 1 |
635 | #define TRACE_SCSI_REQ_CONTINUE_ENABLED 1 |
636 | #define TRACE_SCSI_REQ_CONTINUE_CANCELED_ENABLED 1 |
637 | #define TRACE_SCSI_REQ_PARSED_ENABLED 1 |
638 | #define TRACE_SCSI_REQ_PARSED_LBA_ENABLED 1 |
639 | #define TRACE_SCSI_REQ_PARSE_BAD_ENABLED 1 |
640 | #define TRACE_SCSI_REQ_BUILD_SENSE_ENABLED 1 |
641 | #define TRACE_SCSI_DEVICE_SET_UA_ENABLED 1 |
642 | #define TRACE_SCSI_REPORT_LUNS_ENABLED 1 |
643 | #define TRACE_SCSI_INQUIRY_ENABLED 1 |
644 | #define TRACE_SCSI_TEST_UNIT_READY_ENABLED 1 |
645 | #define TRACE_SCSI_REQUEST_SENSE_ENABLED 1 |
646 | #define TRACE_MPTSAS_COMMAND_COMPLETE_ENABLED 1 |
647 | #define TRACE_MPTSAS_DIAG_READ_ENABLED 1 |
648 | #define TRACE_MPTSAS_DIAG_WRITE_ENABLED 1 |
649 | #define TRACE_MPTSAS_IRQ_INTX_ENABLED 1 |
650 | #define TRACE_MPTSAS_IRQ_MSI_ENABLED 1 |
651 | #define TRACE_MPTSAS_MMIO_READ_ENABLED 1 |
652 | #define TRACE_MPTSAS_MMIO_UNHANDLED_READ_ENABLED 1 |
653 | #define TRACE_MPTSAS_MMIO_UNHANDLED_WRITE_ENABLED 1 |
654 | #define TRACE_MPTSAS_MMIO_WRITE_ENABLED 1 |
655 | #define TRACE_MPTSAS_PROCESS_MESSAGE_ENABLED 1 |
656 | #define TRACE_MPTSAS_PROCESS_SCSI_IO_REQUEST_ENABLED 1 |
657 | #define TRACE_MPTSAS_RESET_ENABLED 1 |
658 | #define TRACE_MPTSAS_SCSI_OVERFLOW_ENABLED 1 |
659 | #define TRACE_MPTSAS_SGL_OVERFLOW_ENABLED 1 |
660 | #define TRACE_MPTSAS_UNHANDLED_CMD_ENABLED 1 |
661 | #define TRACE_MPTSAS_UNHANDLED_DOORBELL_CMD_ENABLED 1 |
662 | #define TRACE_MPTSAS_CONFIG_SAS_DEVICE_ENABLED 1 |
663 | #define TRACE_MPTSAS_CONFIG_SAS_PHY_ENABLED 1 |
664 | #define TRACE_MEGASAS_INIT_FIRMWARE_ENABLED 1 |
665 | #define TRACE_MEGASAS_INIT_QUEUE_ENABLED 1 |
666 | #define TRACE_MEGASAS_INITQ_MAP_FAILED_ENABLED 1 |
667 | #define TRACE_MEGASAS_INITQ_MAPPED_ENABLED 1 |
668 | #define TRACE_MEGASAS_INITQ_MISMATCH_ENABLED 1 |
669 | #define TRACE_MEGASAS_QF_MAPPED_ENABLED 1 |
670 | #define TRACE_MEGASAS_QF_NEW_ENABLED 1 |
671 | #define TRACE_MEGASAS_QF_BUSY_ENABLED 1 |
672 | #define TRACE_MEGASAS_QF_ENQUEUE_ENABLED 1 |
673 | #define TRACE_MEGASAS_QF_UPDATE_ENABLED 1 |
674 | #define TRACE_MEGASAS_QF_MAP_FAILED_ENABLED 1 |
675 | #define TRACE_MEGASAS_QF_COMPLETE_NOIRQ_ENABLED 1 |
676 | #define TRACE_MEGASAS_QF_COMPLETE_ENABLED 1 |
677 | #define TRACE_MEGASAS_FRAME_BUSY_ENABLED 1 |
678 | #define TRACE_MEGASAS_UNHANDLED_FRAME_CMD_ENABLED 1 |
679 | #define TRACE_MEGASAS_HANDLE_SCSI_ENABLED 1 |
680 | #define TRACE_MEGASAS_SCSI_TARGET_NOT_PRESENT_ENABLED 1 |
681 | #define TRACE_MEGASAS_SCSI_INVALID_CDB_LEN_ENABLED 1 |
682 | #define TRACE_MEGASAS_IOV_READ_OVERFLOW_ENABLED 1 |
683 | #define TRACE_MEGASAS_IOV_WRITE_OVERFLOW_ENABLED 1 |
684 | #define TRACE_MEGASAS_IOV_READ_UNDERFLOW_ENABLED 1 |
685 | #define TRACE_MEGASAS_IOV_WRITE_UNDERFLOW_ENABLED 1 |
686 | #define TRACE_MEGASAS_SCSI_REQ_ALLOC_FAILED_ENABLED 1 |
687 | #define TRACE_MEGASAS_SCSI_READ_START_ENABLED 1 |
688 | #define TRACE_MEGASAS_SCSI_WRITE_START_ENABLED 1 |
689 | #define TRACE_MEGASAS_SCSI_NODATA_ENABLED 1 |
690 | #define TRACE_MEGASAS_SCSI_COMPLETE_ENABLED 1 |
691 | #define TRACE_MEGASAS_COMMAND_COMPLETE_ENABLED 1 |
692 | #define TRACE_MEGASAS_HANDLE_IO_ENABLED 1 |
693 | #define TRACE_MEGASAS_IO_TARGET_NOT_PRESENT_ENABLED 1 |
694 | #define TRACE_MEGASAS_IO_READ_START_ENABLED 1 |
695 | #define TRACE_MEGASAS_IO_WRITE_START_ENABLED 1 |
696 | #define TRACE_MEGASAS_IO_COMPLETE_ENABLED 1 |
697 | #define TRACE_MEGASAS_IOVEC_SGL_OVERFLOW_ENABLED 1 |
698 | #define TRACE_MEGASAS_IOVEC_SGL_UNDERFLOW_ENABLED 1 |
699 | #define TRACE_MEGASAS_IOVEC_SGL_INVALID_ENABLED 1 |
700 | #define TRACE_MEGASAS_IOVEC_OVERFLOW_ENABLED 1 |
701 | #define TRACE_MEGASAS_IOVEC_UNDERFLOW_ENABLED 1 |
702 | #define TRACE_MEGASAS_HANDLE_DCMD_ENABLED 1 |
703 | #define TRACE_MEGASAS_FINISH_DCMD_ENABLED 1 |
704 | #define TRACE_MEGASAS_DCMD_REQ_ALLOC_FAILED_ENABLED 1 |
705 | #define TRACE_MEGASAS_DCMD_INTERNAL_SUBMIT_ENABLED 1 |
706 | #define TRACE_MEGASAS_DCMD_INTERNAL_FINISH_ENABLED 1 |
707 | #define TRACE_MEGASAS_DCMD_INTERNAL_INVALID_ENABLED 1 |
708 | #define TRACE_MEGASAS_DCMD_UNHANDLED_ENABLED 1 |
709 | #define TRACE_MEGASAS_DCMD_ZERO_SGE_ENABLED 1 |
710 | #define TRACE_MEGASAS_DCMD_INVALID_SGE_ENABLED 1 |
711 | #define TRACE_MEGASAS_DCMD_INVALID_XFER_LEN_ENABLED 1 |
712 | #define TRACE_MEGASAS_DCMD_ENTER_ENABLED 1 |
713 | #define TRACE_MEGASAS_DCMD_DUMMY_ENABLED 1 |
714 | #define TRACE_MEGASAS_DCMD_SET_FW_TIME_ENABLED 1 |
715 | #define TRACE_MEGASAS_DCMD_PD_GET_LIST_ENABLED 1 |
716 | #define TRACE_MEGASAS_DCMD_LD_GET_LIST_ENABLED 1 |
717 | #define TRACE_MEGASAS_DCMD_LD_GET_INFO_ENABLED 1 |
718 | #define TRACE_MEGASAS_DCMD_LD_LIST_QUERY_ENABLED 1 |
719 | #define TRACE_MEGASAS_DCMD_PD_GET_INFO_ENABLED 1 |
720 | #define TRACE_MEGASAS_DCMD_PD_LIST_QUERY_ENABLED 1 |
721 | #define TRACE_MEGASAS_DCMD_RESET_LD_ENABLED 1 |
722 | #define TRACE_MEGASAS_DCMD_UNSUPPORTED_ENABLED 1 |
723 | #define TRACE_MEGASAS_ABORT_FRAME_ENABLED 1 |
724 | #define TRACE_MEGASAS_ABORT_NO_CMD_ENABLED 1 |
725 | #define TRACE_MEGASAS_ABORT_INVALID_CONTEXT_ENABLED 1 |
726 | #define TRACE_MEGASAS_RESET_ENABLED 1 |
727 | #define TRACE_MEGASAS_INIT_ENABLED 1 |
728 | #define TRACE_MEGASAS_MSIX_RAISE_ENABLED 1 |
729 | #define TRACE_MEGASAS_MSI_RAISE_ENABLED 1 |
730 | #define TRACE_MEGASAS_IRQ_LOWER_ENABLED 1 |
731 | #define TRACE_MEGASAS_IRQ_RAISE_ENABLED 1 |
732 | #define TRACE_MEGASAS_INTR_ENABLED_ENABLED 1 |
733 | #define TRACE_MEGASAS_INTR_DISABLED_ENABLED 1 |
734 | #define TRACE_MEGASAS_MSIX_ENABLED_ENABLED 1 |
735 | #define TRACE_MEGASAS_MSI_ENABLED_ENABLED 1 |
736 | #define TRACE_MEGASAS_MMIO_READL_ENABLED 1 |
737 | #define TRACE_MEGASAS_MMIO_INVALID_READL_ENABLED 1 |
738 | #define TRACE_MEGASAS_MMIO_WRITEL_ENABLED 1 |
739 | #define TRACE_MEGASAS_MMIO_INVALID_WRITEL_ENABLED 1 |
740 | #define TRACE_PVSCSI_RING_INIT_DATA_ENABLED 1 |
741 | #define TRACE_PVSCSI_RING_INIT_MSG_ENABLED 1 |
742 | #define TRACE_PVSCSI_RING_FLUSH_CMP_ENABLED 1 |
743 | #define TRACE_PVSCSI_RING_FLUSH_MSG_ENABLED 1 |
744 | #define TRACE_PVSCSI_UPDATE_IRQ_LEVEL_ENABLED 1 |
745 | #define TRACE_PVSCSI_UPDATE_IRQ_MSI_ENABLED 1 |
746 | #define TRACE_PVSCSI_CMP_RING_PUT_ENABLED 1 |
747 | #define TRACE_PVSCSI_MSG_RING_PUT_ENABLED 1 |
748 | #define TRACE_PVSCSI_COMPLETE_REQUEST_ENABLED 1 |
749 | #define TRACE_PVSCSI_GET_SG_LIST_ENABLED 1 |
750 | #define TRACE_PVSCSI_GET_NEXT_SG_ELEM_ENABLED 1 |
751 | #define TRACE_PVSCSI_COMMAND_COMPLETE_NOT_FOUND_ENABLED 1 |
752 | #define TRACE_PVSCSI_COMMAND_COMPLETE_DATA_RUN_ENABLED 1 |
753 | #define TRACE_PVSCSI_COMMAND_COMPLETE_SENSE_LEN_ENABLED 1 |
754 | #define TRACE_PVSCSI_CONVERT_SGLIST_ENABLED 1 |
755 | #define TRACE_PVSCSI_PROCESS_REQ_DESCR_ENABLED 1 |
756 | #define TRACE_PVSCSI_PROCESS_REQ_DESCR_UNKNOWN_DEVICE_ENABLED 1 |
757 | #define TRACE_PVSCSI_PROCESS_REQ_DESCR_INVALID_DIR_ENABLED 1 |
758 | #define TRACE_PVSCSI_PROCESS_IO_ENABLED 1 |
759 | #define TRACE_PVSCSI_ON_CMD_NOIMPL_ENABLED 1 |
760 | #define TRACE_PVSCSI_ON_CMD_RESET_DEV_ENABLED 1 |
761 | #define TRACE_PVSCSI_ON_CMD_ARRIVED_ENABLED 1 |
762 | #define TRACE_PVSCSI_ON_CMD_ABORT_ENABLED 1 |
763 | #define TRACE_PVSCSI_ON_CMD_UNKNOWN_ENABLED 1 |
764 | #define TRACE_PVSCSI_ON_CMD_UNKNOWN_DATA_ENABLED 1 |
765 | #define TRACE_PVSCSI_IO_WRITE_ENABLED 1 |
766 | #define TRACE_PVSCSI_IO_WRITE_UNKNOWN_ENABLED 1 |
767 | #define TRACE_PVSCSI_IO_READ_ENABLED 1 |
768 | #define TRACE_PVSCSI_IO_READ_UNKNOWN_ENABLED 1 |
769 | #define TRACE_PVSCSI_INIT_MSI_FAIL_ENABLED 1 |
770 | #define TRACE_PVSCSI_STATE_ENABLED 1 |
771 | #define TRACE_PVSCSI_TX_RINGS_PPN_ENABLED 1 |
772 | #define TRACE_PVSCSI_TX_RINGS_NUM_PAGES_ENABLED 1 |
773 | #define TRACE_ESP_ERROR_FIFO_OVERRUN_ENABLED 1 |
774 | #define TRACE_ESP_ERROR_UNHANDLED_COMMAND_ENABLED 1 |
775 | #define TRACE_ESP_ERROR_INVALID_WRITE_ENABLED 1 |
776 | #define TRACE_ESP_RAISE_IRQ_ENABLED 1 |
777 | #define TRACE_ESP_LOWER_IRQ_ENABLED 1 |
778 | #define TRACE_ESP_DMA_ENABLE_ENABLED 1 |
779 | #define TRACE_ESP_DMA_DISABLE_ENABLED 1 |
780 | #define TRACE_ESP_GET_CMD_ENABLED 1 |
781 | #define TRACE_ESP_DO_BUSID_CMD_ENABLED 1 |
782 | #define TRACE_ESP_HANDLE_SATN_STOP_ENABLED 1 |
783 | #define TRACE_ESP_WRITE_RESPONSE_ENABLED 1 |
784 | #define TRACE_ESP_DO_DMA_ENABLED 1 |
785 | #define TRACE_ESP_COMMAND_COMPLETE_ENABLED 1 |
786 | #define TRACE_ESP_COMMAND_COMPLETE_DEFERRED_ENABLED 1 |
787 | #define TRACE_ESP_COMMAND_COMPLETE_UNEXPECTED_ENABLED 1 |
788 | #define TRACE_ESP_COMMAND_COMPLETE_FAIL_ENABLED 1 |
789 | #define TRACE_ESP_TRANSFER_DATA_ENABLED 1 |
790 | #define TRACE_ESP_HANDLE_TI_ENABLED 1 |
791 | #define TRACE_ESP_HANDLE_TI_CMD_ENABLED 1 |
792 | #define TRACE_ESP_MEM_READB_ENABLED 1 |
793 | #define TRACE_ESP_MEM_WRITEB_ENABLED 1 |
794 | #define TRACE_ESP_MEM_WRITEB_CMD_NOP_ENABLED 1 |
795 | #define TRACE_ESP_MEM_WRITEB_CMD_FLUSH_ENABLED 1 |
796 | #define TRACE_ESP_MEM_WRITEB_CMD_RESET_ENABLED 1 |
797 | #define TRACE_ESP_MEM_WRITEB_CMD_BUS_RESET_ENABLED 1 |
798 | #define TRACE_ESP_MEM_WRITEB_CMD_ICCS_ENABLED 1 |
799 | #define TRACE_ESP_MEM_WRITEB_CMD_MSGACC_ENABLED 1 |
800 | #define TRACE_ESP_MEM_WRITEB_CMD_PAD_ENABLED 1 |
801 | #define TRACE_ESP_MEM_WRITEB_CMD_SATN_ENABLED 1 |
802 | #define TRACE_ESP_MEM_WRITEB_CMD_RSTATN_ENABLED 1 |
803 | #define TRACE_ESP_MEM_WRITEB_CMD_SEL_ENABLED 1 |
804 | #define TRACE_ESP_MEM_WRITEB_CMD_SELATN_ENABLED 1 |
805 | #define TRACE_ESP_MEM_WRITEB_CMD_SELATNS_ENABLED 1 |
806 | #define TRACE_ESP_MEM_WRITEB_CMD_ENSEL_ENABLED 1 |
807 | #define TRACE_ESP_MEM_WRITEB_CMD_DISSEL_ENABLED 1 |
808 | #define TRACE_ESP_PCI_ERROR_INVALID_DMA_DIRECTION_ENABLED 1 |
809 | #define TRACE_ESP_PCI_ERROR_INVALID_READ_ENABLED 1 |
810 | #define TRACE_ESP_PCI_ERROR_INVALID_WRITE_ENABLED 1 |
811 | #define TRACE_ESP_PCI_ERROR_INVALID_WRITE_DMA_ENABLED 1 |
812 | #define TRACE_ESP_PCI_DMA_READ_ENABLED 1 |
813 | #define TRACE_ESP_PCI_DMA_WRITE_ENABLED 1 |
814 | #define TRACE_ESP_PCI_DMA_IDLE_ENABLED 1 |
815 | #define TRACE_ESP_PCI_DMA_BLAST_ENABLED 1 |
816 | #define TRACE_ESP_PCI_DMA_ABORT_ENABLED 1 |
817 | #define TRACE_ESP_PCI_DMA_START_ENABLED 1 |
818 | #define TRACE_ESP_PCI_SBAC_READ_ENABLED 1 |
819 | #define TRACE_ESP_PCI_SBAC_WRITE_ENABLED 1 |
820 | #define TRACE_SPAPR_VSCSI_SEND_RSP_ENABLED 1 |
821 | #define TRACE_SPAPR_VSCSI_FETCH_DESC_NO_DATA_ENABLED 1 |
822 | #define TRACE_SPAPR_VSCSI_FETCH_DESC_DIRECT_ENABLED 1 |
823 | #define TRACE_SPAPR_VSCSI_FETCH_DESC_INDIRECT_ENABLED 1 |
824 | #define TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_RANGE_ENABLED 1 |
825 | #define TRACE_SPAPR_VSCSI_FETCH_DESC_DMA_READ_ERROR_ENABLED 1 |
826 | #define TRACE_SPAPR_VSCSI_FETCH_DESC_INDIRECT_SEG_EXT_ENABLED 1 |
827 | #define TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_DESC_ENABLED 1 |
828 | #define TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_DESC_BOUNDARY_ENABLED 1 |
829 | #define TRACE_SPAPR_VSCSI_FETCH_DESC_DONE_ENABLED 1 |
830 | #define TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_ENABLED 1 |
831 | #define TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_RW_ENABLED 1 |
832 | #define TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_BUF_ENABLED 1 |
833 | #define TRACE_SPAPR_VSCSI_SRP_TRANSFER_DATA_ENABLED 1 |
834 | #define TRACE_SPAPR_VSCSI_TRANSFER_DATA_ENABLED 1 |
835 | #define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_ENABLED 1 |
836 | #define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_SENSE_DATA1_ENABLED 1 |
837 | #define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_SENSE_DATA2_ENABLED 1 |
838 | #define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_STATUS_ENABLED 1 |
839 | #define TRACE_SPAPR_VSCSI_SAVE_REQUEST_ENABLED 1 |
840 | #define TRACE_SPAPR_VSCSI_LOAD_REQUEST_ENABLED 1 |
841 | #define TRACE_SPAPR_VSCSI_PROCESS_LOGIN_ENABLED 1 |
842 | #define TRACE_SPAPR_VSCSI_QUEUE_CMD_NO_DRIVE_ENABLED 1 |
843 | #define TRACE_SPAPR_VSCSI_QUEUE_CMD_ENABLED 1 |
844 | #define TRACE_SPAPR_VSCSI_DO_CRQ_ENABLED 1 |
845 | #define TRACE_LSI_RESET_ENABLED 1 |
846 | #define TRACE_LSI_UPDATE_IRQ_ENABLED 1 |
847 | #define TRACE_LSI_UPDATE_IRQ_DISCONNECTED_ENABLED 1 |
848 | #define TRACE_LSI_SCRIPT_SCSI_INTERRUPT_ENABLED 1 |
849 | #define TRACE_LSI_SCRIPT_DMA_INTERRUPT_ENABLED 1 |
850 | #define TRACE_LSI_BAD_PHASE_JUMP_ENABLED 1 |
851 | #define TRACE_LSI_BAD_PHASE_INTERRUPT_ENABLED 1 |
852 | #define TRACE_LSI_BAD_SELECTION_ENABLED 1 |
853 | #define TRACE_LSI_DO_DMA_UNAVAILABLE_ENABLED 1 |
854 | #define TRACE_LSI_DO_DMA_ENABLED 1 |
855 | #define TRACE_LSI_QUEUE_COMMAND_ENABLED 1 |
856 | #define TRACE_LSI_ADD_MSG_BYTE_ERROR_ENABLED 1 |
857 | #define TRACE_LSI_ADD_MSG_BYTE_ENABLED 1 |
858 | #define TRACE_LSI_RESELECT_ENABLED 1 |
859 | #define TRACE_LSI_QUEUE_REQ_ERROR_ENABLED 1 |
860 | #define TRACE_LSI_QUEUE_REQ_ENABLED 1 |
861 | #define TRACE_LSI_COMMAND_COMPLETE_ENABLED 1 |
862 | #define TRACE_LSI_TRANSFER_DATA_ENABLED 1 |
863 | #define TRACE_LSI_DO_COMMAND_ENABLED 1 |
864 | #define TRACE_LSI_DO_STATUS_ENABLED 1 |
865 | #define TRACE_LSI_DO_STATUS_ERROR_ENABLED 1 |
866 | #define TRACE_LSI_DO_MSGIN_ENABLED 1 |
867 | #define TRACE_LSI_DO_MSGOUT_ENABLED 1 |
868 | #define TRACE_LSI_DO_MSGOUT_DISCONNECT_ENABLED 1 |
869 | #define TRACE_LSI_DO_MSGOUT_NOOP_ENABLED 1 |
870 | #define TRACE_LSI_DO_MSGOUT_EXTENDED_ENABLED 1 |
871 | #define TRACE_LSI_DO_MSGOUT_IGNORED_ENABLED 1 |
872 | #define TRACE_LSI_DO_MSGOUT_SIMPLEQUEUE_ENABLED 1 |
873 | #define TRACE_LSI_DO_MSGOUT_ABORT_ENABLED 1 |
874 | #define TRACE_LSI_DO_MSGOUT_CLEARQUEUE_ENABLED 1 |
875 | #define TRACE_LSI_DO_MSGOUT_BUSDEVICERESET_ENABLED 1 |
876 | #define TRACE_LSI_DO_MSGOUT_SELECT_ENABLED 1 |
877 | #define TRACE_LSI_MEMCPY_ENABLED 1 |
878 | #define TRACE_LSI_WAIT_RESELECT_ENABLED 1 |
879 | #define TRACE_LSI_EXECUTE_SCRIPT_ENABLED 1 |
880 | #define TRACE_LSI_EXECUTE_SCRIPT_BLOCKMOVE_DELAYED_ENABLED 1 |
881 | #define TRACE_LSI_EXECUTE_SCRIPT_BLOCKMOVE_BADPHASE_ENABLED 1 |
882 | #define TRACE_LSI_EXECUTE_SCRIPT_IO_ALREADYRESELECTED_ENABLED 1 |
883 | #define TRACE_LSI_EXECUTE_SCRIPT_IO_SELECTED_ENABLED 1 |
884 | #define TRACE_LSI_EXECUTE_SCRIPT_IO_DISCONNECT_ENABLED 1 |
885 | #define TRACE_LSI_EXECUTE_SCRIPT_IO_SET_ENABLED 1 |
886 | #define TRACE_LSI_EXECUTE_SCRIPT_IO_CLEAR_ENABLED 1 |
887 | #define TRACE_LSI_EXECUTE_SCRIPT_IO_OPCODE_ENABLED 1 |
888 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_NOP_ENABLED 1 |
889 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_DELAYEDSELECT_TIMEOUT_ENABLED 1 |
890 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_COMPC_ENABLED 1 |
891 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_COMPP_ENABLED 1 |
892 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_COMPD_ENABLED 1 |
893 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_JUMP_ENABLED 1 |
894 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_CALL_ENABLED 1 |
895 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_RETURN_ENABLED 1 |
896 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_INTERRUPT_ENABLED 1 |
897 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_ILLEGAL_ENABLED 1 |
898 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_CC_FAILED_ENABLED 1 |
899 | #define TRACE_LSI_EXECUTE_SCRIPT_MM_LOAD_ENABLED 1 |
900 | #define TRACE_LSI_EXECUTE_SCRIPT_MM_STORE_ENABLED 1 |
901 | #define TRACE_LSI_EXECUTE_SCRIPT_STOP_ENABLED 1 |
902 | #define TRACE_LSI_AWOKEN_ENABLED 1 |
903 | #define TRACE_LSI_REG_READ_ENABLED 1 |
904 | #define TRACE_LSI_REG_WRITE_ENABLED 1 |
905 | #define TRACE_SCSI_DISK_CHECK_CONDITION_ENABLED 1 |
906 | #define TRACE_SCSI_DISK_READ_COMPLETE_ENABLED 1 |
907 | #define TRACE_SCSI_DISK_READ_DATA_COUNT_ENABLED 1 |
908 | #define TRACE_SCSI_DISK_READ_DATA_INVALID_ENABLED 1 |
909 | #define TRACE_SCSI_DISK_WRITE_COMPLETE_NOIO_ENABLED 1 |
910 | #define TRACE_SCSI_DISK_WRITE_DATA_INVALID_ENABLED 1 |
911 | #define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_00_ENABLED 1 |
912 | #define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_80_NOT_SUPPORTED_ENABLED 1 |
913 | #define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_80_ENABLED 1 |
914 | #define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_83_ENABLED 1 |
915 | #define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_B0_NOT_SUPPORTED_ENABLED 1 |
916 | #define TRACE_SCSI_DISK_EMULATE_MODE_SENSE_ENABLED 1 |
917 | #define TRACE_SCSI_DISK_EMULATE_READ_TOC_ENABLED 1 |
918 | #define TRACE_SCSI_DISK_EMULATE_READ_DATA_ENABLED 1 |
919 | #define TRACE_SCSI_DISK_EMULATE_WRITE_DATA_ENABLED 1 |
920 | #define TRACE_SCSI_DISK_EMULATE_COMMAND_SAI_16_ENABLED 1 |
921 | #define TRACE_SCSI_DISK_EMULATE_COMMAND_SAI_UNSUPPORTED_ENABLED 1 |
922 | #define TRACE_SCSI_DISK_EMULATE_COMMAND_SEEK_10_ENABLED 1 |
923 | #define TRACE_SCSI_DISK_EMULATE_COMMAND_MODE_SELECT_ENABLED 1 |
924 | #define TRACE_SCSI_DISK_EMULATE_COMMAND_MODE_SELECT_10_ENABLED 1 |
925 | #define TRACE_SCSI_DISK_EMULATE_COMMAND_UNMAP_ENABLED 1 |
926 | #define TRACE_SCSI_DISK_EMULATE_COMMAND_VERIFY_ENABLED 1 |
927 | #define TRACE_SCSI_DISK_EMULATE_COMMAND_WRITE_SAME_ENABLED 1 |
928 | #define TRACE_SCSI_DISK_EMULATE_COMMAND_UNKNOWN_ENABLED 1 |
929 | #define TRACE_SCSI_DISK_DMA_COMMAND_READ_ENABLED 1 |
930 | #define TRACE_SCSI_DISK_DMA_COMMAND_WRITE_ENABLED 1 |
931 | #define TRACE_SCSI_DISK_NEW_REQUEST_ENABLED 1 |
932 | #define TRACE_SCSI_GENERIC_COMMAND_COMPLETE_NOIO_ENABLED 1 |
933 | #define TRACE_SCSI_GENERIC_READ_COMPLETE_ENABLED 1 |
934 | #define TRACE_SCSI_GENERIC_READ_DATA_ENABLED 1 |
935 | #define TRACE_SCSI_GENERIC_WRITE_COMPLETE_ENABLED 1 |
936 | #define TRACE_SCSI_GENERIC_WRITE_COMPLETE_BLOCKSIZE_ENABLED 1 |
937 | #define TRACE_SCSI_GENERIC_WRITE_DATA_ENABLED 1 |
938 | #define TRACE_SCSI_GENERIC_SEND_COMMAND_ENABLED 1 |
939 | #define TRACE_SCSI_GENERIC_REALIZE_TYPE_ENABLED 1 |
940 | #define TRACE_SCSI_GENERIC_REALIZE_BLOCKSIZE_ENABLED 1 |
941 | #include "qemu/log-for-trace.h" |
942 | |
943 | |
944 | #define TRACE_SCSI_REQ_ALLOC_BACKEND_DSTATE() ( \ |
945 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_REQ_ALLOC) || \ |
946 | false) |
947 | |
948 | static inline void _nocheck__trace_scsi_req_alloc(int target, int lun, int tag) |
949 | { |
950 | if (trace_event_get_state(TRACE_SCSI_REQ_ALLOC) && qemu_loglevel_mask(LOG_TRACE)) { |
951 | struct timeval _now; |
952 | gettimeofday(&_now, NULL); |
953 | qemu_log("%d@%zu.%06zu:scsi_req_alloc " "target %d lun %d tag %d" "\n" , |
954 | qemu_get_thread_id(), |
955 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
956 | , target, lun, tag); |
957 | } |
958 | } |
959 | |
960 | static inline void trace_scsi_req_alloc(int target, int lun, int tag) |
961 | { |
962 | if (true) { |
963 | _nocheck__trace_scsi_req_alloc(target, lun, tag); |
964 | } |
965 | } |
966 | |
967 | #define TRACE_SCSI_REQ_CANCEL_BACKEND_DSTATE() ( \ |
968 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_REQ_CANCEL) || \ |
969 | false) |
970 | |
971 | static inline void _nocheck__trace_scsi_req_cancel(int target, int lun, int tag) |
972 | { |
973 | if (trace_event_get_state(TRACE_SCSI_REQ_CANCEL) && qemu_loglevel_mask(LOG_TRACE)) { |
974 | struct timeval _now; |
975 | gettimeofday(&_now, NULL); |
976 | qemu_log("%d@%zu.%06zu:scsi_req_cancel " "target %d lun %d tag %d" "\n" , |
977 | qemu_get_thread_id(), |
978 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
979 | , target, lun, tag); |
980 | } |
981 | } |
982 | |
983 | static inline void trace_scsi_req_cancel(int target, int lun, int tag) |
984 | { |
985 | if (true) { |
986 | _nocheck__trace_scsi_req_cancel(target, lun, tag); |
987 | } |
988 | } |
989 | |
990 | #define TRACE_SCSI_REQ_DATA_BACKEND_DSTATE() ( \ |
991 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_REQ_DATA) || \ |
992 | false) |
993 | |
994 | static inline void _nocheck__trace_scsi_req_data(int target, int lun, int tag, int len) |
995 | { |
996 | if (trace_event_get_state(TRACE_SCSI_REQ_DATA) && qemu_loglevel_mask(LOG_TRACE)) { |
997 | struct timeval _now; |
998 | gettimeofday(&_now, NULL); |
999 | qemu_log("%d@%zu.%06zu:scsi_req_data " "target %d lun %d tag %d len %d" "\n" , |
1000 | qemu_get_thread_id(), |
1001 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1002 | , target, lun, tag, len); |
1003 | } |
1004 | } |
1005 | |
1006 | static inline void trace_scsi_req_data(int target, int lun, int tag, int len) |
1007 | { |
1008 | if (true) { |
1009 | _nocheck__trace_scsi_req_data(target, lun, tag, len); |
1010 | } |
1011 | } |
1012 | |
1013 | #define TRACE_SCSI_REQ_DATA_CANCELED_BACKEND_DSTATE() ( \ |
1014 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_REQ_DATA_CANCELED) || \ |
1015 | false) |
1016 | |
1017 | static inline void _nocheck__trace_scsi_req_data_canceled(int target, int lun, int tag, int len) |
1018 | { |
1019 | if (trace_event_get_state(TRACE_SCSI_REQ_DATA_CANCELED) && qemu_loglevel_mask(LOG_TRACE)) { |
1020 | struct timeval _now; |
1021 | gettimeofday(&_now, NULL); |
1022 | qemu_log("%d@%zu.%06zu:scsi_req_data_canceled " "target %d lun %d tag %d len %d" "\n" , |
1023 | qemu_get_thread_id(), |
1024 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1025 | , target, lun, tag, len); |
1026 | } |
1027 | } |
1028 | |
1029 | static inline void trace_scsi_req_data_canceled(int target, int lun, int tag, int len) |
1030 | { |
1031 | if (true) { |
1032 | _nocheck__trace_scsi_req_data_canceled(target, lun, tag, len); |
1033 | } |
1034 | } |
1035 | |
1036 | #define TRACE_SCSI_REQ_DEQUEUE_BACKEND_DSTATE() ( \ |
1037 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_REQ_DEQUEUE) || \ |
1038 | false) |
1039 | |
1040 | static inline void _nocheck__trace_scsi_req_dequeue(int target, int lun, int tag) |
1041 | { |
1042 | if (trace_event_get_state(TRACE_SCSI_REQ_DEQUEUE) && qemu_loglevel_mask(LOG_TRACE)) { |
1043 | struct timeval _now; |
1044 | gettimeofday(&_now, NULL); |
1045 | qemu_log("%d@%zu.%06zu:scsi_req_dequeue " "target %d lun %d tag %d" "\n" , |
1046 | qemu_get_thread_id(), |
1047 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1048 | , target, lun, tag); |
1049 | } |
1050 | } |
1051 | |
1052 | static inline void trace_scsi_req_dequeue(int target, int lun, int tag) |
1053 | { |
1054 | if (true) { |
1055 | _nocheck__trace_scsi_req_dequeue(target, lun, tag); |
1056 | } |
1057 | } |
1058 | |
1059 | #define TRACE_SCSI_REQ_CONTINUE_BACKEND_DSTATE() ( \ |
1060 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_REQ_CONTINUE) || \ |
1061 | false) |
1062 | |
1063 | static inline void _nocheck__trace_scsi_req_continue(int target, int lun, int tag) |
1064 | { |
1065 | if (trace_event_get_state(TRACE_SCSI_REQ_CONTINUE) && qemu_loglevel_mask(LOG_TRACE)) { |
1066 | struct timeval _now; |
1067 | gettimeofday(&_now, NULL); |
1068 | qemu_log("%d@%zu.%06zu:scsi_req_continue " "target %d lun %d tag %d" "\n" , |
1069 | qemu_get_thread_id(), |
1070 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1071 | , target, lun, tag); |
1072 | } |
1073 | } |
1074 | |
1075 | static inline void trace_scsi_req_continue(int target, int lun, int tag) |
1076 | { |
1077 | if (true) { |
1078 | _nocheck__trace_scsi_req_continue(target, lun, tag); |
1079 | } |
1080 | } |
1081 | |
1082 | #define TRACE_SCSI_REQ_CONTINUE_CANCELED_BACKEND_DSTATE() ( \ |
1083 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_REQ_CONTINUE_CANCELED) || \ |
1084 | false) |
1085 | |
1086 | static inline void _nocheck__trace_scsi_req_continue_canceled(int target, int lun, int tag) |
1087 | { |
1088 | if (trace_event_get_state(TRACE_SCSI_REQ_CONTINUE_CANCELED) && qemu_loglevel_mask(LOG_TRACE)) { |
1089 | struct timeval _now; |
1090 | gettimeofday(&_now, NULL); |
1091 | qemu_log("%d@%zu.%06zu:scsi_req_continue_canceled " "target %d lun %d tag %d" "\n" , |
1092 | qemu_get_thread_id(), |
1093 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1094 | , target, lun, tag); |
1095 | } |
1096 | } |
1097 | |
1098 | static inline void trace_scsi_req_continue_canceled(int target, int lun, int tag) |
1099 | { |
1100 | if (true) { |
1101 | _nocheck__trace_scsi_req_continue_canceled(target, lun, tag); |
1102 | } |
1103 | } |
1104 | |
1105 | #define TRACE_SCSI_REQ_PARSED_BACKEND_DSTATE() ( \ |
1106 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_REQ_PARSED) || \ |
1107 | false) |
1108 | |
1109 | static inline void _nocheck__trace_scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) |
1110 | { |
1111 | if (trace_event_get_state(TRACE_SCSI_REQ_PARSED) && qemu_loglevel_mask(LOG_TRACE)) { |
1112 | struct timeval _now; |
1113 | gettimeofday(&_now, NULL); |
1114 | qemu_log("%d@%zu.%06zu:scsi_req_parsed " "target %d lun %d tag %d command %d dir %d length %d" "\n" , |
1115 | qemu_get_thread_id(), |
1116 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1117 | , target, lun, tag, cmd, mode, xfer); |
1118 | } |
1119 | } |
1120 | |
1121 | static inline void trace_scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) |
1122 | { |
1123 | if (true) { |
1124 | _nocheck__trace_scsi_req_parsed(target, lun, tag, cmd, mode, xfer); |
1125 | } |
1126 | } |
1127 | |
1128 | #define TRACE_SCSI_REQ_PARSED_LBA_BACKEND_DSTATE() ( \ |
1129 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_REQ_PARSED_LBA) || \ |
1130 | false) |
1131 | |
1132 | static inline void _nocheck__trace_scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) |
1133 | { |
1134 | if (trace_event_get_state(TRACE_SCSI_REQ_PARSED_LBA) && qemu_loglevel_mask(LOG_TRACE)) { |
1135 | struct timeval _now; |
1136 | gettimeofday(&_now, NULL); |
1137 | qemu_log("%d@%zu.%06zu:scsi_req_parsed_lba " "target %d lun %d tag %d command %d lba %" PRIu64 "\n" , |
1138 | qemu_get_thread_id(), |
1139 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1140 | , target, lun, tag, cmd, lba); |
1141 | } |
1142 | } |
1143 | |
1144 | static inline void trace_scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) |
1145 | { |
1146 | if (true) { |
1147 | _nocheck__trace_scsi_req_parsed_lba(target, lun, tag, cmd, lba); |
1148 | } |
1149 | } |
1150 | |
1151 | #define TRACE_SCSI_REQ_PARSE_BAD_BACKEND_DSTATE() ( \ |
1152 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_REQ_PARSE_BAD) || \ |
1153 | false) |
1154 | |
1155 | static inline void _nocheck__trace_scsi_req_parse_bad(int target, int lun, int tag, int cmd) |
1156 | { |
1157 | if (trace_event_get_state(TRACE_SCSI_REQ_PARSE_BAD) && qemu_loglevel_mask(LOG_TRACE)) { |
1158 | struct timeval _now; |
1159 | gettimeofday(&_now, NULL); |
1160 | qemu_log("%d@%zu.%06zu:scsi_req_parse_bad " "target %d lun %d tag %d command %d" "\n" , |
1161 | qemu_get_thread_id(), |
1162 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1163 | , target, lun, tag, cmd); |
1164 | } |
1165 | } |
1166 | |
1167 | static inline void trace_scsi_req_parse_bad(int target, int lun, int tag, int cmd) |
1168 | { |
1169 | if (true) { |
1170 | _nocheck__trace_scsi_req_parse_bad(target, lun, tag, cmd); |
1171 | } |
1172 | } |
1173 | |
1174 | #define TRACE_SCSI_REQ_BUILD_SENSE_BACKEND_DSTATE() ( \ |
1175 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_REQ_BUILD_SENSE) || \ |
1176 | false) |
1177 | |
1178 | static inline void _nocheck__trace_scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) |
1179 | { |
1180 | if (trace_event_get_state(TRACE_SCSI_REQ_BUILD_SENSE) && qemu_loglevel_mask(LOG_TRACE)) { |
1181 | struct timeval _now; |
1182 | gettimeofday(&_now, NULL); |
1183 | qemu_log("%d@%zu.%06zu:scsi_req_build_sense " "target %d lun %d tag %d key 0x%02x asc 0x%02x ascq 0x%02x" "\n" , |
1184 | qemu_get_thread_id(), |
1185 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1186 | , target, lun, tag, key, asc, ascq); |
1187 | } |
1188 | } |
1189 | |
1190 | static inline void trace_scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) |
1191 | { |
1192 | if (true) { |
1193 | _nocheck__trace_scsi_req_build_sense(target, lun, tag, key, asc, ascq); |
1194 | } |
1195 | } |
1196 | |
1197 | #define TRACE_SCSI_DEVICE_SET_UA_BACKEND_DSTATE() ( \ |
1198 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DEVICE_SET_UA) || \ |
1199 | false) |
1200 | |
1201 | static inline void _nocheck__trace_scsi_device_set_ua(int target, int lun, int key, int asc, int ascq) |
1202 | { |
1203 | if (trace_event_get_state(TRACE_SCSI_DEVICE_SET_UA) && qemu_loglevel_mask(LOG_TRACE)) { |
1204 | struct timeval _now; |
1205 | gettimeofday(&_now, NULL); |
1206 | qemu_log("%d@%zu.%06zu:scsi_device_set_ua " "target %d lun %d key 0x%02x asc 0x%02x ascq 0x%02x" "\n" , |
1207 | qemu_get_thread_id(), |
1208 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1209 | , target, lun, key, asc, ascq); |
1210 | } |
1211 | } |
1212 | |
1213 | static inline void trace_scsi_device_set_ua(int target, int lun, int key, int asc, int ascq) |
1214 | { |
1215 | if (true) { |
1216 | _nocheck__trace_scsi_device_set_ua(target, lun, key, asc, ascq); |
1217 | } |
1218 | } |
1219 | |
1220 | #define TRACE_SCSI_REPORT_LUNS_BACKEND_DSTATE() ( \ |
1221 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_REPORT_LUNS) || \ |
1222 | false) |
1223 | |
1224 | static inline void _nocheck__trace_scsi_report_luns(int target, int lun, int tag) |
1225 | { |
1226 | if (trace_event_get_state(TRACE_SCSI_REPORT_LUNS) && qemu_loglevel_mask(LOG_TRACE)) { |
1227 | struct timeval _now; |
1228 | gettimeofday(&_now, NULL); |
1229 | qemu_log("%d@%zu.%06zu:scsi_report_luns " "target %d lun %d tag %d" "\n" , |
1230 | qemu_get_thread_id(), |
1231 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1232 | , target, lun, tag); |
1233 | } |
1234 | } |
1235 | |
1236 | static inline void trace_scsi_report_luns(int target, int lun, int tag) |
1237 | { |
1238 | if (true) { |
1239 | _nocheck__trace_scsi_report_luns(target, lun, tag); |
1240 | } |
1241 | } |
1242 | |
1243 | #define TRACE_SCSI_INQUIRY_BACKEND_DSTATE() ( \ |
1244 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_INQUIRY) || \ |
1245 | false) |
1246 | |
1247 | static inline void _nocheck__trace_scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) |
1248 | { |
1249 | if (trace_event_get_state(TRACE_SCSI_INQUIRY) && qemu_loglevel_mask(LOG_TRACE)) { |
1250 | struct timeval _now; |
1251 | gettimeofday(&_now, NULL); |
1252 | qemu_log("%d@%zu.%06zu:scsi_inquiry " "target %d lun %d tag %d page 0x%02x/0x%02x" "\n" , |
1253 | qemu_get_thread_id(), |
1254 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1255 | , target, lun, tag, cdb1, cdb2); |
1256 | } |
1257 | } |
1258 | |
1259 | static inline void trace_scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) |
1260 | { |
1261 | if (true) { |
1262 | _nocheck__trace_scsi_inquiry(target, lun, tag, cdb1, cdb2); |
1263 | } |
1264 | } |
1265 | |
1266 | #define TRACE_SCSI_TEST_UNIT_READY_BACKEND_DSTATE() ( \ |
1267 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_TEST_UNIT_READY) || \ |
1268 | false) |
1269 | |
1270 | static inline void _nocheck__trace_scsi_test_unit_ready(int target, int lun, int tag) |
1271 | { |
1272 | if (trace_event_get_state(TRACE_SCSI_TEST_UNIT_READY) && qemu_loglevel_mask(LOG_TRACE)) { |
1273 | struct timeval _now; |
1274 | gettimeofday(&_now, NULL); |
1275 | qemu_log("%d@%zu.%06zu:scsi_test_unit_ready " "target %d lun %d tag %d" "\n" , |
1276 | qemu_get_thread_id(), |
1277 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1278 | , target, lun, tag); |
1279 | } |
1280 | } |
1281 | |
1282 | static inline void trace_scsi_test_unit_ready(int target, int lun, int tag) |
1283 | { |
1284 | if (true) { |
1285 | _nocheck__trace_scsi_test_unit_ready(target, lun, tag); |
1286 | } |
1287 | } |
1288 | |
1289 | #define TRACE_SCSI_REQUEST_SENSE_BACKEND_DSTATE() ( \ |
1290 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_REQUEST_SENSE) || \ |
1291 | false) |
1292 | |
1293 | static inline void _nocheck__trace_scsi_request_sense(int target, int lun, int tag) |
1294 | { |
1295 | if (trace_event_get_state(TRACE_SCSI_REQUEST_SENSE) && qemu_loglevel_mask(LOG_TRACE)) { |
1296 | struct timeval _now; |
1297 | gettimeofday(&_now, NULL); |
1298 | qemu_log("%d@%zu.%06zu:scsi_request_sense " "target %d lun %d tag %d" "\n" , |
1299 | qemu_get_thread_id(), |
1300 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1301 | , target, lun, tag); |
1302 | } |
1303 | } |
1304 | |
1305 | static inline void trace_scsi_request_sense(int target, int lun, int tag) |
1306 | { |
1307 | if (true) { |
1308 | _nocheck__trace_scsi_request_sense(target, lun, tag); |
1309 | } |
1310 | } |
1311 | |
1312 | #define TRACE_MPTSAS_COMMAND_COMPLETE_BACKEND_DSTATE() ( \ |
1313 | trace_event_get_state_dynamic_by_id(TRACE_MPTSAS_COMMAND_COMPLETE) || \ |
1314 | false) |
1315 | |
1316 | static inline void _nocheck__trace_mptsas_command_complete(void * dev, uint32_t ctx, uint32_t status, uint32_t resid) |
1317 | { |
1318 | if (trace_event_get_state(TRACE_MPTSAS_COMMAND_COMPLETE) && qemu_loglevel_mask(LOG_TRACE)) { |
1319 | struct timeval _now; |
1320 | gettimeofday(&_now, NULL); |
1321 | qemu_log("%d@%zu.%06zu:mptsas_command_complete " "dev %p context 0x%08x status 0x%x resid %d" "\n" , |
1322 | qemu_get_thread_id(), |
1323 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1324 | , dev, ctx, status, resid); |
1325 | } |
1326 | } |
1327 | |
1328 | static inline void trace_mptsas_command_complete(void * dev, uint32_t ctx, uint32_t status, uint32_t resid) |
1329 | { |
1330 | if (true) { |
1331 | _nocheck__trace_mptsas_command_complete(dev, ctx, status, resid); |
1332 | } |
1333 | } |
1334 | |
1335 | #define TRACE_MPTSAS_DIAG_READ_BACKEND_DSTATE() ( \ |
1336 | trace_event_get_state_dynamic_by_id(TRACE_MPTSAS_DIAG_READ) || \ |
1337 | false) |
1338 | |
1339 | static inline void _nocheck__trace_mptsas_diag_read(void * dev, uint32_t addr, uint32_t val) |
1340 | { |
1341 | if (trace_event_get_state(TRACE_MPTSAS_DIAG_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
1342 | struct timeval _now; |
1343 | gettimeofday(&_now, NULL); |
1344 | qemu_log("%d@%zu.%06zu:mptsas_diag_read " "dev %p addr 0x%08x value 0x%08x" "\n" , |
1345 | qemu_get_thread_id(), |
1346 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1347 | , dev, addr, val); |
1348 | } |
1349 | } |
1350 | |
1351 | static inline void trace_mptsas_diag_read(void * dev, uint32_t addr, uint32_t val) |
1352 | { |
1353 | if (true) { |
1354 | _nocheck__trace_mptsas_diag_read(dev, addr, val); |
1355 | } |
1356 | } |
1357 | |
1358 | #define TRACE_MPTSAS_DIAG_WRITE_BACKEND_DSTATE() ( \ |
1359 | trace_event_get_state_dynamic_by_id(TRACE_MPTSAS_DIAG_WRITE) || \ |
1360 | false) |
1361 | |
1362 | static inline void _nocheck__trace_mptsas_diag_write(void * dev, uint32_t addr, uint32_t val) |
1363 | { |
1364 | if (trace_event_get_state(TRACE_MPTSAS_DIAG_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
1365 | struct timeval _now; |
1366 | gettimeofday(&_now, NULL); |
1367 | qemu_log("%d@%zu.%06zu:mptsas_diag_write " "dev %p addr 0x%08x value 0x%08x" "\n" , |
1368 | qemu_get_thread_id(), |
1369 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1370 | , dev, addr, val); |
1371 | } |
1372 | } |
1373 | |
1374 | static inline void trace_mptsas_diag_write(void * dev, uint32_t addr, uint32_t val) |
1375 | { |
1376 | if (true) { |
1377 | _nocheck__trace_mptsas_diag_write(dev, addr, val); |
1378 | } |
1379 | } |
1380 | |
1381 | #define TRACE_MPTSAS_IRQ_INTX_BACKEND_DSTATE() ( \ |
1382 | trace_event_get_state_dynamic_by_id(TRACE_MPTSAS_IRQ_INTX) || \ |
1383 | false) |
1384 | |
1385 | static inline void _nocheck__trace_mptsas_irq_intx(void * dev, int level) |
1386 | { |
1387 | if (trace_event_get_state(TRACE_MPTSAS_IRQ_INTX) && qemu_loglevel_mask(LOG_TRACE)) { |
1388 | struct timeval _now; |
1389 | gettimeofday(&_now, NULL); |
1390 | qemu_log("%d@%zu.%06zu:mptsas_irq_intx " "dev %p level %d" "\n" , |
1391 | qemu_get_thread_id(), |
1392 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1393 | , dev, level); |
1394 | } |
1395 | } |
1396 | |
1397 | static inline void trace_mptsas_irq_intx(void * dev, int level) |
1398 | { |
1399 | if (true) { |
1400 | _nocheck__trace_mptsas_irq_intx(dev, level); |
1401 | } |
1402 | } |
1403 | |
1404 | #define TRACE_MPTSAS_IRQ_MSI_BACKEND_DSTATE() ( \ |
1405 | trace_event_get_state_dynamic_by_id(TRACE_MPTSAS_IRQ_MSI) || \ |
1406 | false) |
1407 | |
1408 | static inline void _nocheck__trace_mptsas_irq_msi(void * dev) |
1409 | { |
1410 | if (trace_event_get_state(TRACE_MPTSAS_IRQ_MSI) && qemu_loglevel_mask(LOG_TRACE)) { |
1411 | struct timeval _now; |
1412 | gettimeofday(&_now, NULL); |
1413 | qemu_log("%d@%zu.%06zu:mptsas_irq_msi " "dev %p " "\n" , |
1414 | qemu_get_thread_id(), |
1415 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1416 | , dev); |
1417 | } |
1418 | } |
1419 | |
1420 | static inline void trace_mptsas_irq_msi(void * dev) |
1421 | { |
1422 | if (true) { |
1423 | _nocheck__trace_mptsas_irq_msi(dev); |
1424 | } |
1425 | } |
1426 | |
1427 | #define TRACE_MPTSAS_MMIO_READ_BACKEND_DSTATE() ( \ |
1428 | trace_event_get_state_dynamic_by_id(TRACE_MPTSAS_MMIO_READ) || \ |
1429 | false) |
1430 | |
1431 | static inline void _nocheck__trace_mptsas_mmio_read(void * dev, uint32_t addr, uint32_t val) |
1432 | { |
1433 | if (trace_event_get_state(TRACE_MPTSAS_MMIO_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
1434 | struct timeval _now; |
1435 | gettimeofday(&_now, NULL); |
1436 | qemu_log("%d@%zu.%06zu:mptsas_mmio_read " "dev %p addr 0x%08x value 0x%x" "\n" , |
1437 | qemu_get_thread_id(), |
1438 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1439 | , dev, addr, val); |
1440 | } |
1441 | } |
1442 | |
1443 | static inline void trace_mptsas_mmio_read(void * dev, uint32_t addr, uint32_t val) |
1444 | { |
1445 | if (true) { |
1446 | _nocheck__trace_mptsas_mmio_read(dev, addr, val); |
1447 | } |
1448 | } |
1449 | |
1450 | #define TRACE_MPTSAS_MMIO_UNHANDLED_READ_BACKEND_DSTATE() ( \ |
1451 | trace_event_get_state_dynamic_by_id(TRACE_MPTSAS_MMIO_UNHANDLED_READ) || \ |
1452 | false) |
1453 | |
1454 | static inline void _nocheck__trace_mptsas_mmio_unhandled_read(void * dev, uint32_t addr) |
1455 | { |
1456 | if (trace_event_get_state(TRACE_MPTSAS_MMIO_UNHANDLED_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
1457 | struct timeval _now; |
1458 | gettimeofday(&_now, NULL); |
1459 | qemu_log("%d@%zu.%06zu:mptsas_mmio_unhandled_read " "dev %p addr 0x%08x" "\n" , |
1460 | qemu_get_thread_id(), |
1461 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1462 | , dev, addr); |
1463 | } |
1464 | } |
1465 | |
1466 | static inline void trace_mptsas_mmio_unhandled_read(void * dev, uint32_t addr) |
1467 | { |
1468 | if (true) { |
1469 | _nocheck__trace_mptsas_mmio_unhandled_read(dev, addr); |
1470 | } |
1471 | } |
1472 | |
1473 | #define TRACE_MPTSAS_MMIO_UNHANDLED_WRITE_BACKEND_DSTATE() ( \ |
1474 | trace_event_get_state_dynamic_by_id(TRACE_MPTSAS_MMIO_UNHANDLED_WRITE) || \ |
1475 | false) |
1476 | |
1477 | static inline void _nocheck__trace_mptsas_mmio_unhandled_write(void * dev, uint32_t addr, uint32_t val) |
1478 | { |
1479 | if (trace_event_get_state(TRACE_MPTSAS_MMIO_UNHANDLED_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
1480 | struct timeval _now; |
1481 | gettimeofday(&_now, NULL); |
1482 | qemu_log("%d@%zu.%06zu:mptsas_mmio_unhandled_write " "dev %p addr 0x%08x value 0x%x" "\n" , |
1483 | qemu_get_thread_id(), |
1484 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1485 | , dev, addr, val); |
1486 | } |
1487 | } |
1488 | |
1489 | static inline void trace_mptsas_mmio_unhandled_write(void * dev, uint32_t addr, uint32_t val) |
1490 | { |
1491 | if (true) { |
1492 | _nocheck__trace_mptsas_mmio_unhandled_write(dev, addr, val); |
1493 | } |
1494 | } |
1495 | |
1496 | #define TRACE_MPTSAS_MMIO_WRITE_BACKEND_DSTATE() ( \ |
1497 | trace_event_get_state_dynamic_by_id(TRACE_MPTSAS_MMIO_WRITE) || \ |
1498 | false) |
1499 | |
1500 | static inline void _nocheck__trace_mptsas_mmio_write(void * dev, uint32_t addr, uint32_t val) |
1501 | { |
1502 | if (trace_event_get_state(TRACE_MPTSAS_MMIO_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
1503 | struct timeval _now; |
1504 | gettimeofday(&_now, NULL); |
1505 | qemu_log("%d@%zu.%06zu:mptsas_mmio_write " "dev %p addr 0x%08x value 0x%x" "\n" , |
1506 | qemu_get_thread_id(), |
1507 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1508 | , dev, addr, val); |
1509 | } |
1510 | } |
1511 | |
1512 | static inline void trace_mptsas_mmio_write(void * dev, uint32_t addr, uint32_t val) |
1513 | { |
1514 | if (true) { |
1515 | _nocheck__trace_mptsas_mmio_write(dev, addr, val); |
1516 | } |
1517 | } |
1518 | |
1519 | #define TRACE_MPTSAS_PROCESS_MESSAGE_BACKEND_DSTATE() ( \ |
1520 | trace_event_get_state_dynamic_by_id(TRACE_MPTSAS_PROCESS_MESSAGE) || \ |
1521 | false) |
1522 | |
1523 | static inline void _nocheck__trace_mptsas_process_message(void * dev, int msg, uint32_t ctx) |
1524 | { |
1525 | if (trace_event_get_state(TRACE_MPTSAS_PROCESS_MESSAGE) && qemu_loglevel_mask(LOG_TRACE)) { |
1526 | struct timeval _now; |
1527 | gettimeofday(&_now, NULL); |
1528 | qemu_log("%d@%zu.%06zu:mptsas_process_message " "dev %p cmd %d context 0x%08x\n" "\n" , |
1529 | qemu_get_thread_id(), |
1530 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1531 | , dev, msg, ctx); |
1532 | } |
1533 | } |
1534 | |
1535 | static inline void trace_mptsas_process_message(void * dev, int msg, uint32_t ctx) |
1536 | { |
1537 | if (true) { |
1538 | _nocheck__trace_mptsas_process_message(dev, msg, ctx); |
1539 | } |
1540 | } |
1541 | |
1542 | #define TRACE_MPTSAS_PROCESS_SCSI_IO_REQUEST_BACKEND_DSTATE() ( \ |
1543 | trace_event_get_state_dynamic_by_id(TRACE_MPTSAS_PROCESS_SCSI_IO_REQUEST) || \ |
1544 | false) |
1545 | |
1546 | static inline void _nocheck__trace_mptsas_process_scsi_io_request(void * dev, int bus, int target, int lun, uint64_t len) |
1547 | { |
1548 | if (trace_event_get_state(TRACE_MPTSAS_PROCESS_SCSI_IO_REQUEST) && qemu_loglevel_mask(LOG_TRACE)) { |
1549 | struct timeval _now; |
1550 | gettimeofday(&_now, NULL); |
1551 | qemu_log("%d@%zu.%06zu:mptsas_process_scsi_io_request " "dev %p dev %d:%d:%d length %" PRIu64"" "\n" , |
1552 | qemu_get_thread_id(), |
1553 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1554 | , dev, bus, target, lun, len); |
1555 | } |
1556 | } |
1557 | |
1558 | static inline void trace_mptsas_process_scsi_io_request(void * dev, int bus, int target, int lun, uint64_t len) |
1559 | { |
1560 | if (true) { |
1561 | _nocheck__trace_mptsas_process_scsi_io_request(dev, bus, target, lun, len); |
1562 | } |
1563 | } |
1564 | |
1565 | #define TRACE_MPTSAS_RESET_BACKEND_DSTATE() ( \ |
1566 | trace_event_get_state_dynamic_by_id(TRACE_MPTSAS_RESET) || \ |
1567 | false) |
1568 | |
1569 | static inline void _nocheck__trace_mptsas_reset(void * dev) |
1570 | { |
1571 | if (trace_event_get_state(TRACE_MPTSAS_RESET) && qemu_loglevel_mask(LOG_TRACE)) { |
1572 | struct timeval _now; |
1573 | gettimeofday(&_now, NULL); |
1574 | qemu_log("%d@%zu.%06zu:mptsas_reset " "dev %p " "\n" , |
1575 | qemu_get_thread_id(), |
1576 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1577 | , dev); |
1578 | } |
1579 | } |
1580 | |
1581 | static inline void trace_mptsas_reset(void * dev) |
1582 | { |
1583 | if (true) { |
1584 | _nocheck__trace_mptsas_reset(dev); |
1585 | } |
1586 | } |
1587 | |
1588 | #define TRACE_MPTSAS_SCSI_OVERFLOW_BACKEND_DSTATE() ( \ |
1589 | trace_event_get_state_dynamic_by_id(TRACE_MPTSAS_SCSI_OVERFLOW) || \ |
1590 | false) |
1591 | |
1592 | static inline void _nocheck__trace_mptsas_scsi_overflow(void * dev, uint32_t ctx, uint64_t req, uint64_t found) |
1593 | { |
1594 | if (trace_event_get_state(TRACE_MPTSAS_SCSI_OVERFLOW) && qemu_loglevel_mask(LOG_TRACE)) { |
1595 | struct timeval _now; |
1596 | gettimeofday(&_now, NULL); |
1597 | qemu_log("%d@%zu.%06zu:mptsas_scsi_overflow " "dev %p context 0x%08x: %" PRIu64"/%" PRIu64"" "\n" , |
1598 | qemu_get_thread_id(), |
1599 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1600 | , dev, ctx, req, found); |
1601 | } |
1602 | } |
1603 | |
1604 | static inline void trace_mptsas_scsi_overflow(void * dev, uint32_t ctx, uint64_t req, uint64_t found) |
1605 | { |
1606 | if (true) { |
1607 | _nocheck__trace_mptsas_scsi_overflow(dev, ctx, req, found); |
1608 | } |
1609 | } |
1610 | |
1611 | #define TRACE_MPTSAS_SGL_OVERFLOW_BACKEND_DSTATE() ( \ |
1612 | trace_event_get_state_dynamic_by_id(TRACE_MPTSAS_SGL_OVERFLOW) || \ |
1613 | false) |
1614 | |
1615 | static inline void _nocheck__trace_mptsas_sgl_overflow(void * dev, uint32_t ctx, uint64_t req, uint64_t found) |
1616 | { |
1617 | if (trace_event_get_state(TRACE_MPTSAS_SGL_OVERFLOW) && qemu_loglevel_mask(LOG_TRACE)) { |
1618 | struct timeval _now; |
1619 | gettimeofday(&_now, NULL); |
1620 | qemu_log("%d@%zu.%06zu:mptsas_sgl_overflow " "dev %p context 0x%08x: %" PRIu64"/%" PRIu64"" "\n" , |
1621 | qemu_get_thread_id(), |
1622 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1623 | , dev, ctx, req, found); |
1624 | } |
1625 | } |
1626 | |
1627 | static inline void trace_mptsas_sgl_overflow(void * dev, uint32_t ctx, uint64_t req, uint64_t found) |
1628 | { |
1629 | if (true) { |
1630 | _nocheck__trace_mptsas_sgl_overflow(dev, ctx, req, found); |
1631 | } |
1632 | } |
1633 | |
1634 | #define TRACE_MPTSAS_UNHANDLED_CMD_BACKEND_DSTATE() ( \ |
1635 | trace_event_get_state_dynamic_by_id(TRACE_MPTSAS_UNHANDLED_CMD) || \ |
1636 | false) |
1637 | |
1638 | static inline void _nocheck__trace_mptsas_unhandled_cmd(void * dev, uint32_t ctx, uint8_t msg_cmd) |
1639 | { |
1640 | if (trace_event_get_state(TRACE_MPTSAS_UNHANDLED_CMD) && qemu_loglevel_mask(LOG_TRACE)) { |
1641 | struct timeval _now; |
1642 | gettimeofday(&_now, NULL); |
1643 | qemu_log("%d@%zu.%06zu:mptsas_unhandled_cmd " "dev %p context 0x%08x: Unhandled cmd 0x%x" "\n" , |
1644 | qemu_get_thread_id(), |
1645 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1646 | , dev, ctx, msg_cmd); |
1647 | } |
1648 | } |
1649 | |
1650 | static inline void trace_mptsas_unhandled_cmd(void * dev, uint32_t ctx, uint8_t msg_cmd) |
1651 | { |
1652 | if (true) { |
1653 | _nocheck__trace_mptsas_unhandled_cmd(dev, ctx, msg_cmd); |
1654 | } |
1655 | } |
1656 | |
1657 | #define TRACE_MPTSAS_UNHANDLED_DOORBELL_CMD_BACKEND_DSTATE() ( \ |
1658 | trace_event_get_state_dynamic_by_id(TRACE_MPTSAS_UNHANDLED_DOORBELL_CMD) || \ |
1659 | false) |
1660 | |
1661 | static inline void _nocheck__trace_mptsas_unhandled_doorbell_cmd(void * dev, int cmd) |
1662 | { |
1663 | if (trace_event_get_state(TRACE_MPTSAS_UNHANDLED_DOORBELL_CMD) && qemu_loglevel_mask(LOG_TRACE)) { |
1664 | struct timeval _now; |
1665 | gettimeofday(&_now, NULL); |
1666 | qemu_log("%d@%zu.%06zu:mptsas_unhandled_doorbell_cmd " "dev %p value 0x%08x" "\n" , |
1667 | qemu_get_thread_id(), |
1668 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1669 | , dev, cmd); |
1670 | } |
1671 | } |
1672 | |
1673 | static inline void trace_mptsas_unhandled_doorbell_cmd(void * dev, int cmd) |
1674 | { |
1675 | if (true) { |
1676 | _nocheck__trace_mptsas_unhandled_doorbell_cmd(dev, cmd); |
1677 | } |
1678 | } |
1679 | |
1680 | #define TRACE_MPTSAS_CONFIG_SAS_DEVICE_BACKEND_DSTATE() ( \ |
1681 | trace_event_get_state_dynamic_by_id(TRACE_MPTSAS_CONFIG_SAS_DEVICE) || \ |
1682 | false) |
1683 | |
1684 | static inline void _nocheck__trace_mptsas_config_sas_device(void * dev, int address, int port, int phy_handle, int dev_handle, int page) |
1685 | { |
1686 | if (trace_event_get_state(TRACE_MPTSAS_CONFIG_SAS_DEVICE) && qemu_loglevel_mask(LOG_TRACE)) { |
1687 | struct timeval _now; |
1688 | gettimeofday(&_now, NULL); |
1689 | qemu_log("%d@%zu.%06zu:mptsas_config_sas_device " "dev %p address %d (port %d, handles: phy %d dev %d) page %d" "\n" , |
1690 | qemu_get_thread_id(), |
1691 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1692 | , dev, address, port, phy_handle, dev_handle, page); |
1693 | } |
1694 | } |
1695 | |
1696 | static inline void trace_mptsas_config_sas_device(void * dev, int address, int port, int phy_handle, int dev_handle, int page) |
1697 | { |
1698 | if (true) { |
1699 | _nocheck__trace_mptsas_config_sas_device(dev, address, port, phy_handle, dev_handle, page); |
1700 | } |
1701 | } |
1702 | |
1703 | #define TRACE_MPTSAS_CONFIG_SAS_PHY_BACKEND_DSTATE() ( \ |
1704 | trace_event_get_state_dynamic_by_id(TRACE_MPTSAS_CONFIG_SAS_PHY) || \ |
1705 | false) |
1706 | |
1707 | static inline void _nocheck__trace_mptsas_config_sas_phy(void * dev, int address, int port, int phy_handle, int dev_handle, int page) |
1708 | { |
1709 | if (trace_event_get_state(TRACE_MPTSAS_CONFIG_SAS_PHY) && qemu_loglevel_mask(LOG_TRACE)) { |
1710 | struct timeval _now; |
1711 | gettimeofday(&_now, NULL); |
1712 | qemu_log("%d@%zu.%06zu:mptsas_config_sas_phy " "dev %p address %d (port %d, handles: phy %d dev %d) page %d" "\n" , |
1713 | qemu_get_thread_id(), |
1714 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1715 | , dev, address, port, phy_handle, dev_handle, page); |
1716 | } |
1717 | } |
1718 | |
1719 | static inline void trace_mptsas_config_sas_phy(void * dev, int address, int port, int phy_handle, int dev_handle, int page) |
1720 | { |
1721 | if (true) { |
1722 | _nocheck__trace_mptsas_config_sas_phy(dev, address, port, phy_handle, dev_handle, page); |
1723 | } |
1724 | } |
1725 | |
1726 | #define TRACE_MEGASAS_INIT_FIRMWARE_BACKEND_DSTATE() ( \ |
1727 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_INIT_FIRMWARE) || \ |
1728 | false) |
1729 | |
1730 | static inline void _nocheck__trace_megasas_init_firmware(uint64_t pa) |
1731 | { |
1732 | if (trace_event_get_state(TRACE_MEGASAS_INIT_FIRMWARE) && qemu_loglevel_mask(LOG_TRACE)) { |
1733 | struct timeval _now; |
1734 | gettimeofday(&_now, NULL); |
1735 | qemu_log("%d@%zu.%06zu:megasas_init_firmware " "pa 0x%" PRIx64 " " "\n" , |
1736 | qemu_get_thread_id(), |
1737 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1738 | , pa); |
1739 | } |
1740 | } |
1741 | |
1742 | static inline void trace_megasas_init_firmware(uint64_t pa) |
1743 | { |
1744 | if (true) { |
1745 | _nocheck__trace_megasas_init_firmware(pa); |
1746 | } |
1747 | } |
1748 | |
1749 | #define TRACE_MEGASAS_INIT_QUEUE_BACKEND_DSTATE() ( \ |
1750 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_INIT_QUEUE) || \ |
1751 | false) |
1752 | |
1753 | static inline void _nocheck__trace_megasas_init_queue(uint64_t queue_pa, int queue_len, uint64_t head, uint64_t tail, uint32_t flags) |
1754 | { |
1755 | if (trace_event_get_state(TRACE_MEGASAS_INIT_QUEUE) && qemu_loglevel_mask(LOG_TRACE)) { |
1756 | struct timeval _now; |
1757 | gettimeofday(&_now, NULL); |
1758 | qemu_log("%d@%zu.%06zu:megasas_init_queue " "queue at 0x%" PRIx64 " len %d head 0x%" PRIx64 " tail 0x%" PRIx64 " flags 0x%x" "\n" , |
1759 | qemu_get_thread_id(), |
1760 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1761 | , queue_pa, queue_len, head, tail, flags); |
1762 | } |
1763 | } |
1764 | |
1765 | static inline void trace_megasas_init_queue(uint64_t queue_pa, int queue_len, uint64_t head, uint64_t tail, uint32_t flags) |
1766 | { |
1767 | if (true) { |
1768 | _nocheck__trace_megasas_init_queue(queue_pa, queue_len, head, tail, flags); |
1769 | } |
1770 | } |
1771 | |
1772 | #define TRACE_MEGASAS_INITQ_MAP_FAILED_BACKEND_DSTATE() ( \ |
1773 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_INITQ_MAP_FAILED) || \ |
1774 | false) |
1775 | |
1776 | static inline void _nocheck__trace_megasas_initq_map_failed(int frame) |
1777 | { |
1778 | if (trace_event_get_state(TRACE_MEGASAS_INITQ_MAP_FAILED) && qemu_loglevel_mask(LOG_TRACE)) { |
1779 | struct timeval _now; |
1780 | gettimeofday(&_now, NULL); |
1781 | qemu_log("%d@%zu.%06zu:megasas_initq_map_failed " "scmd %d: failed to map queue" "\n" , |
1782 | qemu_get_thread_id(), |
1783 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1784 | , frame); |
1785 | } |
1786 | } |
1787 | |
1788 | static inline void trace_megasas_initq_map_failed(int frame) |
1789 | { |
1790 | if (true) { |
1791 | _nocheck__trace_megasas_initq_map_failed(frame); |
1792 | } |
1793 | } |
1794 | |
1795 | #define TRACE_MEGASAS_INITQ_MAPPED_BACKEND_DSTATE() ( \ |
1796 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_INITQ_MAPPED) || \ |
1797 | false) |
1798 | |
1799 | static inline void _nocheck__trace_megasas_initq_mapped(uint64_t pa) |
1800 | { |
1801 | if (trace_event_get_state(TRACE_MEGASAS_INITQ_MAPPED) && qemu_loglevel_mask(LOG_TRACE)) { |
1802 | struct timeval _now; |
1803 | gettimeofday(&_now, NULL); |
1804 | qemu_log("%d@%zu.%06zu:megasas_initq_mapped " "queue already mapped at 0x%" PRIx64 "\n" , |
1805 | qemu_get_thread_id(), |
1806 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1807 | , pa); |
1808 | } |
1809 | } |
1810 | |
1811 | static inline void trace_megasas_initq_mapped(uint64_t pa) |
1812 | { |
1813 | if (true) { |
1814 | _nocheck__trace_megasas_initq_mapped(pa); |
1815 | } |
1816 | } |
1817 | |
1818 | #define TRACE_MEGASAS_INITQ_MISMATCH_BACKEND_DSTATE() ( \ |
1819 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_INITQ_MISMATCH) || \ |
1820 | false) |
1821 | |
1822 | static inline void _nocheck__trace_megasas_initq_mismatch(int queue_len, int fw_cmds) |
1823 | { |
1824 | if (trace_event_get_state(TRACE_MEGASAS_INITQ_MISMATCH) && qemu_loglevel_mask(LOG_TRACE)) { |
1825 | struct timeval _now; |
1826 | gettimeofday(&_now, NULL); |
1827 | qemu_log("%d@%zu.%06zu:megasas_initq_mismatch " "queue size %d max fw cmds %d" "\n" , |
1828 | qemu_get_thread_id(), |
1829 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1830 | , queue_len, fw_cmds); |
1831 | } |
1832 | } |
1833 | |
1834 | static inline void trace_megasas_initq_mismatch(int queue_len, int fw_cmds) |
1835 | { |
1836 | if (true) { |
1837 | _nocheck__trace_megasas_initq_mismatch(queue_len, fw_cmds); |
1838 | } |
1839 | } |
1840 | |
1841 | #define TRACE_MEGASAS_QF_MAPPED_BACKEND_DSTATE() ( \ |
1842 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_QF_MAPPED) || \ |
1843 | false) |
1844 | |
1845 | static inline void _nocheck__trace_megasas_qf_mapped(unsigned int index) |
1846 | { |
1847 | if (trace_event_get_state(TRACE_MEGASAS_QF_MAPPED) && qemu_loglevel_mask(LOG_TRACE)) { |
1848 | struct timeval _now; |
1849 | gettimeofday(&_now, NULL); |
1850 | qemu_log("%d@%zu.%06zu:megasas_qf_mapped " "skip mapped frame 0x%x" "\n" , |
1851 | qemu_get_thread_id(), |
1852 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1853 | , index); |
1854 | } |
1855 | } |
1856 | |
1857 | static inline void trace_megasas_qf_mapped(unsigned int index) |
1858 | { |
1859 | if (true) { |
1860 | _nocheck__trace_megasas_qf_mapped(index); |
1861 | } |
1862 | } |
1863 | |
1864 | #define TRACE_MEGASAS_QF_NEW_BACKEND_DSTATE() ( \ |
1865 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_QF_NEW) || \ |
1866 | false) |
1867 | |
1868 | static inline void _nocheck__trace_megasas_qf_new(unsigned int index, uint64_t frame) |
1869 | { |
1870 | if (trace_event_get_state(TRACE_MEGASAS_QF_NEW) && qemu_loglevel_mask(LOG_TRACE)) { |
1871 | struct timeval _now; |
1872 | gettimeofday(&_now, NULL); |
1873 | qemu_log("%d@%zu.%06zu:megasas_qf_new " "frame 0x%x addr 0x%" PRIx64 "\n" , |
1874 | qemu_get_thread_id(), |
1875 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1876 | , index, frame); |
1877 | } |
1878 | } |
1879 | |
1880 | static inline void trace_megasas_qf_new(unsigned int index, uint64_t frame) |
1881 | { |
1882 | if (true) { |
1883 | _nocheck__trace_megasas_qf_new(index, frame); |
1884 | } |
1885 | } |
1886 | |
1887 | #define TRACE_MEGASAS_QF_BUSY_BACKEND_DSTATE() ( \ |
1888 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_QF_BUSY) || \ |
1889 | false) |
1890 | |
1891 | static inline void _nocheck__trace_megasas_qf_busy(unsigned long pa) |
1892 | { |
1893 | if (trace_event_get_state(TRACE_MEGASAS_QF_BUSY) && qemu_loglevel_mask(LOG_TRACE)) { |
1894 | struct timeval _now; |
1895 | gettimeofday(&_now, NULL); |
1896 | qemu_log("%d@%zu.%06zu:megasas_qf_busy " "all frames busy for frame 0x%lx" "\n" , |
1897 | qemu_get_thread_id(), |
1898 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1899 | , pa); |
1900 | } |
1901 | } |
1902 | |
1903 | static inline void trace_megasas_qf_busy(unsigned long pa) |
1904 | { |
1905 | if (true) { |
1906 | _nocheck__trace_megasas_qf_busy(pa); |
1907 | } |
1908 | } |
1909 | |
1910 | #define TRACE_MEGASAS_QF_ENQUEUE_BACKEND_DSTATE() ( \ |
1911 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_QF_ENQUEUE) || \ |
1912 | false) |
1913 | |
1914 | static inline void _nocheck__trace_megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, unsigned int head, unsigned int tail, int busy) |
1915 | { |
1916 | if (trace_event_get_state(TRACE_MEGASAS_QF_ENQUEUE) && qemu_loglevel_mask(LOG_TRACE)) { |
1917 | struct timeval _now; |
1918 | gettimeofday(&_now, NULL); |
1919 | qemu_log("%d@%zu.%06zu:megasas_qf_enqueue " "frame 0x%x count %d context 0x%" PRIx64 " head 0x%x tail 0x%x busy %d" "\n" , |
1920 | qemu_get_thread_id(), |
1921 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1922 | , index, count, context, head, tail, busy); |
1923 | } |
1924 | } |
1925 | |
1926 | static inline void trace_megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, unsigned int head, unsigned int tail, int busy) |
1927 | { |
1928 | if (true) { |
1929 | _nocheck__trace_megasas_qf_enqueue(index, count, context, head, tail, busy); |
1930 | } |
1931 | } |
1932 | |
1933 | #define TRACE_MEGASAS_QF_UPDATE_BACKEND_DSTATE() ( \ |
1934 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_QF_UPDATE) || \ |
1935 | false) |
1936 | |
1937 | static inline void _nocheck__trace_megasas_qf_update(unsigned int head, unsigned int tail, unsigned int busy) |
1938 | { |
1939 | if (trace_event_get_state(TRACE_MEGASAS_QF_UPDATE) && qemu_loglevel_mask(LOG_TRACE)) { |
1940 | struct timeval _now; |
1941 | gettimeofday(&_now, NULL); |
1942 | qemu_log("%d@%zu.%06zu:megasas_qf_update " "head 0x%x tail 0x%x busy %d" "\n" , |
1943 | qemu_get_thread_id(), |
1944 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1945 | , head, tail, busy); |
1946 | } |
1947 | } |
1948 | |
1949 | static inline void trace_megasas_qf_update(unsigned int head, unsigned int tail, unsigned int busy) |
1950 | { |
1951 | if (true) { |
1952 | _nocheck__trace_megasas_qf_update(head, tail, busy); |
1953 | } |
1954 | } |
1955 | |
1956 | #define TRACE_MEGASAS_QF_MAP_FAILED_BACKEND_DSTATE() ( \ |
1957 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_QF_MAP_FAILED) || \ |
1958 | false) |
1959 | |
1960 | static inline void _nocheck__trace_megasas_qf_map_failed(int cmd, unsigned long frame) |
1961 | { |
1962 | if (trace_event_get_state(TRACE_MEGASAS_QF_MAP_FAILED) && qemu_loglevel_mask(LOG_TRACE)) { |
1963 | struct timeval _now; |
1964 | gettimeofday(&_now, NULL); |
1965 | qemu_log("%d@%zu.%06zu:megasas_qf_map_failed " "scmd %d: frame %lu" "\n" , |
1966 | qemu_get_thread_id(), |
1967 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1968 | , cmd, frame); |
1969 | } |
1970 | } |
1971 | |
1972 | static inline void trace_megasas_qf_map_failed(int cmd, unsigned long frame) |
1973 | { |
1974 | if (true) { |
1975 | _nocheck__trace_megasas_qf_map_failed(cmd, frame); |
1976 | } |
1977 | } |
1978 | |
1979 | #define TRACE_MEGASAS_QF_COMPLETE_NOIRQ_BACKEND_DSTATE() ( \ |
1980 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_QF_COMPLETE_NOIRQ) || \ |
1981 | false) |
1982 | |
1983 | static inline void _nocheck__trace_megasas_qf_complete_noirq(uint64_t context) |
1984 | { |
1985 | if (trace_event_get_state(TRACE_MEGASAS_QF_COMPLETE_NOIRQ) && qemu_loglevel_mask(LOG_TRACE)) { |
1986 | struct timeval _now; |
1987 | gettimeofday(&_now, NULL); |
1988 | qemu_log("%d@%zu.%06zu:megasas_qf_complete_noirq " "context 0x%" PRIx64 " " "\n" , |
1989 | qemu_get_thread_id(), |
1990 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1991 | , context); |
1992 | } |
1993 | } |
1994 | |
1995 | static inline void trace_megasas_qf_complete_noirq(uint64_t context) |
1996 | { |
1997 | if (true) { |
1998 | _nocheck__trace_megasas_qf_complete_noirq(context); |
1999 | } |
2000 | } |
2001 | |
2002 | #define TRACE_MEGASAS_QF_COMPLETE_BACKEND_DSTATE() ( \ |
2003 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_QF_COMPLETE) || \ |
2004 | false) |
2005 | |
2006 | static inline void _nocheck__trace_megasas_qf_complete(uint64_t context, unsigned int head, unsigned int tail, int busy) |
2007 | { |
2008 | if (trace_event_get_state(TRACE_MEGASAS_QF_COMPLETE) && qemu_loglevel_mask(LOG_TRACE)) { |
2009 | struct timeval _now; |
2010 | gettimeofday(&_now, NULL); |
2011 | qemu_log("%d@%zu.%06zu:megasas_qf_complete " "context 0x%" PRIx64 " head 0x%x tail 0x%x busy %d" "\n" , |
2012 | qemu_get_thread_id(), |
2013 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2014 | , context, head, tail, busy); |
2015 | } |
2016 | } |
2017 | |
2018 | static inline void trace_megasas_qf_complete(uint64_t context, unsigned int head, unsigned int tail, int busy) |
2019 | { |
2020 | if (true) { |
2021 | _nocheck__trace_megasas_qf_complete(context, head, tail, busy); |
2022 | } |
2023 | } |
2024 | |
2025 | #define TRACE_MEGASAS_FRAME_BUSY_BACKEND_DSTATE() ( \ |
2026 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_FRAME_BUSY) || \ |
2027 | false) |
2028 | |
2029 | static inline void _nocheck__trace_megasas_frame_busy(uint64_t addr) |
2030 | { |
2031 | if (trace_event_get_state(TRACE_MEGASAS_FRAME_BUSY) && qemu_loglevel_mask(LOG_TRACE)) { |
2032 | struct timeval _now; |
2033 | gettimeofday(&_now, NULL); |
2034 | qemu_log("%d@%zu.%06zu:megasas_frame_busy " "frame 0x%" PRIx64 " busy" "\n" , |
2035 | qemu_get_thread_id(), |
2036 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2037 | , addr); |
2038 | } |
2039 | } |
2040 | |
2041 | static inline void trace_megasas_frame_busy(uint64_t addr) |
2042 | { |
2043 | if (true) { |
2044 | _nocheck__trace_megasas_frame_busy(addr); |
2045 | } |
2046 | } |
2047 | |
2048 | #define TRACE_MEGASAS_UNHANDLED_FRAME_CMD_BACKEND_DSTATE() ( \ |
2049 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_UNHANDLED_FRAME_CMD) || \ |
2050 | false) |
2051 | |
2052 | static inline void _nocheck__trace_megasas_unhandled_frame_cmd(int cmd, uint8_t frame_cmd) |
2053 | { |
2054 | if (trace_event_get_state(TRACE_MEGASAS_UNHANDLED_FRAME_CMD) && qemu_loglevel_mask(LOG_TRACE)) { |
2055 | struct timeval _now; |
2056 | gettimeofday(&_now, NULL); |
2057 | qemu_log("%d@%zu.%06zu:megasas_unhandled_frame_cmd " "scmd %d: MFI cmd 0x%x" "\n" , |
2058 | qemu_get_thread_id(), |
2059 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2060 | , cmd, frame_cmd); |
2061 | } |
2062 | } |
2063 | |
2064 | static inline void trace_megasas_unhandled_frame_cmd(int cmd, uint8_t frame_cmd) |
2065 | { |
2066 | if (true) { |
2067 | _nocheck__trace_megasas_unhandled_frame_cmd(cmd, frame_cmd); |
2068 | } |
2069 | } |
2070 | |
2071 | #define TRACE_MEGASAS_HANDLE_SCSI_BACKEND_DSTATE() ( \ |
2072 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_HANDLE_SCSI) || \ |
2073 | false) |
2074 | |
2075 | static inline void _nocheck__trace_megasas_handle_scsi(const char * frame, int bus, int dev, int lun, void * sdev, unsigned long size) |
2076 | { |
2077 | if (trace_event_get_state(TRACE_MEGASAS_HANDLE_SCSI) && qemu_loglevel_mask(LOG_TRACE)) { |
2078 | struct timeval _now; |
2079 | gettimeofday(&_now, NULL); |
2080 | qemu_log("%d@%zu.%06zu:megasas_handle_scsi " "%s dev %x/%x/%x sdev %p xfer %lu" "\n" , |
2081 | qemu_get_thread_id(), |
2082 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2083 | , frame, bus, dev, lun, sdev, size); |
2084 | } |
2085 | } |
2086 | |
2087 | static inline void trace_megasas_handle_scsi(const char * frame, int bus, int dev, int lun, void * sdev, unsigned long size) |
2088 | { |
2089 | if (true) { |
2090 | _nocheck__trace_megasas_handle_scsi(frame, bus, dev, lun, sdev, size); |
2091 | } |
2092 | } |
2093 | |
2094 | #define TRACE_MEGASAS_SCSI_TARGET_NOT_PRESENT_BACKEND_DSTATE() ( \ |
2095 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_SCSI_TARGET_NOT_PRESENT) || \ |
2096 | false) |
2097 | |
2098 | static inline void _nocheck__trace_megasas_scsi_target_not_present(const char * frame, int bus, int dev, int lun) |
2099 | { |
2100 | if (trace_event_get_state(TRACE_MEGASAS_SCSI_TARGET_NOT_PRESENT) && qemu_loglevel_mask(LOG_TRACE)) { |
2101 | struct timeval _now; |
2102 | gettimeofday(&_now, NULL); |
2103 | qemu_log("%d@%zu.%06zu:megasas_scsi_target_not_present " "%s dev %x/%x/%x" "\n" , |
2104 | qemu_get_thread_id(), |
2105 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2106 | , frame, bus, dev, lun); |
2107 | } |
2108 | } |
2109 | |
2110 | static inline void trace_megasas_scsi_target_not_present(const char * frame, int bus, int dev, int lun) |
2111 | { |
2112 | if (true) { |
2113 | _nocheck__trace_megasas_scsi_target_not_present(frame, bus, dev, lun); |
2114 | } |
2115 | } |
2116 | |
2117 | #define TRACE_MEGASAS_SCSI_INVALID_CDB_LEN_BACKEND_DSTATE() ( \ |
2118 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_SCSI_INVALID_CDB_LEN) || \ |
2119 | false) |
2120 | |
2121 | static inline void _nocheck__trace_megasas_scsi_invalid_cdb_len(const char * frame, int bus, int dev, int lun, int len) |
2122 | { |
2123 | if (trace_event_get_state(TRACE_MEGASAS_SCSI_INVALID_CDB_LEN) && qemu_loglevel_mask(LOG_TRACE)) { |
2124 | struct timeval _now; |
2125 | gettimeofday(&_now, NULL); |
2126 | qemu_log("%d@%zu.%06zu:megasas_scsi_invalid_cdb_len " "%s dev %x/%x/%x invalid cdb len %d" "\n" , |
2127 | qemu_get_thread_id(), |
2128 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2129 | , frame, bus, dev, lun, len); |
2130 | } |
2131 | } |
2132 | |
2133 | static inline void trace_megasas_scsi_invalid_cdb_len(const char * frame, int bus, int dev, int lun, int len) |
2134 | { |
2135 | if (true) { |
2136 | _nocheck__trace_megasas_scsi_invalid_cdb_len(frame, bus, dev, lun, len); |
2137 | } |
2138 | } |
2139 | |
2140 | #define TRACE_MEGASAS_IOV_READ_OVERFLOW_BACKEND_DSTATE() ( \ |
2141 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_IOV_READ_OVERFLOW) || \ |
2142 | false) |
2143 | |
2144 | static inline void _nocheck__trace_megasas_iov_read_overflow(int cmd, int bytes, int len) |
2145 | { |
2146 | if (trace_event_get_state(TRACE_MEGASAS_IOV_READ_OVERFLOW) && qemu_loglevel_mask(LOG_TRACE)) { |
2147 | struct timeval _now; |
2148 | gettimeofday(&_now, NULL); |
2149 | qemu_log("%d@%zu.%06zu:megasas_iov_read_overflow " "scmd %d: %d/%d bytes" "\n" , |
2150 | qemu_get_thread_id(), |
2151 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2152 | , cmd, bytes, len); |
2153 | } |
2154 | } |
2155 | |
2156 | static inline void trace_megasas_iov_read_overflow(int cmd, int bytes, int len) |
2157 | { |
2158 | if (true) { |
2159 | _nocheck__trace_megasas_iov_read_overflow(cmd, bytes, len); |
2160 | } |
2161 | } |
2162 | |
2163 | #define TRACE_MEGASAS_IOV_WRITE_OVERFLOW_BACKEND_DSTATE() ( \ |
2164 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_IOV_WRITE_OVERFLOW) || \ |
2165 | false) |
2166 | |
2167 | static inline void _nocheck__trace_megasas_iov_write_overflow(int cmd, int bytes, int len) |
2168 | { |
2169 | if (trace_event_get_state(TRACE_MEGASAS_IOV_WRITE_OVERFLOW) && qemu_loglevel_mask(LOG_TRACE)) { |
2170 | struct timeval _now; |
2171 | gettimeofday(&_now, NULL); |
2172 | qemu_log("%d@%zu.%06zu:megasas_iov_write_overflow " "scmd %d: %d/%d bytes" "\n" , |
2173 | qemu_get_thread_id(), |
2174 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2175 | , cmd, bytes, len); |
2176 | } |
2177 | } |
2178 | |
2179 | static inline void trace_megasas_iov_write_overflow(int cmd, int bytes, int len) |
2180 | { |
2181 | if (true) { |
2182 | _nocheck__trace_megasas_iov_write_overflow(cmd, bytes, len); |
2183 | } |
2184 | } |
2185 | |
2186 | #define TRACE_MEGASAS_IOV_READ_UNDERFLOW_BACKEND_DSTATE() ( \ |
2187 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_IOV_READ_UNDERFLOW) || \ |
2188 | false) |
2189 | |
2190 | static inline void _nocheck__trace_megasas_iov_read_underflow(int cmd, int bytes, int len) |
2191 | { |
2192 | if (trace_event_get_state(TRACE_MEGASAS_IOV_READ_UNDERFLOW) && qemu_loglevel_mask(LOG_TRACE)) { |
2193 | struct timeval _now; |
2194 | gettimeofday(&_now, NULL); |
2195 | qemu_log("%d@%zu.%06zu:megasas_iov_read_underflow " "scmd %d: %d/%d bytes" "\n" , |
2196 | qemu_get_thread_id(), |
2197 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2198 | , cmd, bytes, len); |
2199 | } |
2200 | } |
2201 | |
2202 | static inline void trace_megasas_iov_read_underflow(int cmd, int bytes, int len) |
2203 | { |
2204 | if (true) { |
2205 | _nocheck__trace_megasas_iov_read_underflow(cmd, bytes, len); |
2206 | } |
2207 | } |
2208 | |
2209 | #define TRACE_MEGASAS_IOV_WRITE_UNDERFLOW_BACKEND_DSTATE() ( \ |
2210 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_IOV_WRITE_UNDERFLOW) || \ |
2211 | false) |
2212 | |
2213 | static inline void _nocheck__trace_megasas_iov_write_underflow(int cmd, int bytes, int len) |
2214 | { |
2215 | if (trace_event_get_state(TRACE_MEGASAS_IOV_WRITE_UNDERFLOW) && qemu_loglevel_mask(LOG_TRACE)) { |
2216 | struct timeval _now; |
2217 | gettimeofday(&_now, NULL); |
2218 | qemu_log("%d@%zu.%06zu:megasas_iov_write_underflow " "scmd %d: %d/%d bytes" "\n" , |
2219 | qemu_get_thread_id(), |
2220 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2221 | , cmd, bytes, len); |
2222 | } |
2223 | } |
2224 | |
2225 | static inline void trace_megasas_iov_write_underflow(int cmd, int bytes, int len) |
2226 | { |
2227 | if (true) { |
2228 | _nocheck__trace_megasas_iov_write_underflow(cmd, bytes, len); |
2229 | } |
2230 | } |
2231 | |
2232 | #define TRACE_MEGASAS_SCSI_REQ_ALLOC_FAILED_BACKEND_DSTATE() ( \ |
2233 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_SCSI_REQ_ALLOC_FAILED) || \ |
2234 | false) |
2235 | |
2236 | static inline void _nocheck__trace_megasas_scsi_req_alloc_failed(const char * frame, int dev, int lun) |
2237 | { |
2238 | if (trace_event_get_state(TRACE_MEGASAS_SCSI_REQ_ALLOC_FAILED) && qemu_loglevel_mask(LOG_TRACE)) { |
2239 | struct timeval _now; |
2240 | gettimeofday(&_now, NULL); |
2241 | qemu_log("%d@%zu.%06zu:megasas_scsi_req_alloc_failed " "%s dev %x/%x" "\n" , |
2242 | qemu_get_thread_id(), |
2243 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2244 | , frame, dev, lun); |
2245 | } |
2246 | } |
2247 | |
2248 | static inline void trace_megasas_scsi_req_alloc_failed(const char * frame, int dev, int lun) |
2249 | { |
2250 | if (true) { |
2251 | _nocheck__trace_megasas_scsi_req_alloc_failed(frame, dev, lun); |
2252 | } |
2253 | } |
2254 | |
2255 | #define TRACE_MEGASAS_SCSI_READ_START_BACKEND_DSTATE() ( \ |
2256 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_SCSI_READ_START) || \ |
2257 | false) |
2258 | |
2259 | static inline void _nocheck__trace_megasas_scsi_read_start(int cmd, int len) |
2260 | { |
2261 | if (trace_event_get_state(TRACE_MEGASAS_SCSI_READ_START) && qemu_loglevel_mask(LOG_TRACE)) { |
2262 | struct timeval _now; |
2263 | gettimeofday(&_now, NULL); |
2264 | qemu_log("%d@%zu.%06zu:megasas_scsi_read_start " "scmd %d: transfer %d bytes of data" "\n" , |
2265 | qemu_get_thread_id(), |
2266 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2267 | , cmd, len); |
2268 | } |
2269 | } |
2270 | |
2271 | static inline void trace_megasas_scsi_read_start(int cmd, int len) |
2272 | { |
2273 | if (true) { |
2274 | _nocheck__trace_megasas_scsi_read_start(cmd, len); |
2275 | } |
2276 | } |
2277 | |
2278 | #define TRACE_MEGASAS_SCSI_WRITE_START_BACKEND_DSTATE() ( \ |
2279 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_SCSI_WRITE_START) || \ |
2280 | false) |
2281 | |
2282 | static inline void _nocheck__trace_megasas_scsi_write_start(int cmd, int len) |
2283 | { |
2284 | if (trace_event_get_state(TRACE_MEGASAS_SCSI_WRITE_START) && qemu_loglevel_mask(LOG_TRACE)) { |
2285 | struct timeval _now; |
2286 | gettimeofday(&_now, NULL); |
2287 | qemu_log("%d@%zu.%06zu:megasas_scsi_write_start " "scmd %d: transfer %d bytes of data" "\n" , |
2288 | qemu_get_thread_id(), |
2289 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2290 | , cmd, len); |
2291 | } |
2292 | } |
2293 | |
2294 | static inline void trace_megasas_scsi_write_start(int cmd, int len) |
2295 | { |
2296 | if (true) { |
2297 | _nocheck__trace_megasas_scsi_write_start(cmd, len); |
2298 | } |
2299 | } |
2300 | |
2301 | #define TRACE_MEGASAS_SCSI_NODATA_BACKEND_DSTATE() ( \ |
2302 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_SCSI_NODATA) || \ |
2303 | false) |
2304 | |
2305 | static inline void _nocheck__trace_megasas_scsi_nodata(int cmd) |
2306 | { |
2307 | if (trace_event_get_state(TRACE_MEGASAS_SCSI_NODATA) && qemu_loglevel_mask(LOG_TRACE)) { |
2308 | struct timeval _now; |
2309 | gettimeofday(&_now, NULL); |
2310 | qemu_log("%d@%zu.%06zu:megasas_scsi_nodata " "scmd %d: no data to be transferred" "\n" , |
2311 | qemu_get_thread_id(), |
2312 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2313 | , cmd); |
2314 | } |
2315 | } |
2316 | |
2317 | static inline void trace_megasas_scsi_nodata(int cmd) |
2318 | { |
2319 | if (true) { |
2320 | _nocheck__trace_megasas_scsi_nodata(cmd); |
2321 | } |
2322 | } |
2323 | |
2324 | #define TRACE_MEGASAS_SCSI_COMPLETE_BACKEND_DSTATE() ( \ |
2325 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_SCSI_COMPLETE) || \ |
2326 | false) |
2327 | |
2328 | static inline void _nocheck__trace_megasas_scsi_complete(int cmd, uint32_t status, int len, int xfer) |
2329 | { |
2330 | if (trace_event_get_state(TRACE_MEGASAS_SCSI_COMPLETE) && qemu_loglevel_mask(LOG_TRACE)) { |
2331 | struct timeval _now; |
2332 | gettimeofday(&_now, NULL); |
2333 | qemu_log("%d@%zu.%06zu:megasas_scsi_complete " "scmd %d: status 0x%x, len %u/%u" "\n" , |
2334 | qemu_get_thread_id(), |
2335 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2336 | , cmd, status, len, xfer); |
2337 | } |
2338 | } |
2339 | |
2340 | static inline void trace_megasas_scsi_complete(int cmd, uint32_t status, int len, int xfer) |
2341 | { |
2342 | if (true) { |
2343 | _nocheck__trace_megasas_scsi_complete(cmd, status, len, xfer); |
2344 | } |
2345 | } |
2346 | |
2347 | #define TRACE_MEGASAS_COMMAND_COMPLETE_BACKEND_DSTATE() ( \ |
2348 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_COMMAND_COMPLETE) || \ |
2349 | false) |
2350 | |
2351 | static inline void _nocheck__trace_megasas_command_complete(int cmd, uint32_t status, uint32_t resid) |
2352 | { |
2353 | if (trace_event_get_state(TRACE_MEGASAS_COMMAND_COMPLETE) && qemu_loglevel_mask(LOG_TRACE)) { |
2354 | struct timeval _now; |
2355 | gettimeofday(&_now, NULL); |
2356 | qemu_log("%d@%zu.%06zu:megasas_command_complete " "scmd %d: status 0x%x, residual %d" "\n" , |
2357 | qemu_get_thread_id(), |
2358 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2359 | , cmd, status, resid); |
2360 | } |
2361 | } |
2362 | |
2363 | static inline void trace_megasas_command_complete(int cmd, uint32_t status, uint32_t resid) |
2364 | { |
2365 | if (true) { |
2366 | _nocheck__trace_megasas_command_complete(cmd, status, resid); |
2367 | } |
2368 | } |
2369 | |
2370 | #define TRACE_MEGASAS_HANDLE_IO_BACKEND_DSTATE() ( \ |
2371 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_HANDLE_IO) || \ |
2372 | false) |
2373 | |
2374 | static inline void _nocheck__trace_megasas_handle_io(int cmd, const char * frame, int dev, int lun, unsigned long lba, unsigned long count) |
2375 | { |
2376 | if (trace_event_get_state(TRACE_MEGASAS_HANDLE_IO) && qemu_loglevel_mask(LOG_TRACE)) { |
2377 | struct timeval _now; |
2378 | gettimeofday(&_now, NULL); |
2379 | qemu_log("%d@%zu.%06zu:megasas_handle_io " "scmd %d: %s dev %x/%x lba 0x%lx count %lu" "\n" , |
2380 | qemu_get_thread_id(), |
2381 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2382 | , cmd, frame, dev, lun, lba, count); |
2383 | } |
2384 | } |
2385 | |
2386 | static inline void trace_megasas_handle_io(int cmd, const char * frame, int dev, int lun, unsigned long lba, unsigned long count) |
2387 | { |
2388 | if (true) { |
2389 | _nocheck__trace_megasas_handle_io(cmd, frame, dev, lun, lba, count); |
2390 | } |
2391 | } |
2392 | |
2393 | #define TRACE_MEGASAS_IO_TARGET_NOT_PRESENT_BACKEND_DSTATE() ( \ |
2394 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_IO_TARGET_NOT_PRESENT) || \ |
2395 | false) |
2396 | |
2397 | static inline void _nocheck__trace_megasas_io_target_not_present(int cmd, const char * frame, int dev, int lun) |
2398 | { |
2399 | if (trace_event_get_state(TRACE_MEGASAS_IO_TARGET_NOT_PRESENT) && qemu_loglevel_mask(LOG_TRACE)) { |
2400 | struct timeval _now; |
2401 | gettimeofday(&_now, NULL); |
2402 | qemu_log("%d@%zu.%06zu:megasas_io_target_not_present " "scmd %d: %s dev 1/%x/%x LUN not present" "\n" , |
2403 | qemu_get_thread_id(), |
2404 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2405 | , cmd, frame, dev, lun); |
2406 | } |
2407 | } |
2408 | |
2409 | static inline void trace_megasas_io_target_not_present(int cmd, const char * frame, int dev, int lun) |
2410 | { |
2411 | if (true) { |
2412 | _nocheck__trace_megasas_io_target_not_present(cmd, frame, dev, lun); |
2413 | } |
2414 | } |
2415 | |
2416 | #define TRACE_MEGASAS_IO_READ_START_BACKEND_DSTATE() ( \ |
2417 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_IO_READ_START) || \ |
2418 | false) |
2419 | |
2420 | static inline void _nocheck__trace_megasas_io_read_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) |
2421 | { |
2422 | if (trace_event_get_state(TRACE_MEGASAS_IO_READ_START) && qemu_loglevel_mask(LOG_TRACE)) { |
2423 | struct timeval _now; |
2424 | gettimeofday(&_now, NULL); |
2425 | qemu_log("%d@%zu.%06zu:megasas_io_read_start " "scmd %d: start LBA 0x%lx %lu blocks (%lu bytes)" "\n" , |
2426 | qemu_get_thread_id(), |
2427 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2428 | , cmd, lba, count, len); |
2429 | } |
2430 | } |
2431 | |
2432 | static inline void trace_megasas_io_read_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) |
2433 | { |
2434 | if (true) { |
2435 | _nocheck__trace_megasas_io_read_start(cmd, lba, count, len); |
2436 | } |
2437 | } |
2438 | |
2439 | #define TRACE_MEGASAS_IO_WRITE_START_BACKEND_DSTATE() ( \ |
2440 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_IO_WRITE_START) || \ |
2441 | false) |
2442 | |
2443 | static inline void _nocheck__trace_megasas_io_write_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) |
2444 | { |
2445 | if (trace_event_get_state(TRACE_MEGASAS_IO_WRITE_START) && qemu_loglevel_mask(LOG_TRACE)) { |
2446 | struct timeval _now; |
2447 | gettimeofday(&_now, NULL); |
2448 | qemu_log("%d@%zu.%06zu:megasas_io_write_start " "scmd %d: start LBA 0x%lx %lu blocks (%lu bytes)" "\n" , |
2449 | qemu_get_thread_id(), |
2450 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2451 | , cmd, lba, count, len); |
2452 | } |
2453 | } |
2454 | |
2455 | static inline void trace_megasas_io_write_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) |
2456 | { |
2457 | if (true) { |
2458 | _nocheck__trace_megasas_io_write_start(cmd, lba, count, len); |
2459 | } |
2460 | } |
2461 | |
2462 | #define TRACE_MEGASAS_IO_COMPLETE_BACKEND_DSTATE() ( \ |
2463 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_IO_COMPLETE) || \ |
2464 | false) |
2465 | |
2466 | static inline void _nocheck__trace_megasas_io_complete(int cmd, uint32_t len) |
2467 | { |
2468 | if (trace_event_get_state(TRACE_MEGASAS_IO_COMPLETE) && qemu_loglevel_mask(LOG_TRACE)) { |
2469 | struct timeval _now; |
2470 | gettimeofday(&_now, NULL); |
2471 | qemu_log("%d@%zu.%06zu:megasas_io_complete " "scmd %d: %d bytes" "\n" , |
2472 | qemu_get_thread_id(), |
2473 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2474 | , cmd, len); |
2475 | } |
2476 | } |
2477 | |
2478 | static inline void trace_megasas_io_complete(int cmd, uint32_t len) |
2479 | { |
2480 | if (true) { |
2481 | _nocheck__trace_megasas_io_complete(cmd, len); |
2482 | } |
2483 | } |
2484 | |
2485 | #define TRACE_MEGASAS_IOVEC_SGL_OVERFLOW_BACKEND_DSTATE() ( \ |
2486 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_IOVEC_SGL_OVERFLOW) || \ |
2487 | false) |
2488 | |
2489 | static inline void _nocheck__trace_megasas_iovec_sgl_overflow(int cmd, int index, int limit) |
2490 | { |
2491 | if (trace_event_get_state(TRACE_MEGASAS_IOVEC_SGL_OVERFLOW) && qemu_loglevel_mask(LOG_TRACE)) { |
2492 | struct timeval _now; |
2493 | gettimeofday(&_now, NULL); |
2494 | qemu_log("%d@%zu.%06zu:megasas_iovec_sgl_overflow " "scmd %d: iovec count %d limit %d" "\n" , |
2495 | qemu_get_thread_id(), |
2496 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2497 | , cmd, index, limit); |
2498 | } |
2499 | } |
2500 | |
2501 | static inline void trace_megasas_iovec_sgl_overflow(int cmd, int index, int limit) |
2502 | { |
2503 | if (true) { |
2504 | _nocheck__trace_megasas_iovec_sgl_overflow(cmd, index, limit); |
2505 | } |
2506 | } |
2507 | |
2508 | #define TRACE_MEGASAS_IOVEC_SGL_UNDERFLOW_BACKEND_DSTATE() ( \ |
2509 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_IOVEC_SGL_UNDERFLOW) || \ |
2510 | false) |
2511 | |
2512 | static inline void _nocheck__trace_megasas_iovec_sgl_underflow(int cmd, int index) |
2513 | { |
2514 | if (trace_event_get_state(TRACE_MEGASAS_IOVEC_SGL_UNDERFLOW) && qemu_loglevel_mask(LOG_TRACE)) { |
2515 | struct timeval _now; |
2516 | gettimeofday(&_now, NULL); |
2517 | qemu_log("%d@%zu.%06zu:megasas_iovec_sgl_underflow " "scmd %d: iovec count %d" "\n" , |
2518 | qemu_get_thread_id(), |
2519 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2520 | , cmd, index); |
2521 | } |
2522 | } |
2523 | |
2524 | static inline void trace_megasas_iovec_sgl_underflow(int cmd, int index) |
2525 | { |
2526 | if (true) { |
2527 | _nocheck__trace_megasas_iovec_sgl_underflow(cmd, index); |
2528 | } |
2529 | } |
2530 | |
2531 | #define TRACE_MEGASAS_IOVEC_SGL_INVALID_BACKEND_DSTATE() ( \ |
2532 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_IOVEC_SGL_INVALID) || \ |
2533 | false) |
2534 | |
2535 | static inline void _nocheck__trace_megasas_iovec_sgl_invalid(int cmd, int index, uint64_t pa, uint32_t len) |
2536 | { |
2537 | if (trace_event_get_state(TRACE_MEGASAS_IOVEC_SGL_INVALID) && qemu_loglevel_mask(LOG_TRACE)) { |
2538 | struct timeval _now; |
2539 | gettimeofday(&_now, NULL); |
2540 | qemu_log("%d@%zu.%06zu:megasas_iovec_sgl_invalid " "scmd %d: element %d pa 0x%" PRIx64 " len %u" "\n" , |
2541 | qemu_get_thread_id(), |
2542 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2543 | , cmd, index, pa, len); |
2544 | } |
2545 | } |
2546 | |
2547 | static inline void trace_megasas_iovec_sgl_invalid(int cmd, int index, uint64_t pa, uint32_t len) |
2548 | { |
2549 | if (true) { |
2550 | _nocheck__trace_megasas_iovec_sgl_invalid(cmd, index, pa, len); |
2551 | } |
2552 | } |
2553 | |
2554 | #define TRACE_MEGASAS_IOVEC_OVERFLOW_BACKEND_DSTATE() ( \ |
2555 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_IOVEC_OVERFLOW) || \ |
2556 | false) |
2557 | |
2558 | static inline void _nocheck__trace_megasas_iovec_overflow(int cmd, int len, int limit) |
2559 | { |
2560 | if (trace_event_get_state(TRACE_MEGASAS_IOVEC_OVERFLOW) && qemu_loglevel_mask(LOG_TRACE)) { |
2561 | struct timeval _now; |
2562 | gettimeofday(&_now, NULL); |
2563 | qemu_log("%d@%zu.%06zu:megasas_iovec_overflow " "scmd %d: len %d limit %d" "\n" , |
2564 | qemu_get_thread_id(), |
2565 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2566 | , cmd, len, limit); |
2567 | } |
2568 | } |
2569 | |
2570 | static inline void trace_megasas_iovec_overflow(int cmd, int len, int limit) |
2571 | { |
2572 | if (true) { |
2573 | _nocheck__trace_megasas_iovec_overflow(cmd, len, limit); |
2574 | } |
2575 | } |
2576 | |
2577 | #define TRACE_MEGASAS_IOVEC_UNDERFLOW_BACKEND_DSTATE() ( \ |
2578 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_IOVEC_UNDERFLOW) || \ |
2579 | false) |
2580 | |
2581 | static inline void _nocheck__trace_megasas_iovec_underflow(int cmd, int len, int limit) |
2582 | { |
2583 | if (trace_event_get_state(TRACE_MEGASAS_IOVEC_UNDERFLOW) && qemu_loglevel_mask(LOG_TRACE)) { |
2584 | struct timeval _now; |
2585 | gettimeofday(&_now, NULL); |
2586 | qemu_log("%d@%zu.%06zu:megasas_iovec_underflow " "scmd %d: len %d limit %d" "\n" , |
2587 | qemu_get_thread_id(), |
2588 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2589 | , cmd, len, limit); |
2590 | } |
2591 | } |
2592 | |
2593 | static inline void trace_megasas_iovec_underflow(int cmd, int len, int limit) |
2594 | { |
2595 | if (true) { |
2596 | _nocheck__trace_megasas_iovec_underflow(cmd, len, limit); |
2597 | } |
2598 | } |
2599 | |
2600 | #define TRACE_MEGASAS_HANDLE_DCMD_BACKEND_DSTATE() ( \ |
2601 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_HANDLE_DCMD) || \ |
2602 | false) |
2603 | |
2604 | static inline void _nocheck__trace_megasas_handle_dcmd(int cmd, int opcode) |
2605 | { |
2606 | if (trace_event_get_state(TRACE_MEGASAS_HANDLE_DCMD) && qemu_loglevel_mask(LOG_TRACE)) { |
2607 | struct timeval _now; |
2608 | gettimeofday(&_now, NULL); |
2609 | qemu_log("%d@%zu.%06zu:megasas_handle_dcmd " "scmd %d: MFI DCMD opcode 0x%x" "\n" , |
2610 | qemu_get_thread_id(), |
2611 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2612 | , cmd, opcode); |
2613 | } |
2614 | } |
2615 | |
2616 | static inline void trace_megasas_handle_dcmd(int cmd, int opcode) |
2617 | { |
2618 | if (true) { |
2619 | _nocheck__trace_megasas_handle_dcmd(cmd, opcode); |
2620 | } |
2621 | } |
2622 | |
2623 | #define TRACE_MEGASAS_FINISH_DCMD_BACKEND_DSTATE() ( \ |
2624 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_FINISH_DCMD) || \ |
2625 | false) |
2626 | |
2627 | static inline void _nocheck__trace_megasas_finish_dcmd(int cmd, int size) |
2628 | { |
2629 | if (trace_event_get_state(TRACE_MEGASAS_FINISH_DCMD) && qemu_loglevel_mask(LOG_TRACE)) { |
2630 | struct timeval _now; |
2631 | gettimeofday(&_now, NULL); |
2632 | qemu_log("%d@%zu.%06zu:megasas_finish_dcmd " "scmd %d: MFI DCMD wrote %d bytes" "\n" , |
2633 | qemu_get_thread_id(), |
2634 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2635 | , cmd, size); |
2636 | } |
2637 | } |
2638 | |
2639 | static inline void trace_megasas_finish_dcmd(int cmd, int size) |
2640 | { |
2641 | if (true) { |
2642 | _nocheck__trace_megasas_finish_dcmd(cmd, size); |
2643 | } |
2644 | } |
2645 | |
2646 | #define TRACE_MEGASAS_DCMD_REQ_ALLOC_FAILED_BACKEND_DSTATE() ( \ |
2647 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_REQ_ALLOC_FAILED) || \ |
2648 | false) |
2649 | |
2650 | static inline void _nocheck__trace_megasas_dcmd_req_alloc_failed(int cmd, const char * desc) |
2651 | { |
2652 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_REQ_ALLOC_FAILED) && qemu_loglevel_mask(LOG_TRACE)) { |
2653 | struct timeval _now; |
2654 | gettimeofday(&_now, NULL); |
2655 | qemu_log("%d@%zu.%06zu:megasas_dcmd_req_alloc_failed " "scmd %d: %s" "\n" , |
2656 | qemu_get_thread_id(), |
2657 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2658 | , cmd, desc); |
2659 | } |
2660 | } |
2661 | |
2662 | static inline void trace_megasas_dcmd_req_alloc_failed(int cmd, const char * desc) |
2663 | { |
2664 | if (true) { |
2665 | _nocheck__trace_megasas_dcmd_req_alloc_failed(cmd, desc); |
2666 | } |
2667 | } |
2668 | |
2669 | #define TRACE_MEGASAS_DCMD_INTERNAL_SUBMIT_BACKEND_DSTATE() ( \ |
2670 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_INTERNAL_SUBMIT) || \ |
2671 | false) |
2672 | |
2673 | static inline void _nocheck__trace_megasas_dcmd_internal_submit(int cmd, const char * desc, int dev) |
2674 | { |
2675 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_INTERNAL_SUBMIT) && qemu_loglevel_mask(LOG_TRACE)) { |
2676 | struct timeval _now; |
2677 | gettimeofday(&_now, NULL); |
2678 | qemu_log("%d@%zu.%06zu:megasas_dcmd_internal_submit " "scmd %d: %s to dev %d" "\n" , |
2679 | qemu_get_thread_id(), |
2680 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2681 | , cmd, desc, dev); |
2682 | } |
2683 | } |
2684 | |
2685 | static inline void trace_megasas_dcmd_internal_submit(int cmd, const char * desc, int dev) |
2686 | { |
2687 | if (true) { |
2688 | _nocheck__trace_megasas_dcmd_internal_submit(cmd, desc, dev); |
2689 | } |
2690 | } |
2691 | |
2692 | #define TRACE_MEGASAS_DCMD_INTERNAL_FINISH_BACKEND_DSTATE() ( \ |
2693 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_INTERNAL_FINISH) || \ |
2694 | false) |
2695 | |
2696 | static inline void _nocheck__trace_megasas_dcmd_internal_finish(int cmd, int opcode, int lun) |
2697 | { |
2698 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_INTERNAL_FINISH) && qemu_loglevel_mask(LOG_TRACE)) { |
2699 | struct timeval _now; |
2700 | gettimeofday(&_now, NULL); |
2701 | qemu_log("%d@%zu.%06zu:megasas_dcmd_internal_finish " "scmd %d: cmd 0x%x lun %d" "\n" , |
2702 | qemu_get_thread_id(), |
2703 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2704 | , cmd, opcode, lun); |
2705 | } |
2706 | } |
2707 | |
2708 | static inline void trace_megasas_dcmd_internal_finish(int cmd, int opcode, int lun) |
2709 | { |
2710 | if (true) { |
2711 | _nocheck__trace_megasas_dcmd_internal_finish(cmd, opcode, lun); |
2712 | } |
2713 | } |
2714 | |
2715 | #define TRACE_MEGASAS_DCMD_INTERNAL_INVALID_BACKEND_DSTATE() ( \ |
2716 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_INTERNAL_INVALID) || \ |
2717 | false) |
2718 | |
2719 | static inline void _nocheck__trace_megasas_dcmd_internal_invalid(int cmd, int opcode) |
2720 | { |
2721 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_INTERNAL_INVALID) && qemu_loglevel_mask(LOG_TRACE)) { |
2722 | struct timeval _now; |
2723 | gettimeofday(&_now, NULL); |
2724 | qemu_log("%d@%zu.%06zu:megasas_dcmd_internal_invalid " "scmd %d: DCMD 0x%x" "\n" , |
2725 | qemu_get_thread_id(), |
2726 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2727 | , cmd, opcode); |
2728 | } |
2729 | } |
2730 | |
2731 | static inline void trace_megasas_dcmd_internal_invalid(int cmd, int opcode) |
2732 | { |
2733 | if (true) { |
2734 | _nocheck__trace_megasas_dcmd_internal_invalid(cmd, opcode); |
2735 | } |
2736 | } |
2737 | |
2738 | #define TRACE_MEGASAS_DCMD_UNHANDLED_BACKEND_DSTATE() ( \ |
2739 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_UNHANDLED) || \ |
2740 | false) |
2741 | |
2742 | static inline void _nocheck__trace_megasas_dcmd_unhandled(int cmd, int opcode, int len) |
2743 | { |
2744 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_UNHANDLED) && qemu_loglevel_mask(LOG_TRACE)) { |
2745 | struct timeval _now; |
2746 | gettimeofday(&_now, NULL); |
2747 | qemu_log("%d@%zu.%06zu:megasas_dcmd_unhandled " "scmd %d: opcode 0x%x, len %d" "\n" , |
2748 | qemu_get_thread_id(), |
2749 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2750 | , cmd, opcode, len); |
2751 | } |
2752 | } |
2753 | |
2754 | static inline void trace_megasas_dcmd_unhandled(int cmd, int opcode, int len) |
2755 | { |
2756 | if (true) { |
2757 | _nocheck__trace_megasas_dcmd_unhandled(cmd, opcode, len); |
2758 | } |
2759 | } |
2760 | |
2761 | #define TRACE_MEGASAS_DCMD_ZERO_SGE_BACKEND_DSTATE() ( \ |
2762 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_ZERO_SGE) || \ |
2763 | false) |
2764 | |
2765 | static inline void _nocheck__trace_megasas_dcmd_zero_sge(int cmd) |
2766 | { |
2767 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_ZERO_SGE) && qemu_loglevel_mask(LOG_TRACE)) { |
2768 | struct timeval _now; |
2769 | gettimeofday(&_now, NULL); |
2770 | qemu_log("%d@%zu.%06zu:megasas_dcmd_zero_sge " "scmd %d: zero DCMD sge count" "\n" , |
2771 | qemu_get_thread_id(), |
2772 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2773 | , cmd); |
2774 | } |
2775 | } |
2776 | |
2777 | static inline void trace_megasas_dcmd_zero_sge(int cmd) |
2778 | { |
2779 | if (true) { |
2780 | _nocheck__trace_megasas_dcmd_zero_sge(cmd); |
2781 | } |
2782 | } |
2783 | |
2784 | #define TRACE_MEGASAS_DCMD_INVALID_SGE_BACKEND_DSTATE() ( \ |
2785 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_INVALID_SGE) || \ |
2786 | false) |
2787 | |
2788 | static inline void _nocheck__trace_megasas_dcmd_invalid_sge(int cmd, int count) |
2789 | { |
2790 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_INVALID_SGE) && qemu_loglevel_mask(LOG_TRACE)) { |
2791 | struct timeval _now; |
2792 | gettimeofday(&_now, NULL); |
2793 | qemu_log("%d@%zu.%06zu:megasas_dcmd_invalid_sge " "scmd %d: DCMD sge count %d" "\n" , |
2794 | qemu_get_thread_id(), |
2795 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2796 | , cmd, count); |
2797 | } |
2798 | } |
2799 | |
2800 | static inline void trace_megasas_dcmd_invalid_sge(int cmd, int count) |
2801 | { |
2802 | if (true) { |
2803 | _nocheck__trace_megasas_dcmd_invalid_sge(cmd, count); |
2804 | } |
2805 | } |
2806 | |
2807 | #define TRACE_MEGASAS_DCMD_INVALID_XFER_LEN_BACKEND_DSTATE() ( \ |
2808 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_INVALID_XFER_LEN) || \ |
2809 | false) |
2810 | |
2811 | static inline void _nocheck__trace_megasas_dcmd_invalid_xfer_len(int cmd, unsigned long size, unsigned long max) |
2812 | { |
2813 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_INVALID_XFER_LEN) && qemu_loglevel_mask(LOG_TRACE)) { |
2814 | struct timeval _now; |
2815 | gettimeofday(&_now, NULL); |
2816 | qemu_log("%d@%zu.%06zu:megasas_dcmd_invalid_xfer_len " "scmd %d: xfer len %ld, max %ld" "\n" , |
2817 | qemu_get_thread_id(), |
2818 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2819 | , cmd, size, max); |
2820 | } |
2821 | } |
2822 | |
2823 | static inline void trace_megasas_dcmd_invalid_xfer_len(int cmd, unsigned long size, unsigned long max) |
2824 | { |
2825 | if (true) { |
2826 | _nocheck__trace_megasas_dcmd_invalid_xfer_len(cmd, size, max); |
2827 | } |
2828 | } |
2829 | |
2830 | #define TRACE_MEGASAS_DCMD_ENTER_BACKEND_DSTATE() ( \ |
2831 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_ENTER) || \ |
2832 | false) |
2833 | |
2834 | static inline void _nocheck__trace_megasas_dcmd_enter(int cmd, const char * dcmd, int len) |
2835 | { |
2836 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_ENTER) && qemu_loglevel_mask(LOG_TRACE)) { |
2837 | struct timeval _now; |
2838 | gettimeofday(&_now, NULL); |
2839 | qemu_log("%d@%zu.%06zu:megasas_dcmd_enter " "scmd %d: DCMD %s len %d" "\n" , |
2840 | qemu_get_thread_id(), |
2841 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2842 | , cmd, dcmd, len); |
2843 | } |
2844 | } |
2845 | |
2846 | static inline void trace_megasas_dcmd_enter(int cmd, const char * dcmd, int len) |
2847 | { |
2848 | if (true) { |
2849 | _nocheck__trace_megasas_dcmd_enter(cmd, dcmd, len); |
2850 | } |
2851 | } |
2852 | |
2853 | #define TRACE_MEGASAS_DCMD_DUMMY_BACKEND_DSTATE() ( \ |
2854 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_DUMMY) || \ |
2855 | false) |
2856 | |
2857 | static inline void _nocheck__trace_megasas_dcmd_dummy(int cmd, unsigned long size) |
2858 | { |
2859 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_DUMMY) && qemu_loglevel_mask(LOG_TRACE)) { |
2860 | struct timeval _now; |
2861 | gettimeofday(&_now, NULL); |
2862 | qemu_log("%d@%zu.%06zu:megasas_dcmd_dummy " "scmd %d: xfer len %ld" "\n" , |
2863 | qemu_get_thread_id(), |
2864 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2865 | , cmd, size); |
2866 | } |
2867 | } |
2868 | |
2869 | static inline void trace_megasas_dcmd_dummy(int cmd, unsigned long size) |
2870 | { |
2871 | if (true) { |
2872 | _nocheck__trace_megasas_dcmd_dummy(cmd, size); |
2873 | } |
2874 | } |
2875 | |
2876 | #define TRACE_MEGASAS_DCMD_SET_FW_TIME_BACKEND_DSTATE() ( \ |
2877 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_SET_FW_TIME) || \ |
2878 | false) |
2879 | |
2880 | static inline void _nocheck__trace_megasas_dcmd_set_fw_time(int cmd, unsigned long time) |
2881 | { |
2882 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_SET_FW_TIME) && qemu_loglevel_mask(LOG_TRACE)) { |
2883 | struct timeval _now; |
2884 | gettimeofday(&_now, NULL); |
2885 | qemu_log("%d@%zu.%06zu:megasas_dcmd_set_fw_time " "scmd %d: Set FW time 0x%lx" "\n" , |
2886 | qemu_get_thread_id(), |
2887 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2888 | , cmd, time); |
2889 | } |
2890 | } |
2891 | |
2892 | static inline void trace_megasas_dcmd_set_fw_time(int cmd, unsigned long time) |
2893 | { |
2894 | if (true) { |
2895 | _nocheck__trace_megasas_dcmd_set_fw_time(cmd, time); |
2896 | } |
2897 | } |
2898 | |
2899 | #define TRACE_MEGASAS_DCMD_PD_GET_LIST_BACKEND_DSTATE() ( \ |
2900 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_PD_GET_LIST) || \ |
2901 | false) |
2902 | |
2903 | static inline void _nocheck__trace_megasas_dcmd_pd_get_list(int cmd, int num, int max, int offset) |
2904 | { |
2905 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_PD_GET_LIST) && qemu_loglevel_mask(LOG_TRACE)) { |
2906 | struct timeval _now; |
2907 | gettimeofday(&_now, NULL); |
2908 | qemu_log("%d@%zu.%06zu:megasas_dcmd_pd_get_list " "scmd %d: DCMD PD get list: %d / %d PDs, size %d" "\n" , |
2909 | qemu_get_thread_id(), |
2910 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2911 | , cmd, num, max, offset); |
2912 | } |
2913 | } |
2914 | |
2915 | static inline void trace_megasas_dcmd_pd_get_list(int cmd, int num, int max, int offset) |
2916 | { |
2917 | if (true) { |
2918 | _nocheck__trace_megasas_dcmd_pd_get_list(cmd, num, max, offset); |
2919 | } |
2920 | } |
2921 | |
2922 | #define TRACE_MEGASAS_DCMD_LD_GET_LIST_BACKEND_DSTATE() ( \ |
2923 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_LD_GET_LIST) || \ |
2924 | false) |
2925 | |
2926 | static inline void _nocheck__trace_megasas_dcmd_ld_get_list(int cmd, int num, int max) |
2927 | { |
2928 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_LD_GET_LIST) && qemu_loglevel_mask(LOG_TRACE)) { |
2929 | struct timeval _now; |
2930 | gettimeofday(&_now, NULL); |
2931 | qemu_log("%d@%zu.%06zu:megasas_dcmd_ld_get_list " "scmd %d: DCMD LD get list: found %d / %d LDs" "\n" , |
2932 | qemu_get_thread_id(), |
2933 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2934 | , cmd, num, max); |
2935 | } |
2936 | } |
2937 | |
2938 | static inline void trace_megasas_dcmd_ld_get_list(int cmd, int num, int max) |
2939 | { |
2940 | if (true) { |
2941 | _nocheck__trace_megasas_dcmd_ld_get_list(cmd, num, max); |
2942 | } |
2943 | } |
2944 | |
2945 | #define TRACE_MEGASAS_DCMD_LD_GET_INFO_BACKEND_DSTATE() ( \ |
2946 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_LD_GET_INFO) || \ |
2947 | false) |
2948 | |
2949 | static inline void _nocheck__trace_megasas_dcmd_ld_get_info(int cmd, int ld_id) |
2950 | { |
2951 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_LD_GET_INFO) && qemu_loglevel_mask(LOG_TRACE)) { |
2952 | struct timeval _now; |
2953 | gettimeofday(&_now, NULL); |
2954 | qemu_log("%d@%zu.%06zu:megasas_dcmd_ld_get_info " "scmd %d: dev %d" "\n" , |
2955 | qemu_get_thread_id(), |
2956 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2957 | , cmd, ld_id); |
2958 | } |
2959 | } |
2960 | |
2961 | static inline void trace_megasas_dcmd_ld_get_info(int cmd, int ld_id) |
2962 | { |
2963 | if (true) { |
2964 | _nocheck__trace_megasas_dcmd_ld_get_info(cmd, ld_id); |
2965 | } |
2966 | } |
2967 | |
2968 | #define TRACE_MEGASAS_DCMD_LD_LIST_QUERY_BACKEND_DSTATE() ( \ |
2969 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_LD_LIST_QUERY) || \ |
2970 | false) |
2971 | |
2972 | static inline void _nocheck__trace_megasas_dcmd_ld_list_query(int cmd, int flags) |
2973 | { |
2974 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_LD_LIST_QUERY) && qemu_loglevel_mask(LOG_TRACE)) { |
2975 | struct timeval _now; |
2976 | gettimeofday(&_now, NULL); |
2977 | qemu_log("%d@%zu.%06zu:megasas_dcmd_ld_list_query " "scmd %d: query flags 0x%x" "\n" , |
2978 | qemu_get_thread_id(), |
2979 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2980 | , cmd, flags); |
2981 | } |
2982 | } |
2983 | |
2984 | static inline void trace_megasas_dcmd_ld_list_query(int cmd, int flags) |
2985 | { |
2986 | if (true) { |
2987 | _nocheck__trace_megasas_dcmd_ld_list_query(cmd, flags); |
2988 | } |
2989 | } |
2990 | |
2991 | #define TRACE_MEGASAS_DCMD_PD_GET_INFO_BACKEND_DSTATE() ( \ |
2992 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_PD_GET_INFO) || \ |
2993 | false) |
2994 | |
2995 | static inline void _nocheck__trace_megasas_dcmd_pd_get_info(int cmd, int pd_id) |
2996 | { |
2997 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_PD_GET_INFO) && qemu_loglevel_mask(LOG_TRACE)) { |
2998 | struct timeval _now; |
2999 | gettimeofday(&_now, NULL); |
3000 | qemu_log("%d@%zu.%06zu:megasas_dcmd_pd_get_info " "scmd %d: dev %d" "\n" , |
3001 | qemu_get_thread_id(), |
3002 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3003 | , cmd, pd_id); |
3004 | } |
3005 | } |
3006 | |
3007 | static inline void trace_megasas_dcmd_pd_get_info(int cmd, int pd_id) |
3008 | { |
3009 | if (true) { |
3010 | _nocheck__trace_megasas_dcmd_pd_get_info(cmd, pd_id); |
3011 | } |
3012 | } |
3013 | |
3014 | #define TRACE_MEGASAS_DCMD_PD_LIST_QUERY_BACKEND_DSTATE() ( \ |
3015 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_PD_LIST_QUERY) || \ |
3016 | false) |
3017 | |
3018 | static inline void _nocheck__trace_megasas_dcmd_pd_list_query(int cmd, int flags) |
3019 | { |
3020 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_PD_LIST_QUERY) && qemu_loglevel_mask(LOG_TRACE)) { |
3021 | struct timeval _now; |
3022 | gettimeofday(&_now, NULL); |
3023 | qemu_log("%d@%zu.%06zu:megasas_dcmd_pd_list_query " "scmd %d: query flags 0x%x" "\n" , |
3024 | qemu_get_thread_id(), |
3025 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3026 | , cmd, flags); |
3027 | } |
3028 | } |
3029 | |
3030 | static inline void trace_megasas_dcmd_pd_list_query(int cmd, int flags) |
3031 | { |
3032 | if (true) { |
3033 | _nocheck__trace_megasas_dcmd_pd_list_query(cmd, flags); |
3034 | } |
3035 | } |
3036 | |
3037 | #define TRACE_MEGASAS_DCMD_RESET_LD_BACKEND_DSTATE() ( \ |
3038 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_RESET_LD) || \ |
3039 | false) |
3040 | |
3041 | static inline void _nocheck__trace_megasas_dcmd_reset_ld(int cmd, int target_id) |
3042 | { |
3043 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_RESET_LD) && qemu_loglevel_mask(LOG_TRACE)) { |
3044 | struct timeval _now; |
3045 | gettimeofday(&_now, NULL); |
3046 | qemu_log("%d@%zu.%06zu:megasas_dcmd_reset_ld " "scmd %d: dev %d" "\n" , |
3047 | qemu_get_thread_id(), |
3048 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3049 | , cmd, target_id); |
3050 | } |
3051 | } |
3052 | |
3053 | static inline void trace_megasas_dcmd_reset_ld(int cmd, int target_id) |
3054 | { |
3055 | if (true) { |
3056 | _nocheck__trace_megasas_dcmd_reset_ld(cmd, target_id); |
3057 | } |
3058 | } |
3059 | |
3060 | #define TRACE_MEGASAS_DCMD_UNSUPPORTED_BACKEND_DSTATE() ( \ |
3061 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_DCMD_UNSUPPORTED) || \ |
3062 | false) |
3063 | |
3064 | static inline void _nocheck__trace_megasas_dcmd_unsupported(int cmd, unsigned long size) |
3065 | { |
3066 | if (trace_event_get_state(TRACE_MEGASAS_DCMD_UNSUPPORTED) && qemu_loglevel_mask(LOG_TRACE)) { |
3067 | struct timeval _now; |
3068 | gettimeofday(&_now, NULL); |
3069 | qemu_log("%d@%zu.%06zu:megasas_dcmd_unsupported " "scmd %d: set properties len %ld" "\n" , |
3070 | qemu_get_thread_id(), |
3071 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3072 | , cmd, size); |
3073 | } |
3074 | } |
3075 | |
3076 | static inline void trace_megasas_dcmd_unsupported(int cmd, unsigned long size) |
3077 | { |
3078 | if (true) { |
3079 | _nocheck__trace_megasas_dcmd_unsupported(cmd, size); |
3080 | } |
3081 | } |
3082 | |
3083 | #define TRACE_MEGASAS_ABORT_FRAME_BACKEND_DSTATE() ( \ |
3084 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_ABORT_FRAME) || \ |
3085 | false) |
3086 | |
3087 | static inline void _nocheck__trace_megasas_abort_frame(int cmd, int abort_cmd) |
3088 | { |
3089 | if (trace_event_get_state(TRACE_MEGASAS_ABORT_FRAME) && qemu_loglevel_mask(LOG_TRACE)) { |
3090 | struct timeval _now; |
3091 | gettimeofday(&_now, NULL); |
3092 | qemu_log("%d@%zu.%06zu:megasas_abort_frame " "scmd %d: frame 0x%x" "\n" , |
3093 | qemu_get_thread_id(), |
3094 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3095 | , cmd, abort_cmd); |
3096 | } |
3097 | } |
3098 | |
3099 | static inline void trace_megasas_abort_frame(int cmd, int abort_cmd) |
3100 | { |
3101 | if (true) { |
3102 | _nocheck__trace_megasas_abort_frame(cmd, abort_cmd); |
3103 | } |
3104 | } |
3105 | |
3106 | #define TRACE_MEGASAS_ABORT_NO_CMD_BACKEND_DSTATE() ( \ |
3107 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_ABORT_NO_CMD) || \ |
3108 | false) |
3109 | |
3110 | static inline void _nocheck__trace_megasas_abort_no_cmd(int cmd, uint64_t context) |
3111 | { |
3112 | if (trace_event_get_state(TRACE_MEGASAS_ABORT_NO_CMD) && qemu_loglevel_mask(LOG_TRACE)) { |
3113 | struct timeval _now; |
3114 | gettimeofday(&_now, NULL); |
3115 | qemu_log("%d@%zu.%06zu:megasas_abort_no_cmd " "scmd %d: no active command for frame context 0x%" PRIx64 "\n" , |
3116 | qemu_get_thread_id(), |
3117 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3118 | , cmd, context); |
3119 | } |
3120 | } |
3121 | |
3122 | static inline void trace_megasas_abort_no_cmd(int cmd, uint64_t context) |
3123 | { |
3124 | if (true) { |
3125 | _nocheck__trace_megasas_abort_no_cmd(cmd, context); |
3126 | } |
3127 | } |
3128 | |
3129 | #define TRACE_MEGASAS_ABORT_INVALID_CONTEXT_BACKEND_DSTATE() ( \ |
3130 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_ABORT_INVALID_CONTEXT) || \ |
3131 | false) |
3132 | |
3133 | static inline void _nocheck__trace_megasas_abort_invalid_context(int cmd, uint64_t context, int abort_cmd) |
3134 | { |
3135 | if (trace_event_get_state(TRACE_MEGASAS_ABORT_INVALID_CONTEXT) && qemu_loglevel_mask(LOG_TRACE)) { |
3136 | struct timeval _now; |
3137 | gettimeofday(&_now, NULL); |
3138 | qemu_log("%d@%zu.%06zu:megasas_abort_invalid_context " "scmd %d: invalid frame context 0x%" PRIx64 " for abort frame 0x%x" "\n" , |
3139 | qemu_get_thread_id(), |
3140 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3141 | , cmd, context, abort_cmd); |
3142 | } |
3143 | } |
3144 | |
3145 | static inline void trace_megasas_abort_invalid_context(int cmd, uint64_t context, int abort_cmd) |
3146 | { |
3147 | if (true) { |
3148 | _nocheck__trace_megasas_abort_invalid_context(cmd, context, abort_cmd); |
3149 | } |
3150 | } |
3151 | |
3152 | #define TRACE_MEGASAS_RESET_BACKEND_DSTATE() ( \ |
3153 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_RESET) || \ |
3154 | false) |
3155 | |
3156 | static inline void _nocheck__trace_megasas_reset(int fw_state) |
3157 | { |
3158 | if (trace_event_get_state(TRACE_MEGASAS_RESET) && qemu_loglevel_mask(LOG_TRACE)) { |
3159 | struct timeval _now; |
3160 | gettimeofday(&_now, NULL); |
3161 | qemu_log("%d@%zu.%06zu:megasas_reset " "firmware state 0x%x" "\n" , |
3162 | qemu_get_thread_id(), |
3163 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3164 | , fw_state); |
3165 | } |
3166 | } |
3167 | |
3168 | static inline void trace_megasas_reset(int fw_state) |
3169 | { |
3170 | if (true) { |
3171 | _nocheck__trace_megasas_reset(fw_state); |
3172 | } |
3173 | } |
3174 | |
3175 | #define TRACE_MEGASAS_INIT_BACKEND_DSTATE() ( \ |
3176 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_INIT) || \ |
3177 | false) |
3178 | |
3179 | static inline void _nocheck__trace_megasas_init(int sges, int cmds, const char * mode) |
3180 | { |
3181 | if (trace_event_get_state(TRACE_MEGASAS_INIT) && qemu_loglevel_mask(LOG_TRACE)) { |
3182 | struct timeval _now; |
3183 | gettimeofday(&_now, NULL); |
3184 | qemu_log("%d@%zu.%06zu:megasas_init " "Using %d sges, %d cmds, %s mode" "\n" , |
3185 | qemu_get_thread_id(), |
3186 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3187 | , sges, cmds, mode); |
3188 | } |
3189 | } |
3190 | |
3191 | static inline void trace_megasas_init(int sges, int cmds, const char * mode) |
3192 | { |
3193 | if (true) { |
3194 | _nocheck__trace_megasas_init(sges, cmds, mode); |
3195 | } |
3196 | } |
3197 | |
3198 | #define TRACE_MEGASAS_MSIX_RAISE_BACKEND_DSTATE() ( \ |
3199 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_MSIX_RAISE) || \ |
3200 | false) |
3201 | |
3202 | static inline void _nocheck__trace_megasas_msix_raise(int vector) |
3203 | { |
3204 | if (trace_event_get_state(TRACE_MEGASAS_MSIX_RAISE) && qemu_loglevel_mask(LOG_TRACE)) { |
3205 | struct timeval _now; |
3206 | gettimeofday(&_now, NULL); |
3207 | qemu_log("%d@%zu.%06zu:megasas_msix_raise " "vector %d" "\n" , |
3208 | qemu_get_thread_id(), |
3209 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3210 | , vector); |
3211 | } |
3212 | } |
3213 | |
3214 | static inline void trace_megasas_msix_raise(int vector) |
3215 | { |
3216 | if (true) { |
3217 | _nocheck__trace_megasas_msix_raise(vector); |
3218 | } |
3219 | } |
3220 | |
3221 | #define TRACE_MEGASAS_MSI_RAISE_BACKEND_DSTATE() ( \ |
3222 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_MSI_RAISE) || \ |
3223 | false) |
3224 | |
3225 | static inline void _nocheck__trace_megasas_msi_raise(int vector) |
3226 | { |
3227 | if (trace_event_get_state(TRACE_MEGASAS_MSI_RAISE) && qemu_loglevel_mask(LOG_TRACE)) { |
3228 | struct timeval _now; |
3229 | gettimeofday(&_now, NULL); |
3230 | qemu_log("%d@%zu.%06zu:megasas_msi_raise " "vector %d" "\n" , |
3231 | qemu_get_thread_id(), |
3232 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3233 | , vector); |
3234 | } |
3235 | } |
3236 | |
3237 | static inline void trace_megasas_msi_raise(int vector) |
3238 | { |
3239 | if (true) { |
3240 | _nocheck__trace_megasas_msi_raise(vector); |
3241 | } |
3242 | } |
3243 | |
3244 | #define TRACE_MEGASAS_IRQ_LOWER_BACKEND_DSTATE() ( \ |
3245 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_IRQ_LOWER) || \ |
3246 | false) |
3247 | |
3248 | static inline void _nocheck__trace_megasas_irq_lower(void) |
3249 | { |
3250 | if (trace_event_get_state(TRACE_MEGASAS_IRQ_LOWER) && qemu_loglevel_mask(LOG_TRACE)) { |
3251 | struct timeval _now; |
3252 | gettimeofday(&_now, NULL); |
3253 | qemu_log("%d@%zu.%06zu:megasas_irq_lower " "INTx" "\n" , |
3254 | qemu_get_thread_id(), |
3255 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3256 | ); |
3257 | } |
3258 | } |
3259 | |
3260 | static inline void trace_megasas_irq_lower(void) |
3261 | { |
3262 | if (true) { |
3263 | _nocheck__trace_megasas_irq_lower(); |
3264 | } |
3265 | } |
3266 | |
3267 | #define TRACE_MEGASAS_IRQ_RAISE_BACKEND_DSTATE() ( \ |
3268 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_IRQ_RAISE) || \ |
3269 | false) |
3270 | |
3271 | static inline void _nocheck__trace_megasas_irq_raise(void) |
3272 | { |
3273 | if (trace_event_get_state(TRACE_MEGASAS_IRQ_RAISE) && qemu_loglevel_mask(LOG_TRACE)) { |
3274 | struct timeval _now; |
3275 | gettimeofday(&_now, NULL); |
3276 | qemu_log("%d@%zu.%06zu:megasas_irq_raise " "INTx" "\n" , |
3277 | qemu_get_thread_id(), |
3278 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3279 | ); |
3280 | } |
3281 | } |
3282 | |
3283 | static inline void trace_megasas_irq_raise(void) |
3284 | { |
3285 | if (true) { |
3286 | _nocheck__trace_megasas_irq_raise(); |
3287 | } |
3288 | } |
3289 | |
3290 | #define TRACE_MEGASAS_INTR_ENABLED_BACKEND_DSTATE() ( \ |
3291 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_INTR_ENABLED) || \ |
3292 | false) |
3293 | |
3294 | static inline void _nocheck__trace_megasas_intr_enabled(void) |
3295 | { |
3296 | if (trace_event_get_state(TRACE_MEGASAS_INTR_ENABLED) && qemu_loglevel_mask(LOG_TRACE)) { |
3297 | struct timeval _now; |
3298 | gettimeofday(&_now, NULL); |
3299 | qemu_log("%d@%zu.%06zu:megasas_intr_enabled " "Interrupts enabled" "\n" , |
3300 | qemu_get_thread_id(), |
3301 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3302 | ); |
3303 | } |
3304 | } |
3305 | |
3306 | static inline void trace_megasas_intr_enabled(void) |
3307 | { |
3308 | if (true) { |
3309 | _nocheck__trace_megasas_intr_enabled(); |
3310 | } |
3311 | } |
3312 | |
3313 | #define TRACE_MEGASAS_INTR_DISABLED_BACKEND_DSTATE() ( \ |
3314 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_INTR_DISABLED) || \ |
3315 | false) |
3316 | |
3317 | static inline void _nocheck__trace_megasas_intr_disabled(void) |
3318 | { |
3319 | if (trace_event_get_state(TRACE_MEGASAS_INTR_DISABLED) && qemu_loglevel_mask(LOG_TRACE)) { |
3320 | struct timeval _now; |
3321 | gettimeofday(&_now, NULL); |
3322 | qemu_log("%d@%zu.%06zu:megasas_intr_disabled " "Interrupts disabled" "\n" , |
3323 | qemu_get_thread_id(), |
3324 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3325 | ); |
3326 | } |
3327 | } |
3328 | |
3329 | static inline void trace_megasas_intr_disabled(void) |
3330 | { |
3331 | if (true) { |
3332 | _nocheck__trace_megasas_intr_disabled(); |
3333 | } |
3334 | } |
3335 | |
3336 | #define TRACE_MEGASAS_MSIX_ENABLED_BACKEND_DSTATE() ( \ |
3337 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_MSIX_ENABLED) || \ |
3338 | false) |
3339 | |
3340 | static inline void _nocheck__trace_megasas_msix_enabled(int vector) |
3341 | { |
3342 | if (trace_event_get_state(TRACE_MEGASAS_MSIX_ENABLED) && qemu_loglevel_mask(LOG_TRACE)) { |
3343 | struct timeval _now; |
3344 | gettimeofday(&_now, NULL); |
3345 | qemu_log("%d@%zu.%06zu:megasas_msix_enabled " "vector %d" "\n" , |
3346 | qemu_get_thread_id(), |
3347 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3348 | , vector); |
3349 | } |
3350 | } |
3351 | |
3352 | static inline void trace_megasas_msix_enabled(int vector) |
3353 | { |
3354 | if (true) { |
3355 | _nocheck__trace_megasas_msix_enabled(vector); |
3356 | } |
3357 | } |
3358 | |
3359 | #define TRACE_MEGASAS_MSI_ENABLED_BACKEND_DSTATE() ( \ |
3360 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_MSI_ENABLED) || \ |
3361 | false) |
3362 | |
3363 | static inline void _nocheck__trace_megasas_msi_enabled(int vector) |
3364 | { |
3365 | if (trace_event_get_state(TRACE_MEGASAS_MSI_ENABLED) && qemu_loglevel_mask(LOG_TRACE)) { |
3366 | struct timeval _now; |
3367 | gettimeofday(&_now, NULL); |
3368 | qemu_log("%d@%zu.%06zu:megasas_msi_enabled " "vector %d" "\n" , |
3369 | qemu_get_thread_id(), |
3370 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3371 | , vector); |
3372 | } |
3373 | } |
3374 | |
3375 | static inline void trace_megasas_msi_enabled(int vector) |
3376 | { |
3377 | if (true) { |
3378 | _nocheck__trace_megasas_msi_enabled(vector); |
3379 | } |
3380 | } |
3381 | |
3382 | #define TRACE_MEGASAS_MMIO_READL_BACKEND_DSTATE() ( \ |
3383 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_MMIO_READL) || \ |
3384 | false) |
3385 | |
3386 | static inline void _nocheck__trace_megasas_mmio_readl(const char * reg, uint32_t val) |
3387 | { |
3388 | if (trace_event_get_state(TRACE_MEGASAS_MMIO_READL) && qemu_loglevel_mask(LOG_TRACE)) { |
3389 | struct timeval _now; |
3390 | gettimeofday(&_now, NULL); |
3391 | qemu_log("%d@%zu.%06zu:megasas_mmio_readl " "reg %s: 0x%x" "\n" , |
3392 | qemu_get_thread_id(), |
3393 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3394 | , reg, val); |
3395 | } |
3396 | } |
3397 | |
3398 | static inline void trace_megasas_mmio_readl(const char * reg, uint32_t val) |
3399 | { |
3400 | if (true) { |
3401 | _nocheck__trace_megasas_mmio_readl(reg, val); |
3402 | } |
3403 | } |
3404 | |
3405 | #define TRACE_MEGASAS_MMIO_INVALID_READL_BACKEND_DSTATE() ( \ |
3406 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_MMIO_INVALID_READL) || \ |
3407 | false) |
3408 | |
3409 | static inline void _nocheck__trace_megasas_mmio_invalid_readl(unsigned long addr) |
3410 | { |
3411 | if (trace_event_get_state(TRACE_MEGASAS_MMIO_INVALID_READL) && qemu_loglevel_mask(LOG_TRACE)) { |
3412 | struct timeval _now; |
3413 | gettimeofday(&_now, NULL); |
3414 | qemu_log("%d@%zu.%06zu:megasas_mmio_invalid_readl " "addr 0x%lx" "\n" , |
3415 | qemu_get_thread_id(), |
3416 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3417 | , addr); |
3418 | } |
3419 | } |
3420 | |
3421 | static inline void trace_megasas_mmio_invalid_readl(unsigned long addr) |
3422 | { |
3423 | if (true) { |
3424 | _nocheck__trace_megasas_mmio_invalid_readl(addr); |
3425 | } |
3426 | } |
3427 | |
3428 | #define TRACE_MEGASAS_MMIO_WRITEL_BACKEND_DSTATE() ( \ |
3429 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_MMIO_WRITEL) || \ |
3430 | false) |
3431 | |
3432 | static inline void _nocheck__trace_megasas_mmio_writel(const char * reg, uint32_t val) |
3433 | { |
3434 | if (trace_event_get_state(TRACE_MEGASAS_MMIO_WRITEL) && qemu_loglevel_mask(LOG_TRACE)) { |
3435 | struct timeval _now; |
3436 | gettimeofday(&_now, NULL); |
3437 | qemu_log("%d@%zu.%06zu:megasas_mmio_writel " "reg %s: 0x%x" "\n" , |
3438 | qemu_get_thread_id(), |
3439 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3440 | , reg, val); |
3441 | } |
3442 | } |
3443 | |
3444 | static inline void trace_megasas_mmio_writel(const char * reg, uint32_t val) |
3445 | { |
3446 | if (true) { |
3447 | _nocheck__trace_megasas_mmio_writel(reg, val); |
3448 | } |
3449 | } |
3450 | |
3451 | #define TRACE_MEGASAS_MMIO_INVALID_WRITEL_BACKEND_DSTATE() ( \ |
3452 | trace_event_get_state_dynamic_by_id(TRACE_MEGASAS_MMIO_INVALID_WRITEL) || \ |
3453 | false) |
3454 | |
3455 | static inline void _nocheck__trace_megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) |
3456 | { |
3457 | if (trace_event_get_state(TRACE_MEGASAS_MMIO_INVALID_WRITEL) && qemu_loglevel_mask(LOG_TRACE)) { |
3458 | struct timeval _now; |
3459 | gettimeofday(&_now, NULL); |
3460 | qemu_log("%d@%zu.%06zu:megasas_mmio_invalid_writel " "addr 0x%x: 0x%x" "\n" , |
3461 | qemu_get_thread_id(), |
3462 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3463 | , addr, val); |
3464 | } |
3465 | } |
3466 | |
3467 | static inline void trace_megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) |
3468 | { |
3469 | if (true) { |
3470 | _nocheck__trace_megasas_mmio_invalid_writel(addr, val); |
3471 | } |
3472 | } |
3473 | |
3474 | #define TRACE_PVSCSI_RING_INIT_DATA_BACKEND_DSTATE() ( \ |
3475 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_RING_INIT_DATA) || \ |
3476 | false) |
3477 | |
3478 | static inline void _nocheck__trace_pvscsi_ring_init_data(uint32_t txr_len_log2, uint32_t rxr_len_log2) |
3479 | { |
3480 | if (trace_event_get_state(TRACE_PVSCSI_RING_INIT_DATA) && qemu_loglevel_mask(LOG_TRACE)) { |
3481 | struct timeval _now; |
3482 | gettimeofday(&_now, NULL); |
3483 | qemu_log("%d@%zu.%06zu:pvscsi_ring_init_data " "TX/RX rings logarithms set to %d/%d" "\n" , |
3484 | qemu_get_thread_id(), |
3485 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3486 | , txr_len_log2, rxr_len_log2); |
3487 | } |
3488 | } |
3489 | |
3490 | static inline void trace_pvscsi_ring_init_data(uint32_t txr_len_log2, uint32_t rxr_len_log2) |
3491 | { |
3492 | if (true) { |
3493 | _nocheck__trace_pvscsi_ring_init_data(txr_len_log2, rxr_len_log2); |
3494 | } |
3495 | } |
3496 | |
3497 | #define TRACE_PVSCSI_RING_INIT_MSG_BACKEND_DSTATE() ( \ |
3498 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_RING_INIT_MSG) || \ |
3499 | false) |
3500 | |
3501 | static inline void _nocheck__trace_pvscsi_ring_init_msg(uint32_t len_log2) |
3502 | { |
3503 | if (trace_event_get_state(TRACE_PVSCSI_RING_INIT_MSG) && qemu_loglevel_mask(LOG_TRACE)) { |
3504 | struct timeval _now; |
3505 | gettimeofday(&_now, NULL); |
3506 | qemu_log("%d@%zu.%06zu:pvscsi_ring_init_msg " "MSG ring logarithm set to %d" "\n" , |
3507 | qemu_get_thread_id(), |
3508 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3509 | , len_log2); |
3510 | } |
3511 | } |
3512 | |
3513 | static inline void trace_pvscsi_ring_init_msg(uint32_t len_log2) |
3514 | { |
3515 | if (true) { |
3516 | _nocheck__trace_pvscsi_ring_init_msg(len_log2); |
3517 | } |
3518 | } |
3519 | |
3520 | #define TRACE_PVSCSI_RING_FLUSH_CMP_BACKEND_DSTATE() ( \ |
3521 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_RING_FLUSH_CMP) || \ |
3522 | false) |
3523 | |
3524 | static inline void _nocheck__trace_pvscsi_ring_flush_cmp(uint64_t filled_cmp_ptr) |
3525 | { |
3526 | if (trace_event_get_state(TRACE_PVSCSI_RING_FLUSH_CMP) && qemu_loglevel_mask(LOG_TRACE)) { |
3527 | struct timeval _now; |
3528 | gettimeofday(&_now, NULL); |
3529 | qemu_log("%d@%zu.%06zu:pvscsi_ring_flush_cmp " "new production counter of completion ring is 0x%" PRIx64 "\n" , |
3530 | qemu_get_thread_id(), |
3531 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3532 | , filled_cmp_ptr); |
3533 | } |
3534 | } |
3535 | |
3536 | static inline void trace_pvscsi_ring_flush_cmp(uint64_t filled_cmp_ptr) |
3537 | { |
3538 | if (true) { |
3539 | _nocheck__trace_pvscsi_ring_flush_cmp(filled_cmp_ptr); |
3540 | } |
3541 | } |
3542 | |
3543 | #define TRACE_PVSCSI_RING_FLUSH_MSG_BACKEND_DSTATE() ( \ |
3544 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_RING_FLUSH_MSG) || \ |
3545 | false) |
3546 | |
3547 | static inline void _nocheck__trace_pvscsi_ring_flush_msg(uint64_t filled_cmp_ptr) |
3548 | { |
3549 | if (trace_event_get_state(TRACE_PVSCSI_RING_FLUSH_MSG) && qemu_loglevel_mask(LOG_TRACE)) { |
3550 | struct timeval _now; |
3551 | gettimeofday(&_now, NULL); |
3552 | qemu_log("%d@%zu.%06zu:pvscsi_ring_flush_msg " "new production counter of message ring is 0x%" PRIx64 "\n" , |
3553 | qemu_get_thread_id(), |
3554 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3555 | , filled_cmp_ptr); |
3556 | } |
3557 | } |
3558 | |
3559 | static inline void trace_pvscsi_ring_flush_msg(uint64_t filled_cmp_ptr) |
3560 | { |
3561 | if (true) { |
3562 | _nocheck__trace_pvscsi_ring_flush_msg(filled_cmp_ptr); |
3563 | } |
3564 | } |
3565 | |
3566 | #define TRACE_PVSCSI_UPDATE_IRQ_LEVEL_BACKEND_DSTATE() ( \ |
3567 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_UPDATE_IRQ_LEVEL) || \ |
3568 | false) |
3569 | |
3570 | static inline void _nocheck__trace_pvscsi_update_irq_level(bool raise, uint64_t mask, uint64_t status) |
3571 | { |
3572 | if (trace_event_get_state(TRACE_PVSCSI_UPDATE_IRQ_LEVEL) && qemu_loglevel_mask(LOG_TRACE)) { |
3573 | struct timeval _now; |
3574 | gettimeofday(&_now, NULL); |
3575 | qemu_log("%d@%zu.%06zu:pvscsi_update_irq_level " "interrupt level set to %d (MASK: 0x%" PRIx64", STATUS: 0x%" PRIx64")" "\n" , |
3576 | qemu_get_thread_id(), |
3577 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3578 | , raise, mask, status); |
3579 | } |
3580 | } |
3581 | |
3582 | static inline void trace_pvscsi_update_irq_level(bool raise, uint64_t mask, uint64_t status) |
3583 | { |
3584 | if (true) { |
3585 | _nocheck__trace_pvscsi_update_irq_level(raise, mask, status); |
3586 | } |
3587 | } |
3588 | |
3589 | #define TRACE_PVSCSI_UPDATE_IRQ_MSI_BACKEND_DSTATE() ( \ |
3590 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_UPDATE_IRQ_MSI) || \ |
3591 | false) |
3592 | |
3593 | static inline void _nocheck__trace_pvscsi_update_irq_msi(void) |
3594 | { |
3595 | if (trace_event_get_state(TRACE_PVSCSI_UPDATE_IRQ_MSI) && qemu_loglevel_mask(LOG_TRACE)) { |
3596 | struct timeval _now; |
3597 | gettimeofday(&_now, NULL); |
3598 | qemu_log("%d@%zu.%06zu:pvscsi_update_irq_msi " "sending MSI notification" "\n" , |
3599 | qemu_get_thread_id(), |
3600 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3601 | ); |
3602 | } |
3603 | } |
3604 | |
3605 | static inline void trace_pvscsi_update_irq_msi(void) |
3606 | { |
3607 | if (true) { |
3608 | _nocheck__trace_pvscsi_update_irq_msi(); |
3609 | } |
3610 | } |
3611 | |
3612 | #define TRACE_PVSCSI_CMP_RING_PUT_BACKEND_DSTATE() ( \ |
3613 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_CMP_RING_PUT) || \ |
3614 | false) |
3615 | |
3616 | static inline void _nocheck__trace_pvscsi_cmp_ring_put(unsigned long addr) |
3617 | { |
3618 | if (trace_event_get_state(TRACE_PVSCSI_CMP_RING_PUT) && qemu_loglevel_mask(LOG_TRACE)) { |
3619 | struct timeval _now; |
3620 | gettimeofday(&_now, NULL); |
3621 | qemu_log("%d@%zu.%06zu:pvscsi_cmp_ring_put " "got completion descriptor 0x%lx" "\n" , |
3622 | qemu_get_thread_id(), |
3623 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3624 | , addr); |
3625 | } |
3626 | } |
3627 | |
3628 | static inline void trace_pvscsi_cmp_ring_put(unsigned long addr) |
3629 | { |
3630 | if (true) { |
3631 | _nocheck__trace_pvscsi_cmp_ring_put(addr); |
3632 | } |
3633 | } |
3634 | |
3635 | #define TRACE_PVSCSI_MSG_RING_PUT_BACKEND_DSTATE() ( \ |
3636 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_MSG_RING_PUT) || \ |
3637 | false) |
3638 | |
3639 | static inline void _nocheck__trace_pvscsi_msg_ring_put(unsigned long addr) |
3640 | { |
3641 | if (trace_event_get_state(TRACE_PVSCSI_MSG_RING_PUT) && qemu_loglevel_mask(LOG_TRACE)) { |
3642 | struct timeval _now; |
3643 | gettimeofday(&_now, NULL); |
3644 | qemu_log("%d@%zu.%06zu:pvscsi_msg_ring_put " "got message descriptor 0x%lx" "\n" , |
3645 | qemu_get_thread_id(), |
3646 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3647 | , addr); |
3648 | } |
3649 | } |
3650 | |
3651 | static inline void trace_pvscsi_msg_ring_put(unsigned long addr) |
3652 | { |
3653 | if (true) { |
3654 | _nocheck__trace_pvscsi_msg_ring_put(addr); |
3655 | } |
3656 | } |
3657 | |
3658 | #define TRACE_PVSCSI_COMPLETE_REQUEST_BACKEND_DSTATE() ( \ |
3659 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_COMPLETE_REQUEST) || \ |
3660 | false) |
3661 | |
3662 | static inline void _nocheck__trace_pvscsi_complete_request(uint64_t context, uint64_t len, uint8_t sense_key) |
3663 | { |
3664 | if (trace_event_get_state(TRACE_PVSCSI_COMPLETE_REQUEST) && qemu_loglevel_mask(LOG_TRACE)) { |
3665 | struct timeval _now; |
3666 | gettimeofday(&_now, NULL); |
3667 | qemu_log("%d@%zu.%06zu:pvscsi_complete_request " "completion: ctx: 0x%" PRIx64", len: 0x%" PRIx64", sense key: %u" "\n" , |
3668 | qemu_get_thread_id(), |
3669 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3670 | , context, len, sense_key); |
3671 | } |
3672 | } |
3673 | |
3674 | static inline void trace_pvscsi_complete_request(uint64_t context, uint64_t len, uint8_t sense_key) |
3675 | { |
3676 | if (true) { |
3677 | _nocheck__trace_pvscsi_complete_request(context, len, sense_key); |
3678 | } |
3679 | } |
3680 | |
3681 | #define TRACE_PVSCSI_GET_SG_LIST_BACKEND_DSTATE() ( \ |
3682 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_GET_SG_LIST) || \ |
3683 | false) |
3684 | |
3685 | static inline void _nocheck__trace_pvscsi_get_sg_list(int nsg, size_t size) |
3686 | { |
3687 | if (trace_event_get_state(TRACE_PVSCSI_GET_SG_LIST) && qemu_loglevel_mask(LOG_TRACE)) { |
3688 | struct timeval _now; |
3689 | gettimeofday(&_now, NULL); |
3690 | qemu_log("%d@%zu.%06zu:pvscsi_get_sg_list " "get SG list: depth: %u, size: %zu" "\n" , |
3691 | qemu_get_thread_id(), |
3692 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3693 | , nsg, size); |
3694 | } |
3695 | } |
3696 | |
3697 | static inline void trace_pvscsi_get_sg_list(int nsg, size_t size) |
3698 | { |
3699 | if (true) { |
3700 | _nocheck__trace_pvscsi_get_sg_list(nsg, size); |
3701 | } |
3702 | } |
3703 | |
3704 | #define TRACE_PVSCSI_GET_NEXT_SG_ELEM_BACKEND_DSTATE() ( \ |
3705 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_GET_NEXT_SG_ELEM) || \ |
3706 | false) |
3707 | |
3708 | static inline void _nocheck__trace_pvscsi_get_next_sg_elem(uint32_t flags) |
3709 | { |
3710 | if (trace_event_get_state(TRACE_PVSCSI_GET_NEXT_SG_ELEM) && qemu_loglevel_mask(LOG_TRACE)) { |
3711 | struct timeval _now; |
3712 | gettimeofday(&_now, NULL); |
3713 | qemu_log("%d@%zu.%06zu:pvscsi_get_next_sg_elem " "unknown flags in SG element (val: 0x%x)" "\n" , |
3714 | qemu_get_thread_id(), |
3715 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3716 | , flags); |
3717 | } |
3718 | } |
3719 | |
3720 | static inline void trace_pvscsi_get_next_sg_elem(uint32_t flags) |
3721 | { |
3722 | if (true) { |
3723 | _nocheck__trace_pvscsi_get_next_sg_elem(flags); |
3724 | } |
3725 | } |
3726 | |
3727 | #define TRACE_PVSCSI_COMMAND_COMPLETE_NOT_FOUND_BACKEND_DSTATE() ( \ |
3728 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_COMMAND_COMPLETE_NOT_FOUND) || \ |
3729 | false) |
3730 | |
3731 | static inline void _nocheck__trace_pvscsi_command_complete_not_found(uint32_t tag) |
3732 | { |
3733 | if (trace_event_get_state(TRACE_PVSCSI_COMMAND_COMPLETE_NOT_FOUND) && qemu_loglevel_mask(LOG_TRACE)) { |
3734 | struct timeval _now; |
3735 | gettimeofday(&_now, NULL); |
3736 | qemu_log("%d@%zu.%06zu:pvscsi_command_complete_not_found " "can't find request for tag 0x%x" "\n" , |
3737 | qemu_get_thread_id(), |
3738 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3739 | , tag); |
3740 | } |
3741 | } |
3742 | |
3743 | static inline void trace_pvscsi_command_complete_not_found(uint32_t tag) |
3744 | { |
3745 | if (true) { |
3746 | _nocheck__trace_pvscsi_command_complete_not_found(tag); |
3747 | } |
3748 | } |
3749 | |
3750 | #define TRACE_PVSCSI_COMMAND_COMPLETE_DATA_RUN_BACKEND_DSTATE() ( \ |
3751 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_COMMAND_COMPLETE_DATA_RUN) || \ |
3752 | false) |
3753 | |
3754 | static inline void _nocheck__trace_pvscsi_command_complete_data_run(void) |
3755 | { |
3756 | if (trace_event_get_state(TRACE_PVSCSI_COMMAND_COMPLETE_DATA_RUN) && qemu_loglevel_mask(LOG_TRACE)) { |
3757 | struct timeval _now; |
3758 | gettimeofday(&_now, NULL); |
3759 | qemu_log("%d@%zu.%06zu:pvscsi_command_complete_data_run " "not all data required for command transferred" "\n" , |
3760 | qemu_get_thread_id(), |
3761 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3762 | ); |
3763 | } |
3764 | } |
3765 | |
3766 | static inline void trace_pvscsi_command_complete_data_run(void) |
3767 | { |
3768 | if (true) { |
3769 | _nocheck__trace_pvscsi_command_complete_data_run(); |
3770 | } |
3771 | } |
3772 | |
3773 | #define TRACE_PVSCSI_COMMAND_COMPLETE_SENSE_LEN_BACKEND_DSTATE() ( \ |
3774 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_COMMAND_COMPLETE_SENSE_LEN) || \ |
3775 | false) |
3776 | |
3777 | static inline void _nocheck__trace_pvscsi_command_complete_sense_len(int len) |
3778 | { |
3779 | if (trace_event_get_state(TRACE_PVSCSI_COMMAND_COMPLETE_SENSE_LEN) && qemu_loglevel_mask(LOG_TRACE)) { |
3780 | struct timeval _now; |
3781 | gettimeofday(&_now, NULL); |
3782 | qemu_log("%d@%zu.%06zu:pvscsi_command_complete_sense_len " "sense information length is %d bytes" "\n" , |
3783 | qemu_get_thread_id(), |
3784 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3785 | , len); |
3786 | } |
3787 | } |
3788 | |
3789 | static inline void trace_pvscsi_command_complete_sense_len(int len) |
3790 | { |
3791 | if (true) { |
3792 | _nocheck__trace_pvscsi_command_complete_sense_len(len); |
3793 | } |
3794 | } |
3795 | |
3796 | #define TRACE_PVSCSI_CONVERT_SGLIST_BACKEND_DSTATE() ( \ |
3797 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_CONVERT_SGLIST) || \ |
3798 | false) |
3799 | |
3800 | static inline void _nocheck__trace_pvscsi_convert_sglist(uint64_t context, unsigned long addr, uint32_t resid) |
3801 | { |
3802 | if (trace_event_get_state(TRACE_PVSCSI_CONVERT_SGLIST) && qemu_loglevel_mask(LOG_TRACE)) { |
3803 | struct timeval _now; |
3804 | gettimeofday(&_now, NULL); |
3805 | qemu_log("%d@%zu.%06zu:pvscsi_convert_sglist " "element: ctx: 0x%" PRIx64" addr: 0x%lx, len: %ul" "\n" , |
3806 | qemu_get_thread_id(), |
3807 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3808 | , context, addr, resid); |
3809 | } |
3810 | } |
3811 | |
3812 | static inline void trace_pvscsi_convert_sglist(uint64_t context, unsigned long addr, uint32_t resid) |
3813 | { |
3814 | if (true) { |
3815 | _nocheck__trace_pvscsi_convert_sglist(context, addr, resid); |
3816 | } |
3817 | } |
3818 | |
3819 | #define TRACE_PVSCSI_PROCESS_REQ_DESCR_BACKEND_DSTATE() ( \ |
3820 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_PROCESS_REQ_DESCR) || \ |
3821 | false) |
3822 | |
3823 | static inline void _nocheck__trace_pvscsi_process_req_descr(uint8_t cmd, uint64_t ctx) |
3824 | { |
3825 | if (trace_event_get_state(TRACE_PVSCSI_PROCESS_REQ_DESCR) && qemu_loglevel_mask(LOG_TRACE)) { |
3826 | struct timeval _now; |
3827 | gettimeofday(&_now, NULL); |
3828 | qemu_log("%d@%zu.%06zu:pvscsi_process_req_descr " "SCSI cmd 0x%x, ctx: 0x%" PRIx64 "\n" , |
3829 | qemu_get_thread_id(), |
3830 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3831 | , cmd, ctx); |
3832 | } |
3833 | } |
3834 | |
3835 | static inline void trace_pvscsi_process_req_descr(uint8_t cmd, uint64_t ctx) |
3836 | { |
3837 | if (true) { |
3838 | _nocheck__trace_pvscsi_process_req_descr(cmd, ctx); |
3839 | } |
3840 | } |
3841 | |
3842 | #define TRACE_PVSCSI_PROCESS_REQ_DESCR_UNKNOWN_DEVICE_BACKEND_DSTATE() ( \ |
3843 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_PROCESS_REQ_DESCR_UNKNOWN_DEVICE) || \ |
3844 | false) |
3845 | |
3846 | static inline void _nocheck__trace_pvscsi_process_req_descr_unknown_device(void) |
3847 | { |
3848 | if (trace_event_get_state(TRACE_PVSCSI_PROCESS_REQ_DESCR_UNKNOWN_DEVICE) && qemu_loglevel_mask(LOG_TRACE)) { |
3849 | struct timeval _now; |
3850 | gettimeofday(&_now, NULL); |
3851 | qemu_log("%d@%zu.%06zu:pvscsi_process_req_descr_unknown_device " "command directed to unknown device rejected" "\n" , |
3852 | qemu_get_thread_id(), |
3853 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3854 | ); |
3855 | } |
3856 | } |
3857 | |
3858 | static inline void trace_pvscsi_process_req_descr_unknown_device(void) |
3859 | { |
3860 | if (true) { |
3861 | _nocheck__trace_pvscsi_process_req_descr_unknown_device(); |
3862 | } |
3863 | } |
3864 | |
3865 | #define TRACE_PVSCSI_PROCESS_REQ_DESCR_INVALID_DIR_BACKEND_DSTATE() ( \ |
3866 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_PROCESS_REQ_DESCR_INVALID_DIR) || \ |
3867 | false) |
3868 | |
3869 | static inline void _nocheck__trace_pvscsi_process_req_descr_invalid_dir(void) |
3870 | { |
3871 | if (trace_event_get_state(TRACE_PVSCSI_PROCESS_REQ_DESCR_INVALID_DIR) && qemu_loglevel_mask(LOG_TRACE)) { |
3872 | struct timeval _now; |
3873 | gettimeofday(&_now, NULL); |
3874 | qemu_log("%d@%zu.%06zu:pvscsi_process_req_descr_invalid_dir " "command with invalid transfer direction rejected" "\n" , |
3875 | qemu_get_thread_id(), |
3876 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3877 | ); |
3878 | } |
3879 | } |
3880 | |
3881 | static inline void trace_pvscsi_process_req_descr_invalid_dir(void) |
3882 | { |
3883 | if (true) { |
3884 | _nocheck__trace_pvscsi_process_req_descr_invalid_dir(); |
3885 | } |
3886 | } |
3887 | |
3888 | #define TRACE_PVSCSI_PROCESS_IO_BACKEND_DSTATE() ( \ |
3889 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_PROCESS_IO) || \ |
3890 | false) |
3891 | |
3892 | static inline void _nocheck__trace_pvscsi_process_io(unsigned long addr) |
3893 | { |
3894 | if (trace_event_get_state(TRACE_PVSCSI_PROCESS_IO) && qemu_loglevel_mask(LOG_TRACE)) { |
3895 | struct timeval _now; |
3896 | gettimeofday(&_now, NULL); |
3897 | qemu_log("%d@%zu.%06zu:pvscsi_process_io " "got descriptor 0x%lx" "\n" , |
3898 | qemu_get_thread_id(), |
3899 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3900 | , addr); |
3901 | } |
3902 | } |
3903 | |
3904 | static inline void trace_pvscsi_process_io(unsigned long addr) |
3905 | { |
3906 | if (true) { |
3907 | _nocheck__trace_pvscsi_process_io(addr); |
3908 | } |
3909 | } |
3910 | |
3911 | #define TRACE_PVSCSI_ON_CMD_NOIMPL_BACKEND_DSTATE() ( \ |
3912 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_ON_CMD_NOIMPL) || \ |
3913 | false) |
3914 | |
3915 | static inline void _nocheck__trace_pvscsi_on_cmd_noimpl(const char* cmd) |
3916 | { |
3917 | if (trace_event_get_state(TRACE_PVSCSI_ON_CMD_NOIMPL) && qemu_loglevel_mask(LOG_TRACE)) { |
3918 | struct timeval _now; |
3919 | gettimeofday(&_now, NULL); |
3920 | qemu_log("%d@%zu.%06zu:pvscsi_on_cmd_noimpl " "unimplemented command %s ignored" "\n" , |
3921 | qemu_get_thread_id(), |
3922 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3923 | , cmd); |
3924 | } |
3925 | } |
3926 | |
3927 | static inline void trace_pvscsi_on_cmd_noimpl(const char* cmd) |
3928 | { |
3929 | if (true) { |
3930 | _nocheck__trace_pvscsi_on_cmd_noimpl(cmd); |
3931 | } |
3932 | } |
3933 | |
3934 | #define TRACE_PVSCSI_ON_CMD_RESET_DEV_BACKEND_DSTATE() ( \ |
3935 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_ON_CMD_RESET_DEV) || \ |
3936 | false) |
3937 | |
3938 | static inline void _nocheck__trace_pvscsi_on_cmd_reset_dev(uint32_t tgt, int lun, void* dev) |
3939 | { |
3940 | if (trace_event_get_state(TRACE_PVSCSI_ON_CMD_RESET_DEV) && qemu_loglevel_mask(LOG_TRACE)) { |
3941 | struct timeval _now; |
3942 | gettimeofday(&_now, NULL); |
3943 | qemu_log("%d@%zu.%06zu:pvscsi_on_cmd_reset_dev " "PVSCSI_CMD_RESET_DEVICE[target %u lun %d (dev 0x%p)]" "\n" , |
3944 | qemu_get_thread_id(), |
3945 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3946 | , tgt, lun, dev); |
3947 | } |
3948 | } |
3949 | |
3950 | static inline void trace_pvscsi_on_cmd_reset_dev(uint32_t tgt, int lun, void* dev) |
3951 | { |
3952 | if (true) { |
3953 | _nocheck__trace_pvscsi_on_cmd_reset_dev(tgt, lun, dev); |
3954 | } |
3955 | } |
3956 | |
3957 | #define TRACE_PVSCSI_ON_CMD_ARRIVED_BACKEND_DSTATE() ( \ |
3958 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_ON_CMD_ARRIVED) || \ |
3959 | false) |
3960 | |
3961 | static inline void _nocheck__trace_pvscsi_on_cmd_arrived(const char* cmd) |
3962 | { |
3963 | if (trace_event_get_state(TRACE_PVSCSI_ON_CMD_ARRIVED) && qemu_loglevel_mask(LOG_TRACE)) { |
3964 | struct timeval _now; |
3965 | gettimeofday(&_now, NULL); |
3966 | qemu_log("%d@%zu.%06zu:pvscsi_on_cmd_arrived " "command %s arrived" "\n" , |
3967 | qemu_get_thread_id(), |
3968 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3969 | , cmd); |
3970 | } |
3971 | } |
3972 | |
3973 | static inline void trace_pvscsi_on_cmd_arrived(const char* cmd) |
3974 | { |
3975 | if (true) { |
3976 | _nocheck__trace_pvscsi_on_cmd_arrived(cmd); |
3977 | } |
3978 | } |
3979 | |
3980 | #define TRACE_PVSCSI_ON_CMD_ABORT_BACKEND_DSTATE() ( \ |
3981 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_ON_CMD_ABORT) || \ |
3982 | false) |
3983 | |
3984 | static inline void _nocheck__trace_pvscsi_on_cmd_abort(uint64_t ctx, uint32_t tgt) |
3985 | { |
3986 | if (trace_event_get_state(TRACE_PVSCSI_ON_CMD_ABORT) && qemu_loglevel_mask(LOG_TRACE)) { |
3987 | struct timeval _now; |
3988 | gettimeofday(&_now, NULL); |
3989 | qemu_log("%d@%zu.%06zu:pvscsi_on_cmd_abort " "command PVSCSI_CMD_ABORT_CMD for ctx 0x%" PRIx64", target %u" "\n" , |
3990 | qemu_get_thread_id(), |
3991 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3992 | , ctx, tgt); |
3993 | } |
3994 | } |
3995 | |
3996 | static inline void trace_pvscsi_on_cmd_abort(uint64_t ctx, uint32_t tgt) |
3997 | { |
3998 | if (true) { |
3999 | _nocheck__trace_pvscsi_on_cmd_abort(ctx, tgt); |
4000 | } |
4001 | } |
4002 | |
4003 | #define TRACE_PVSCSI_ON_CMD_UNKNOWN_BACKEND_DSTATE() ( \ |
4004 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_ON_CMD_UNKNOWN) || \ |
4005 | false) |
4006 | |
4007 | static inline void _nocheck__trace_pvscsi_on_cmd_unknown(uint64_t cmd_id) |
4008 | { |
4009 | if (trace_event_get_state(TRACE_PVSCSI_ON_CMD_UNKNOWN) && qemu_loglevel_mask(LOG_TRACE)) { |
4010 | struct timeval _now; |
4011 | gettimeofday(&_now, NULL); |
4012 | qemu_log("%d@%zu.%06zu:pvscsi_on_cmd_unknown " "unknown command 0x%" PRIx64 "\n" , |
4013 | qemu_get_thread_id(), |
4014 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4015 | , cmd_id); |
4016 | } |
4017 | } |
4018 | |
4019 | static inline void trace_pvscsi_on_cmd_unknown(uint64_t cmd_id) |
4020 | { |
4021 | if (true) { |
4022 | _nocheck__trace_pvscsi_on_cmd_unknown(cmd_id); |
4023 | } |
4024 | } |
4025 | |
4026 | #define TRACE_PVSCSI_ON_CMD_UNKNOWN_DATA_BACKEND_DSTATE() ( \ |
4027 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_ON_CMD_UNKNOWN_DATA) || \ |
4028 | false) |
4029 | |
4030 | static inline void _nocheck__trace_pvscsi_on_cmd_unknown_data(uint32_t data) |
4031 | { |
4032 | if (trace_event_get_state(TRACE_PVSCSI_ON_CMD_UNKNOWN_DATA) && qemu_loglevel_mask(LOG_TRACE)) { |
4033 | struct timeval _now; |
4034 | gettimeofday(&_now, NULL); |
4035 | qemu_log("%d@%zu.%06zu:pvscsi_on_cmd_unknown_data " "data for unknown command 0x:0x%x" "\n" , |
4036 | qemu_get_thread_id(), |
4037 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4038 | , data); |
4039 | } |
4040 | } |
4041 | |
4042 | static inline void trace_pvscsi_on_cmd_unknown_data(uint32_t data) |
4043 | { |
4044 | if (true) { |
4045 | _nocheck__trace_pvscsi_on_cmd_unknown_data(data); |
4046 | } |
4047 | } |
4048 | |
4049 | #define TRACE_PVSCSI_IO_WRITE_BACKEND_DSTATE() ( \ |
4050 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_IO_WRITE) || \ |
4051 | false) |
4052 | |
4053 | static inline void _nocheck__trace_pvscsi_io_write(const char* cmd, uint64_t val) |
4054 | { |
4055 | if (trace_event_get_state(TRACE_PVSCSI_IO_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
4056 | struct timeval _now; |
4057 | gettimeofday(&_now, NULL); |
4058 | qemu_log("%d@%zu.%06zu:pvscsi_io_write " "%s write: 0x%" PRIx64 "\n" , |
4059 | qemu_get_thread_id(), |
4060 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4061 | , cmd, val); |
4062 | } |
4063 | } |
4064 | |
4065 | static inline void trace_pvscsi_io_write(const char* cmd, uint64_t val) |
4066 | { |
4067 | if (true) { |
4068 | _nocheck__trace_pvscsi_io_write(cmd, val); |
4069 | } |
4070 | } |
4071 | |
4072 | #define TRACE_PVSCSI_IO_WRITE_UNKNOWN_BACKEND_DSTATE() ( \ |
4073 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_IO_WRITE_UNKNOWN) || \ |
4074 | false) |
4075 | |
4076 | static inline void _nocheck__trace_pvscsi_io_write_unknown(unsigned long addr, unsigned sz, uint64_t val) |
4077 | { |
4078 | if (trace_event_get_state(TRACE_PVSCSI_IO_WRITE_UNKNOWN) && qemu_loglevel_mask(LOG_TRACE)) { |
4079 | struct timeval _now; |
4080 | gettimeofday(&_now, NULL); |
4081 | qemu_log("%d@%zu.%06zu:pvscsi_io_write_unknown " "unknown write address: 0x%lx size: %u bytes value: 0x%" PRIx64 "\n" , |
4082 | qemu_get_thread_id(), |
4083 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4084 | , addr, sz, val); |
4085 | } |
4086 | } |
4087 | |
4088 | static inline void trace_pvscsi_io_write_unknown(unsigned long addr, unsigned sz, uint64_t val) |
4089 | { |
4090 | if (true) { |
4091 | _nocheck__trace_pvscsi_io_write_unknown(addr, sz, val); |
4092 | } |
4093 | } |
4094 | |
4095 | #define TRACE_PVSCSI_IO_READ_BACKEND_DSTATE() ( \ |
4096 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_IO_READ) || \ |
4097 | false) |
4098 | |
4099 | static inline void _nocheck__trace_pvscsi_io_read(const char* cmd, uint64_t status) |
4100 | { |
4101 | if (trace_event_get_state(TRACE_PVSCSI_IO_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
4102 | struct timeval _now; |
4103 | gettimeofday(&_now, NULL); |
4104 | qemu_log("%d@%zu.%06zu:pvscsi_io_read " "%s read: 0x%" PRIx64 "\n" , |
4105 | qemu_get_thread_id(), |
4106 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4107 | , cmd, status); |
4108 | } |
4109 | } |
4110 | |
4111 | static inline void trace_pvscsi_io_read(const char* cmd, uint64_t status) |
4112 | { |
4113 | if (true) { |
4114 | _nocheck__trace_pvscsi_io_read(cmd, status); |
4115 | } |
4116 | } |
4117 | |
4118 | #define TRACE_PVSCSI_IO_READ_UNKNOWN_BACKEND_DSTATE() ( \ |
4119 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_IO_READ_UNKNOWN) || \ |
4120 | false) |
4121 | |
4122 | static inline void _nocheck__trace_pvscsi_io_read_unknown(unsigned long addr, unsigned sz) |
4123 | { |
4124 | if (trace_event_get_state(TRACE_PVSCSI_IO_READ_UNKNOWN) && qemu_loglevel_mask(LOG_TRACE)) { |
4125 | struct timeval _now; |
4126 | gettimeofday(&_now, NULL); |
4127 | qemu_log("%d@%zu.%06zu:pvscsi_io_read_unknown " "unknown read address: 0x%lx size: %u bytes" "\n" , |
4128 | qemu_get_thread_id(), |
4129 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4130 | , addr, sz); |
4131 | } |
4132 | } |
4133 | |
4134 | static inline void trace_pvscsi_io_read_unknown(unsigned long addr, unsigned sz) |
4135 | { |
4136 | if (true) { |
4137 | _nocheck__trace_pvscsi_io_read_unknown(addr, sz); |
4138 | } |
4139 | } |
4140 | |
4141 | #define TRACE_PVSCSI_INIT_MSI_FAIL_BACKEND_DSTATE() ( \ |
4142 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_INIT_MSI_FAIL) || \ |
4143 | false) |
4144 | |
4145 | static inline void _nocheck__trace_pvscsi_init_msi_fail(int res) |
4146 | { |
4147 | if (trace_event_get_state(TRACE_PVSCSI_INIT_MSI_FAIL) && qemu_loglevel_mask(LOG_TRACE)) { |
4148 | struct timeval _now; |
4149 | gettimeofday(&_now, NULL); |
4150 | qemu_log("%d@%zu.%06zu:pvscsi_init_msi_fail " "failed to initialize MSI, error %d" "\n" , |
4151 | qemu_get_thread_id(), |
4152 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4153 | , res); |
4154 | } |
4155 | } |
4156 | |
4157 | static inline void trace_pvscsi_init_msi_fail(int res) |
4158 | { |
4159 | if (true) { |
4160 | _nocheck__trace_pvscsi_init_msi_fail(res); |
4161 | } |
4162 | } |
4163 | |
4164 | #define TRACE_PVSCSI_STATE_BACKEND_DSTATE() ( \ |
4165 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_STATE) || \ |
4166 | false) |
4167 | |
4168 | static inline void _nocheck__trace_pvscsi_state(const char* state) |
4169 | { |
4170 | if (trace_event_get_state(TRACE_PVSCSI_STATE) && qemu_loglevel_mask(LOG_TRACE)) { |
4171 | struct timeval _now; |
4172 | gettimeofday(&_now, NULL); |
4173 | qemu_log("%d@%zu.%06zu:pvscsi_state " "starting %s ..." "\n" , |
4174 | qemu_get_thread_id(), |
4175 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4176 | , state); |
4177 | } |
4178 | } |
4179 | |
4180 | static inline void trace_pvscsi_state(const char* state) |
4181 | { |
4182 | if (true) { |
4183 | _nocheck__trace_pvscsi_state(state); |
4184 | } |
4185 | } |
4186 | |
4187 | #define TRACE_PVSCSI_TX_RINGS_PPN_BACKEND_DSTATE() ( \ |
4188 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_TX_RINGS_PPN) || \ |
4189 | false) |
4190 | |
4191 | static inline void _nocheck__trace_pvscsi_tx_rings_ppn(const char* label, uint64_t ppn) |
4192 | { |
4193 | if (trace_event_get_state(TRACE_PVSCSI_TX_RINGS_PPN) && qemu_loglevel_mask(LOG_TRACE)) { |
4194 | struct timeval _now; |
4195 | gettimeofday(&_now, NULL); |
4196 | qemu_log("%d@%zu.%06zu:pvscsi_tx_rings_ppn " "%s page: 0x%" PRIx64 "\n" , |
4197 | qemu_get_thread_id(), |
4198 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4199 | , label, ppn); |
4200 | } |
4201 | } |
4202 | |
4203 | static inline void trace_pvscsi_tx_rings_ppn(const char* label, uint64_t ppn) |
4204 | { |
4205 | if (true) { |
4206 | _nocheck__trace_pvscsi_tx_rings_ppn(label, ppn); |
4207 | } |
4208 | } |
4209 | |
4210 | #define TRACE_PVSCSI_TX_RINGS_NUM_PAGES_BACKEND_DSTATE() ( \ |
4211 | trace_event_get_state_dynamic_by_id(TRACE_PVSCSI_TX_RINGS_NUM_PAGES) || \ |
4212 | false) |
4213 | |
4214 | static inline void _nocheck__trace_pvscsi_tx_rings_num_pages(const char* label, uint32_t num) |
4215 | { |
4216 | if (trace_event_get_state(TRACE_PVSCSI_TX_RINGS_NUM_PAGES) && qemu_loglevel_mask(LOG_TRACE)) { |
4217 | struct timeval _now; |
4218 | gettimeofday(&_now, NULL); |
4219 | qemu_log("%d@%zu.%06zu:pvscsi_tx_rings_num_pages " "Number of %s pages: %u" "\n" , |
4220 | qemu_get_thread_id(), |
4221 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4222 | , label, num); |
4223 | } |
4224 | } |
4225 | |
4226 | static inline void trace_pvscsi_tx_rings_num_pages(const char* label, uint32_t num) |
4227 | { |
4228 | if (true) { |
4229 | _nocheck__trace_pvscsi_tx_rings_num_pages(label, num); |
4230 | } |
4231 | } |
4232 | |
4233 | #define TRACE_ESP_ERROR_FIFO_OVERRUN_BACKEND_DSTATE() ( \ |
4234 | trace_event_get_state_dynamic_by_id(TRACE_ESP_ERROR_FIFO_OVERRUN) || \ |
4235 | false) |
4236 | |
4237 | static inline void _nocheck__trace_esp_error_fifo_overrun(void) |
4238 | { |
4239 | if (trace_event_get_state(TRACE_ESP_ERROR_FIFO_OVERRUN) && qemu_loglevel_mask(LOG_TRACE)) { |
4240 | struct timeval _now; |
4241 | gettimeofday(&_now, NULL); |
4242 | qemu_log("%d@%zu.%06zu:esp_error_fifo_overrun " "FIFO overrun" "\n" , |
4243 | qemu_get_thread_id(), |
4244 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4245 | ); |
4246 | } |
4247 | } |
4248 | |
4249 | static inline void trace_esp_error_fifo_overrun(void) |
4250 | { |
4251 | if (true) { |
4252 | _nocheck__trace_esp_error_fifo_overrun(); |
4253 | } |
4254 | } |
4255 | |
4256 | #define TRACE_ESP_ERROR_UNHANDLED_COMMAND_BACKEND_DSTATE() ( \ |
4257 | trace_event_get_state_dynamic_by_id(TRACE_ESP_ERROR_UNHANDLED_COMMAND) || \ |
4258 | false) |
4259 | |
4260 | static inline void _nocheck__trace_esp_error_unhandled_command(uint32_t val) |
4261 | { |
4262 | if (trace_event_get_state(TRACE_ESP_ERROR_UNHANDLED_COMMAND) && qemu_loglevel_mask(LOG_TRACE)) { |
4263 | struct timeval _now; |
4264 | gettimeofday(&_now, NULL); |
4265 | qemu_log("%d@%zu.%06zu:esp_error_unhandled_command " "unhandled command (0x%2.2x)" "\n" , |
4266 | qemu_get_thread_id(), |
4267 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4268 | , val); |
4269 | } |
4270 | } |
4271 | |
4272 | static inline void trace_esp_error_unhandled_command(uint32_t val) |
4273 | { |
4274 | if (true) { |
4275 | _nocheck__trace_esp_error_unhandled_command(val); |
4276 | } |
4277 | } |
4278 | |
4279 | #define TRACE_ESP_ERROR_INVALID_WRITE_BACKEND_DSTATE() ( \ |
4280 | trace_event_get_state_dynamic_by_id(TRACE_ESP_ERROR_INVALID_WRITE) || \ |
4281 | false) |
4282 | |
4283 | static inline void _nocheck__trace_esp_error_invalid_write(uint32_t val, uint32_t addr) |
4284 | { |
4285 | if (trace_event_get_state(TRACE_ESP_ERROR_INVALID_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
4286 | struct timeval _now; |
4287 | gettimeofday(&_now, NULL); |
4288 | qemu_log("%d@%zu.%06zu:esp_error_invalid_write " "invalid write of 0x%02x at [0x%x]" "\n" , |
4289 | qemu_get_thread_id(), |
4290 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4291 | , val, addr); |
4292 | } |
4293 | } |
4294 | |
4295 | static inline void trace_esp_error_invalid_write(uint32_t val, uint32_t addr) |
4296 | { |
4297 | if (true) { |
4298 | _nocheck__trace_esp_error_invalid_write(val, addr); |
4299 | } |
4300 | } |
4301 | |
4302 | #define TRACE_ESP_RAISE_IRQ_BACKEND_DSTATE() ( \ |
4303 | trace_event_get_state_dynamic_by_id(TRACE_ESP_RAISE_IRQ) || \ |
4304 | false) |
4305 | |
4306 | static inline void _nocheck__trace_esp_raise_irq(void) |
4307 | { |
4308 | if (trace_event_get_state(TRACE_ESP_RAISE_IRQ) && qemu_loglevel_mask(LOG_TRACE)) { |
4309 | struct timeval _now; |
4310 | gettimeofday(&_now, NULL); |
4311 | qemu_log("%d@%zu.%06zu:esp_raise_irq " "Raise IRQ" "\n" , |
4312 | qemu_get_thread_id(), |
4313 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4314 | ); |
4315 | } |
4316 | } |
4317 | |
4318 | static inline void trace_esp_raise_irq(void) |
4319 | { |
4320 | if (true) { |
4321 | _nocheck__trace_esp_raise_irq(); |
4322 | } |
4323 | } |
4324 | |
4325 | #define TRACE_ESP_LOWER_IRQ_BACKEND_DSTATE() ( \ |
4326 | trace_event_get_state_dynamic_by_id(TRACE_ESP_LOWER_IRQ) || \ |
4327 | false) |
4328 | |
4329 | static inline void _nocheck__trace_esp_lower_irq(void) |
4330 | { |
4331 | if (trace_event_get_state(TRACE_ESP_LOWER_IRQ) && qemu_loglevel_mask(LOG_TRACE)) { |
4332 | struct timeval _now; |
4333 | gettimeofday(&_now, NULL); |
4334 | qemu_log("%d@%zu.%06zu:esp_lower_irq " "Lower IRQ" "\n" , |
4335 | qemu_get_thread_id(), |
4336 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4337 | ); |
4338 | } |
4339 | } |
4340 | |
4341 | static inline void trace_esp_lower_irq(void) |
4342 | { |
4343 | if (true) { |
4344 | _nocheck__trace_esp_lower_irq(); |
4345 | } |
4346 | } |
4347 | |
4348 | #define TRACE_ESP_DMA_ENABLE_BACKEND_DSTATE() ( \ |
4349 | trace_event_get_state_dynamic_by_id(TRACE_ESP_DMA_ENABLE) || \ |
4350 | false) |
4351 | |
4352 | static inline void _nocheck__trace_esp_dma_enable(void) |
4353 | { |
4354 | if (trace_event_get_state(TRACE_ESP_DMA_ENABLE) && qemu_loglevel_mask(LOG_TRACE)) { |
4355 | struct timeval _now; |
4356 | gettimeofday(&_now, NULL); |
4357 | qemu_log("%d@%zu.%06zu:esp_dma_enable " "Raise enable" "\n" , |
4358 | qemu_get_thread_id(), |
4359 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4360 | ); |
4361 | } |
4362 | } |
4363 | |
4364 | static inline void trace_esp_dma_enable(void) |
4365 | { |
4366 | if (true) { |
4367 | _nocheck__trace_esp_dma_enable(); |
4368 | } |
4369 | } |
4370 | |
4371 | #define TRACE_ESP_DMA_DISABLE_BACKEND_DSTATE() ( \ |
4372 | trace_event_get_state_dynamic_by_id(TRACE_ESP_DMA_DISABLE) || \ |
4373 | false) |
4374 | |
4375 | static inline void _nocheck__trace_esp_dma_disable(void) |
4376 | { |
4377 | if (trace_event_get_state(TRACE_ESP_DMA_DISABLE) && qemu_loglevel_mask(LOG_TRACE)) { |
4378 | struct timeval _now; |
4379 | gettimeofday(&_now, NULL); |
4380 | qemu_log("%d@%zu.%06zu:esp_dma_disable " "Lower enable" "\n" , |
4381 | qemu_get_thread_id(), |
4382 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4383 | ); |
4384 | } |
4385 | } |
4386 | |
4387 | static inline void trace_esp_dma_disable(void) |
4388 | { |
4389 | if (true) { |
4390 | _nocheck__trace_esp_dma_disable(); |
4391 | } |
4392 | } |
4393 | |
4394 | #define TRACE_ESP_GET_CMD_BACKEND_DSTATE() ( \ |
4395 | trace_event_get_state_dynamic_by_id(TRACE_ESP_GET_CMD) || \ |
4396 | false) |
4397 | |
4398 | static inline void _nocheck__trace_esp_get_cmd(uint32_t dmalen, int target) |
4399 | { |
4400 | if (trace_event_get_state(TRACE_ESP_GET_CMD) && qemu_loglevel_mask(LOG_TRACE)) { |
4401 | struct timeval _now; |
4402 | gettimeofday(&_now, NULL); |
4403 | qemu_log("%d@%zu.%06zu:esp_get_cmd " "len %d target %d" "\n" , |
4404 | qemu_get_thread_id(), |
4405 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4406 | , dmalen, target); |
4407 | } |
4408 | } |
4409 | |
4410 | static inline void trace_esp_get_cmd(uint32_t dmalen, int target) |
4411 | { |
4412 | if (true) { |
4413 | _nocheck__trace_esp_get_cmd(dmalen, target); |
4414 | } |
4415 | } |
4416 | |
4417 | #define TRACE_ESP_DO_BUSID_CMD_BACKEND_DSTATE() ( \ |
4418 | trace_event_get_state_dynamic_by_id(TRACE_ESP_DO_BUSID_CMD) || \ |
4419 | false) |
4420 | |
4421 | static inline void _nocheck__trace_esp_do_busid_cmd(uint8_t busid) |
4422 | { |
4423 | if (trace_event_get_state(TRACE_ESP_DO_BUSID_CMD) && qemu_loglevel_mask(LOG_TRACE)) { |
4424 | struct timeval _now; |
4425 | gettimeofday(&_now, NULL); |
4426 | qemu_log("%d@%zu.%06zu:esp_do_busid_cmd " "busid 0x%x" "\n" , |
4427 | qemu_get_thread_id(), |
4428 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4429 | , busid); |
4430 | } |
4431 | } |
4432 | |
4433 | static inline void trace_esp_do_busid_cmd(uint8_t busid) |
4434 | { |
4435 | if (true) { |
4436 | _nocheck__trace_esp_do_busid_cmd(busid); |
4437 | } |
4438 | } |
4439 | |
4440 | #define TRACE_ESP_HANDLE_SATN_STOP_BACKEND_DSTATE() ( \ |
4441 | trace_event_get_state_dynamic_by_id(TRACE_ESP_HANDLE_SATN_STOP) || \ |
4442 | false) |
4443 | |
4444 | static inline void _nocheck__trace_esp_handle_satn_stop(uint32_t cmdlen) |
4445 | { |
4446 | if (trace_event_get_state(TRACE_ESP_HANDLE_SATN_STOP) && qemu_loglevel_mask(LOG_TRACE)) { |
4447 | struct timeval _now; |
4448 | gettimeofday(&_now, NULL); |
4449 | qemu_log("%d@%zu.%06zu:esp_handle_satn_stop " "cmdlen %d" "\n" , |
4450 | qemu_get_thread_id(), |
4451 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4452 | , cmdlen); |
4453 | } |
4454 | } |
4455 | |
4456 | static inline void trace_esp_handle_satn_stop(uint32_t cmdlen) |
4457 | { |
4458 | if (true) { |
4459 | _nocheck__trace_esp_handle_satn_stop(cmdlen); |
4460 | } |
4461 | } |
4462 | |
4463 | #define TRACE_ESP_WRITE_RESPONSE_BACKEND_DSTATE() ( \ |
4464 | trace_event_get_state_dynamic_by_id(TRACE_ESP_WRITE_RESPONSE) || \ |
4465 | false) |
4466 | |
4467 | static inline void _nocheck__trace_esp_write_response(uint32_t status) |
4468 | { |
4469 | if (trace_event_get_state(TRACE_ESP_WRITE_RESPONSE) && qemu_loglevel_mask(LOG_TRACE)) { |
4470 | struct timeval _now; |
4471 | gettimeofday(&_now, NULL); |
4472 | qemu_log("%d@%zu.%06zu:esp_write_response " "Transfer status (status=%d)" "\n" , |
4473 | qemu_get_thread_id(), |
4474 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4475 | , status); |
4476 | } |
4477 | } |
4478 | |
4479 | static inline void trace_esp_write_response(uint32_t status) |
4480 | { |
4481 | if (true) { |
4482 | _nocheck__trace_esp_write_response(status); |
4483 | } |
4484 | } |
4485 | |
4486 | #define TRACE_ESP_DO_DMA_BACKEND_DSTATE() ( \ |
4487 | trace_event_get_state_dynamic_by_id(TRACE_ESP_DO_DMA) || \ |
4488 | false) |
4489 | |
4490 | static inline void _nocheck__trace_esp_do_dma(uint32_t cmdlen, uint32_t len) |
4491 | { |
4492 | if (trace_event_get_state(TRACE_ESP_DO_DMA) && qemu_loglevel_mask(LOG_TRACE)) { |
4493 | struct timeval _now; |
4494 | gettimeofday(&_now, NULL); |
4495 | qemu_log("%d@%zu.%06zu:esp_do_dma " "command len %d + %d" "\n" , |
4496 | qemu_get_thread_id(), |
4497 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4498 | , cmdlen, len); |
4499 | } |
4500 | } |
4501 | |
4502 | static inline void trace_esp_do_dma(uint32_t cmdlen, uint32_t len) |
4503 | { |
4504 | if (true) { |
4505 | _nocheck__trace_esp_do_dma(cmdlen, len); |
4506 | } |
4507 | } |
4508 | |
4509 | #define TRACE_ESP_COMMAND_COMPLETE_BACKEND_DSTATE() ( \ |
4510 | trace_event_get_state_dynamic_by_id(TRACE_ESP_COMMAND_COMPLETE) || \ |
4511 | false) |
4512 | |
4513 | static inline void _nocheck__trace_esp_command_complete(void) |
4514 | { |
4515 | if (trace_event_get_state(TRACE_ESP_COMMAND_COMPLETE) && qemu_loglevel_mask(LOG_TRACE)) { |
4516 | struct timeval _now; |
4517 | gettimeofday(&_now, NULL); |
4518 | qemu_log("%d@%zu.%06zu:esp_command_complete " "SCSI Command complete" "\n" , |
4519 | qemu_get_thread_id(), |
4520 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4521 | ); |
4522 | } |
4523 | } |
4524 | |
4525 | static inline void trace_esp_command_complete(void) |
4526 | { |
4527 | if (true) { |
4528 | _nocheck__trace_esp_command_complete(); |
4529 | } |
4530 | } |
4531 | |
4532 | #define TRACE_ESP_COMMAND_COMPLETE_DEFERRED_BACKEND_DSTATE() ( \ |
4533 | trace_event_get_state_dynamic_by_id(TRACE_ESP_COMMAND_COMPLETE_DEFERRED) || \ |
4534 | false) |
4535 | |
4536 | static inline void _nocheck__trace_esp_command_complete_deferred(void) |
4537 | { |
4538 | if (trace_event_get_state(TRACE_ESP_COMMAND_COMPLETE_DEFERRED) && qemu_loglevel_mask(LOG_TRACE)) { |
4539 | struct timeval _now; |
4540 | gettimeofday(&_now, NULL); |
4541 | qemu_log("%d@%zu.%06zu:esp_command_complete_deferred " "SCSI Command complete deferred" "\n" , |
4542 | qemu_get_thread_id(), |
4543 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4544 | ); |
4545 | } |
4546 | } |
4547 | |
4548 | static inline void trace_esp_command_complete_deferred(void) |
4549 | { |
4550 | if (true) { |
4551 | _nocheck__trace_esp_command_complete_deferred(); |
4552 | } |
4553 | } |
4554 | |
4555 | #define TRACE_ESP_COMMAND_COMPLETE_UNEXPECTED_BACKEND_DSTATE() ( \ |
4556 | trace_event_get_state_dynamic_by_id(TRACE_ESP_COMMAND_COMPLETE_UNEXPECTED) || \ |
4557 | false) |
4558 | |
4559 | static inline void _nocheck__trace_esp_command_complete_unexpected(void) |
4560 | { |
4561 | if (trace_event_get_state(TRACE_ESP_COMMAND_COMPLETE_UNEXPECTED) && qemu_loglevel_mask(LOG_TRACE)) { |
4562 | struct timeval _now; |
4563 | gettimeofday(&_now, NULL); |
4564 | qemu_log("%d@%zu.%06zu:esp_command_complete_unexpected " "SCSI command completed unexpectedly" "\n" , |
4565 | qemu_get_thread_id(), |
4566 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4567 | ); |
4568 | } |
4569 | } |
4570 | |
4571 | static inline void trace_esp_command_complete_unexpected(void) |
4572 | { |
4573 | if (true) { |
4574 | _nocheck__trace_esp_command_complete_unexpected(); |
4575 | } |
4576 | } |
4577 | |
4578 | #define TRACE_ESP_COMMAND_COMPLETE_FAIL_BACKEND_DSTATE() ( \ |
4579 | trace_event_get_state_dynamic_by_id(TRACE_ESP_COMMAND_COMPLETE_FAIL) || \ |
4580 | false) |
4581 | |
4582 | static inline void _nocheck__trace_esp_command_complete_fail(void) |
4583 | { |
4584 | if (trace_event_get_state(TRACE_ESP_COMMAND_COMPLETE_FAIL) && qemu_loglevel_mask(LOG_TRACE)) { |
4585 | struct timeval _now; |
4586 | gettimeofday(&_now, NULL); |
4587 | qemu_log("%d@%zu.%06zu:esp_command_complete_fail " "Command failed" "\n" , |
4588 | qemu_get_thread_id(), |
4589 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4590 | ); |
4591 | } |
4592 | } |
4593 | |
4594 | static inline void trace_esp_command_complete_fail(void) |
4595 | { |
4596 | if (true) { |
4597 | _nocheck__trace_esp_command_complete_fail(); |
4598 | } |
4599 | } |
4600 | |
4601 | #define TRACE_ESP_TRANSFER_DATA_BACKEND_DSTATE() ( \ |
4602 | trace_event_get_state_dynamic_by_id(TRACE_ESP_TRANSFER_DATA) || \ |
4603 | false) |
4604 | |
4605 | static inline void _nocheck__trace_esp_transfer_data(uint32_t dma_left, int32_t ti_size) |
4606 | { |
4607 | if (trace_event_get_state(TRACE_ESP_TRANSFER_DATA) && qemu_loglevel_mask(LOG_TRACE)) { |
4608 | struct timeval _now; |
4609 | gettimeofday(&_now, NULL); |
4610 | qemu_log("%d@%zu.%06zu:esp_transfer_data " "transfer %d/%d" "\n" , |
4611 | qemu_get_thread_id(), |
4612 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4613 | , dma_left, ti_size); |
4614 | } |
4615 | } |
4616 | |
4617 | static inline void trace_esp_transfer_data(uint32_t dma_left, int32_t ti_size) |
4618 | { |
4619 | if (true) { |
4620 | _nocheck__trace_esp_transfer_data(dma_left, ti_size); |
4621 | } |
4622 | } |
4623 | |
4624 | #define TRACE_ESP_HANDLE_TI_BACKEND_DSTATE() ( \ |
4625 | trace_event_get_state_dynamic_by_id(TRACE_ESP_HANDLE_TI) || \ |
4626 | false) |
4627 | |
4628 | static inline void _nocheck__trace_esp_handle_ti(uint32_t minlen) |
4629 | { |
4630 | if (trace_event_get_state(TRACE_ESP_HANDLE_TI) && qemu_loglevel_mask(LOG_TRACE)) { |
4631 | struct timeval _now; |
4632 | gettimeofday(&_now, NULL); |
4633 | qemu_log("%d@%zu.%06zu:esp_handle_ti " "Transfer Information len %d" "\n" , |
4634 | qemu_get_thread_id(), |
4635 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4636 | , minlen); |
4637 | } |
4638 | } |
4639 | |
4640 | static inline void trace_esp_handle_ti(uint32_t minlen) |
4641 | { |
4642 | if (true) { |
4643 | _nocheck__trace_esp_handle_ti(minlen); |
4644 | } |
4645 | } |
4646 | |
4647 | #define TRACE_ESP_HANDLE_TI_CMD_BACKEND_DSTATE() ( \ |
4648 | trace_event_get_state_dynamic_by_id(TRACE_ESP_HANDLE_TI_CMD) || \ |
4649 | false) |
4650 | |
4651 | static inline void _nocheck__trace_esp_handle_ti_cmd(uint32_t cmdlen) |
4652 | { |
4653 | if (trace_event_get_state(TRACE_ESP_HANDLE_TI_CMD) && qemu_loglevel_mask(LOG_TRACE)) { |
4654 | struct timeval _now; |
4655 | gettimeofday(&_now, NULL); |
4656 | qemu_log("%d@%zu.%06zu:esp_handle_ti_cmd " "command len %d" "\n" , |
4657 | qemu_get_thread_id(), |
4658 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4659 | , cmdlen); |
4660 | } |
4661 | } |
4662 | |
4663 | static inline void trace_esp_handle_ti_cmd(uint32_t cmdlen) |
4664 | { |
4665 | if (true) { |
4666 | _nocheck__trace_esp_handle_ti_cmd(cmdlen); |
4667 | } |
4668 | } |
4669 | |
4670 | #define TRACE_ESP_MEM_READB_BACKEND_DSTATE() ( \ |
4671 | trace_event_get_state_dynamic_by_id(TRACE_ESP_MEM_READB) || \ |
4672 | false) |
4673 | |
4674 | static inline void _nocheck__trace_esp_mem_readb(uint32_t saddr, uint8_t reg) |
4675 | { |
4676 | if (trace_event_get_state(TRACE_ESP_MEM_READB) && qemu_loglevel_mask(LOG_TRACE)) { |
4677 | struct timeval _now; |
4678 | gettimeofday(&_now, NULL); |
4679 | qemu_log("%d@%zu.%06zu:esp_mem_readb " "reg[%d]: 0x%2.2x" "\n" , |
4680 | qemu_get_thread_id(), |
4681 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4682 | , saddr, reg); |
4683 | } |
4684 | } |
4685 | |
4686 | static inline void trace_esp_mem_readb(uint32_t saddr, uint8_t reg) |
4687 | { |
4688 | if (true) { |
4689 | _nocheck__trace_esp_mem_readb(saddr, reg); |
4690 | } |
4691 | } |
4692 | |
4693 | #define TRACE_ESP_MEM_WRITEB_BACKEND_DSTATE() ( \ |
4694 | trace_event_get_state_dynamic_by_id(TRACE_ESP_MEM_WRITEB) || \ |
4695 | false) |
4696 | |
4697 | static inline void _nocheck__trace_esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) |
4698 | { |
4699 | if (trace_event_get_state(TRACE_ESP_MEM_WRITEB) && qemu_loglevel_mask(LOG_TRACE)) { |
4700 | struct timeval _now; |
4701 | gettimeofday(&_now, NULL); |
4702 | qemu_log("%d@%zu.%06zu:esp_mem_writeb " "reg[%d]: 0x%2.2x -> 0x%2.2x" "\n" , |
4703 | qemu_get_thread_id(), |
4704 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4705 | , saddr, reg, val); |
4706 | } |
4707 | } |
4708 | |
4709 | static inline void trace_esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) |
4710 | { |
4711 | if (true) { |
4712 | _nocheck__trace_esp_mem_writeb(saddr, reg, val); |
4713 | } |
4714 | } |
4715 | |
4716 | #define TRACE_ESP_MEM_WRITEB_CMD_NOP_BACKEND_DSTATE() ( \ |
4717 | trace_event_get_state_dynamic_by_id(TRACE_ESP_MEM_WRITEB_CMD_NOP) || \ |
4718 | false) |
4719 | |
4720 | static inline void _nocheck__trace_esp_mem_writeb_cmd_nop(uint32_t val) |
4721 | { |
4722 | if (trace_event_get_state(TRACE_ESP_MEM_WRITEB_CMD_NOP) && qemu_loglevel_mask(LOG_TRACE)) { |
4723 | struct timeval _now; |
4724 | gettimeofday(&_now, NULL); |
4725 | qemu_log("%d@%zu.%06zu:esp_mem_writeb_cmd_nop " "NOP (0x%2.2x)" "\n" , |
4726 | qemu_get_thread_id(), |
4727 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4728 | , val); |
4729 | } |
4730 | } |
4731 | |
4732 | static inline void trace_esp_mem_writeb_cmd_nop(uint32_t val) |
4733 | { |
4734 | if (true) { |
4735 | _nocheck__trace_esp_mem_writeb_cmd_nop(val); |
4736 | } |
4737 | } |
4738 | |
4739 | #define TRACE_ESP_MEM_WRITEB_CMD_FLUSH_BACKEND_DSTATE() ( \ |
4740 | trace_event_get_state_dynamic_by_id(TRACE_ESP_MEM_WRITEB_CMD_FLUSH) || \ |
4741 | false) |
4742 | |
4743 | static inline void _nocheck__trace_esp_mem_writeb_cmd_flush(uint32_t val) |
4744 | { |
4745 | if (trace_event_get_state(TRACE_ESP_MEM_WRITEB_CMD_FLUSH) && qemu_loglevel_mask(LOG_TRACE)) { |
4746 | struct timeval _now; |
4747 | gettimeofday(&_now, NULL); |
4748 | qemu_log("%d@%zu.%06zu:esp_mem_writeb_cmd_flush " "Flush FIFO (0x%2.2x)" "\n" , |
4749 | qemu_get_thread_id(), |
4750 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4751 | , val); |
4752 | } |
4753 | } |
4754 | |
4755 | static inline void trace_esp_mem_writeb_cmd_flush(uint32_t val) |
4756 | { |
4757 | if (true) { |
4758 | _nocheck__trace_esp_mem_writeb_cmd_flush(val); |
4759 | } |
4760 | } |
4761 | |
4762 | #define TRACE_ESP_MEM_WRITEB_CMD_RESET_BACKEND_DSTATE() ( \ |
4763 | trace_event_get_state_dynamic_by_id(TRACE_ESP_MEM_WRITEB_CMD_RESET) || \ |
4764 | false) |
4765 | |
4766 | static inline void _nocheck__trace_esp_mem_writeb_cmd_reset(uint32_t val) |
4767 | { |
4768 | if (trace_event_get_state(TRACE_ESP_MEM_WRITEB_CMD_RESET) && qemu_loglevel_mask(LOG_TRACE)) { |
4769 | struct timeval _now; |
4770 | gettimeofday(&_now, NULL); |
4771 | qemu_log("%d@%zu.%06zu:esp_mem_writeb_cmd_reset " "Chip reset (0x%2.2x)" "\n" , |
4772 | qemu_get_thread_id(), |
4773 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4774 | , val); |
4775 | } |
4776 | } |
4777 | |
4778 | static inline void trace_esp_mem_writeb_cmd_reset(uint32_t val) |
4779 | { |
4780 | if (true) { |
4781 | _nocheck__trace_esp_mem_writeb_cmd_reset(val); |
4782 | } |
4783 | } |
4784 | |
4785 | #define TRACE_ESP_MEM_WRITEB_CMD_BUS_RESET_BACKEND_DSTATE() ( \ |
4786 | trace_event_get_state_dynamic_by_id(TRACE_ESP_MEM_WRITEB_CMD_BUS_RESET) || \ |
4787 | false) |
4788 | |
4789 | static inline void _nocheck__trace_esp_mem_writeb_cmd_bus_reset(uint32_t val) |
4790 | { |
4791 | if (trace_event_get_state(TRACE_ESP_MEM_WRITEB_CMD_BUS_RESET) && qemu_loglevel_mask(LOG_TRACE)) { |
4792 | struct timeval _now; |
4793 | gettimeofday(&_now, NULL); |
4794 | qemu_log("%d@%zu.%06zu:esp_mem_writeb_cmd_bus_reset " "Bus reset (0x%2.2x)" "\n" , |
4795 | qemu_get_thread_id(), |
4796 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4797 | , val); |
4798 | } |
4799 | } |
4800 | |
4801 | static inline void trace_esp_mem_writeb_cmd_bus_reset(uint32_t val) |
4802 | { |
4803 | if (true) { |
4804 | _nocheck__trace_esp_mem_writeb_cmd_bus_reset(val); |
4805 | } |
4806 | } |
4807 | |
4808 | #define TRACE_ESP_MEM_WRITEB_CMD_ICCS_BACKEND_DSTATE() ( \ |
4809 | trace_event_get_state_dynamic_by_id(TRACE_ESP_MEM_WRITEB_CMD_ICCS) || \ |
4810 | false) |
4811 | |
4812 | static inline void _nocheck__trace_esp_mem_writeb_cmd_iccs(uint32_t val) |
4813 | { |
4814 | if (trace_event_get_state(TRACE_ESP_MEM_WRITEB_CMD_ICCS) && qemu_loglevel_mask(LOG_TRACE)) { |
4815 | struct timeval _now; |
4816 | gettimeofday(&_now, NULL); |
4817 | qemu_log("%d@%zu.%06zu:esp_mem_writeb_cmd_iccs " "Initiator Command Complete Sequence (0x%2.2x)" "\n" , |
4818 | qemu_get_thread_id(), |
4819 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4820 | , val); |
4821 | } |
4822 | } |
4823 | |
4824 | static inline void trace_esp_mem_writeb_cmd_iccs(uint32_t val) |
4825 | { |
4826 | if (true) { |
4827 | _nocheck__trace_esp_mem_writeb_cmd_iccs(val); |
4828 | } |
4829 | } |
4830 | |
4831 | #define TRACE_ESP_MEM_WRITEB_CMD_MSGACC_BACKEND_DSTATE() ( \ |
4832 | trace_event_get_state_dynamic_by_id(TRACE_ESP_MEM_WRITEB_CMD_MSGACC) || \ |
4833 | false) |
4834 | |
4835 | static inline void _nocheck__trace_esp_mem_writeb_cmd_msgacc(uint32_t val) |
4836 | { |
4837 | if (trace_event_get_state(TRACE_ESP_MEM_WRITEB_CMD_MSGACC) && qemu_loglevel_mask(LOG_TRACE)) { |
4838 | struct timeval _now; |
4839 | gettimeofday(&_now, NULL); |
4840 | qemu_log("%d@%zu.%06zu:esp_mem_writeb_cmd_msgacc " "Message Accepted (0x%2.2x)" "\n" , |
4841 | qemu_get_thread_id(), |
4842 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4843 | , val); |
4844 | } |
4845 | } |
4846 | |
4847 | static inline void trace_esp_mem_writeb_cmd_msgacc(uint32_t val) |
4848 | { |
4849 | if (true) { |
4850 | _nocheck__trace_esp_mem_writeb_cmd_msgacc(val); |
4851 | } |
4852 | } |
4853 | |
4854 | #define TRACE_ESP_MEM_WRITEB_CMD_PAD_BACKEND_DSTATE() ( \ |
4855 | trace_event_get_state_dynamic_by_id(TRACE_ESP_MEM_WRITEB_CMD_PAD) || \ |
4856 | false) |
4857 | |
4858 | static inline void _nocheck__trace_esp_mem_writeb_cmd_pad(uint32_t val) |
4859 | { |
4860 | if (trace_event_get_state(TRACE_ESP_MEM_WRITEB_CMD_PAD) && qemu_loglevel_mask(LOG_TRACE)) { |
4861 | struct timeval _now; |
4862 | gettimeofday(&_now, NULL); |
4863 | qemu_log("%d@%zu.%06zu:esp_mem_writeb_cmd_pad " "Transfer padding (0x%2.2x)" "\n" , |
4864 | qemu_get_thread_id(), |
4865 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4866 | , val); |
4867 | } |
4868 | } |
4869 | |
4870 | static inline void trace_esp_mem_writeb_cmd_pad(uint32_t val) |
4871 | { |
4872 | if (true) { |
4873 | _nocheck__trace_esp_mem_writeb_cmd_pad(val); |
4874 | } |
4875 | } |
4876 | |
4877 | #define TRACE_ESP_MEM_WRITEB_CMD_SATN_BACKEND_DSTATE() ( \ |
4878 | trace_event_get_state_dynamic_by_id(TRACE_ESP_MEM_WRITEB_CMD_SATN) || \ |
4879 | false) |
4880 | |
4881 | static inline void _nocheck__trace_esp_mem_writeb_cmd_satn(uint32_t val) |
4882 | { |
4883 | if (trace_event_get_state(TRACE_ESP_MEM_WRITEB_CMD_SATN) && qemu_loglevel_mask(LOG_TRACE)) { |
4884 | struct timeval _now; |
4885 | gettimeofday(&_now, NULL); |
4886 | qemu_log("%d@%zu.%06zu:esp_mem_writeb_cmd_satn " "Set ATN (0x%2.2x)" "\n" , |
4887 | qemu_get_thread_id(), |
4888 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4889 | , val); |
4890 | } |
4891 | } |
4892 | |
4893 | static inline void trace_esp_mem_writeb_cmd_satn(uint32_t val) |
4894 | { |
4895 | if (true) { |
4896 | _nocheck__trace_esp_mem_writeb_cmd_satn(val); |
4897 | } |
4898 | } |
4899 | |
4900 | #define TRACE_ESP_MEM_WRITEB_CMD_RSTATN_BACKEND_DSTATE() ( \ |
4901 | trace_event_get_state_dynamic_by_id(TRACE_ESP_MEM_WRITEB_CMD_RSTATN) || \ |
4902 | false) |
4903 | |
4904 | static inline void _nocheck__trace_esp_mem_writeb_cmd_rstatn(uint32_t val) |
4905 | { |
4906 | if (trace_event_get_state(TRACE_ESP_MEM_WRITEB_CMD_RSTATN) && qemu_loglevel_mask(LOG_TRACE)) { |
4907 | struct timeval _now; |
4908 | gettimeofday(&_now, NULL); |
4909 | qemu_log("%d@%zu.%06zu:esp_mem_writeb_cmd_rstatn " "Reset ATN (0x%2.2x)" "\n" , |
4910 | qemu_get_thread_id(), |
4911 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4912 | , val); |
4913 | } |
4914 | } |
4915 | |
4916 | static inline void trace_esp_mem_writeb_cmd_rstatn(uint32_t val) |
4917 | { |
4918 | if (true) { |
4919 | _nocheck__trace_esp_mem_writeb_cmd_rstatn(val); |
4920 | } |
4921 | } |
4922 | |
4923 | #define TRACE_ESP_MEM_WRITEB_CMD_SEL_BACKEND_DSTATE() ( \ |
4924 | trace_event_get_state_dynamic_by_id(TRACE_ESP_MEM_WRITEB_CMD_SEL) || \ |
4925 | false) |
4926 | |
4927 | static inline void _nocheck__trace_esp_mem_writeb_cmd_sel(uint32_t val) |
4928 | { |
4929 | if (trace_event_get_state(TRACE_ESP_MEM_WRITEB_CMD_SEL) && qemu_loglevel_mask(LOG_TRACE)) { |
4930 | struct timeval _now; |
4931 | gettimeofday(&_now, NULL); |
4932 | qemu_log("%d@%zu.%06zu:esp_mem_writeb_cmd_sel " "Select without ATN (0x%2.2x)" "\n" , |
4933 | qemu_get_thread_id(), |
4934 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4935 | , val); |
4936 | } |
4937 | } |
4938 | |
4939 | static inline void trace_esp_mem_writeb_cmd_sel(uint32_t val) |
4940 | { |
4941 | if (true) { |
4942 | _nocheck__trace_esp_mem_writeb_cmd_sel(val); |
4943 | } |
4944 | } |
4945 | |
4946 | #define TRACE_ESP_MEM_WRITEB_CMD_SELATN_BACKEND_DSTATE() ( \ |
4947 | trace_event_get_state_dynamic_by_id(TRACE_ESP_MEM_WRITEB_CMD_SELATN) || \ |
4948 | false) |
4949 | |
4950 | static inline void _nocheck__trace_esp_mem_writeb_cmd_selatn(uint32_t val) |
4951 | { |
4952 | if (trace_event_get_state(TRACE_ESP_MEM_WRITEB_CMD_SELATN) && qemu_loglevel_mask(LOG_TRACE)) { |
4953 | struct timeval _now; |
4954 | gettimeofday(&_now, NULL); |
4955 | qemu_log("%d@%zu.%06zu:esp_mem_writeb_cmd_selatn " "Select with ATN (0x%2.2x)" "\n" , |
4956 | qemu_get_thread_id(), |
4957 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4958 | , val); |
4959 | } |
4960 | } |
4961 | |
4962 | static inline void trace_esp_mem_writeb_cmd_selatn(uint32_t val) |
4963 | { |
4964 | if (true) { |
4965 | _nocheck__trace_esp_mem_writeb_cmd_selatn(val); |
4966 | } |
4967 | } |
4968 | |
4969 | #define TRACE_ESP_MEM_WRITEB_CMD_SELATNS_BACKEND_DSTATE() ( \ |
4970 | trace_event_get_state_dynamic_by_id(TRACE_ESP_MEM_WRITEB_CMD_SELATNS) || \ |
4971 | false) |
4972 | |
4973 | static inline void _nocheck__trace_esp_mem_writeb_cmd_selatns(uint32_t val) |
4974 | { |
4975 | if (trace_event_get_state(TRACE_ESP_MEM_WRITEB_CMD_SELATNS) && qemu_loglevel_mask(LOG_TRACE)) { |
4976 | struct timeval _now; |
4977 | gettimeofday(&_now, NULL); |
4978 | qemu_log("%d@%zu.%06zu:esp_mem_writeb_cmd_selatns " "Select with ATN & stop (0x%2.2x)" "\n" , |
4979 | qemu_get_thread_id(), |
4980 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
4981 | , val); |
4982 | } |
4983 | } |
4984 | |
4985 | static inline void trace_esp_mem_writeb_cmd_selatns(uint32_t val) |
4986 | { |
4987 | if (true) { |
4988 | _nocheck__trace_esp_mem_writeb_cmd_selatns(val); |
4989 | } |
4990 | } |
4991 | |
4992 | #define TRACE_ESP_MEM_WRITEB_CMD_ENSEL_BACKEND_DSTATE() ( \ |
4993 | trace_event_get_state_dynamic_by_id(TRACE_ESP_MEM_WRITEB_CMD_ENSEL) || \ |
4994 | false) |
4995 | |
4996 | static inline void _nocheck__trace_esp_mem_writeb_cmd_ensel(uint32_t val) |
4997 | { |
4998 | if (trace_event_get_state(TRACE_ESP_MEM_WRITEB_CMD_ENSEL) && qemu_loglevel_mask(LOG_TRACE)) { |
4999 | struct timeval _now; |
5000 | gettimeofday(&_now, NULL); |
5001 | qemu_log("%d@%zu.%06zu:esp_mem_writeb_cmd_ensel " "Enable selection (0x%2.2x)" "\n" , |
5002 | qemu_get_thread_id(), |
5003 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5004 | , val); |
5005 | } |
5006 | } |
5007 | |
5008 | static inline void trace_esp_mem_writeb_cmd_ensel(uint32_t val) |
5009 | { |
5010 | if (true) { |
5011 | _nocheck__trace_esp_mem_writeb_cmd_ensel(val); |
5012 | } |
5013 | } |
5014 | |
5015 | #define TRACE_ESP_MEM_WRITEB_CMD_DISSEL_BACKEND_DSTATE() ( \ |
5016 | trace_event_get_state_dynamic_by_id(TRACE_ESP_MEM_WRITEB_CMD_DISSEL) || \ |
5017 | false) |
5018 | |
5019 | static inline void _nocheck__trace_esp_mem_writeb_cmd_dissel(uint32_t val) |
5020 | { |
5021 | if (trace_event_get_state(TRACE_ESP_MEM_WRITEB_CMD_DISSEL) && qemu_loglevel_mask(LOG_TRACE)) { |
5022 | struct timeval _now; |
5023 | gettimeofday(&_now, NULL); |
5024 | qemu_log("%d@%zu.%06zu:esp_mem_writeb_cmd_dissel " "Disable selection (0x%2.2x)" "\n" , |
5025 | qemu_get_thread_id(), |
5026 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5027 | , val); |
5028 | } |
5029 | } |
5030 | |
5031 | static inline void trace_esp_mem_writeb_cmd_dissel(uint32_t val) |
5032 | { |
5033 | if (true) { |
5034 | _nocheck__trace_esp_mem_writeb_cmd_dissel(val); |
5035 | } |
5036 | } |
5037 | |
5038 | #define TRACE_ESP_PCI_ERROR_INVALID_DMA_DIRECTION_BACKEND_DSTATE() ( \ |
5039 | trace_event_get_state_dynamic_by_id(TRACE_ESP_PCI_ERROR_INVALID_DMA_DIRECTION) || \ |
5040 | false) |
5041 | |
5042 | static inline void _nocheck__trace_esp_pci_error_invalid_dma_direction(void) |
5043 | { |
5044 | if (trace_event_get_state(TRACE_ESP_PCI_ERROR_INVALID_DMA_DIRECTION) && qemu_loglevel_mask(LOG_TRACE)) { |
5045 | struct timeval _now; |
5046 | gettimeofday(&_now, NULL); |
5047 | qemu_log("%d@%zu.%06zu:esp_pci_error_invalid_dma_direction " "invalid DMA transfer direction" "\n" , |
5048 | qemu_get_thread_id(), |
5049 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5050 | ); |
5051 | } |
5052 | } |
5053 | |
5054 | static inline void trace_esp_pci_error_invalid_dma_direction(void) |
5055 | { |
5056 | if (true) { |
5057 | _nocheck__trace_esp_pci_error_invalid_dma_direction(); |
5058 | } |
5059 | } |
5060 | |
5061 | #define TRACE_ESP_PCI_ERROR_INVALID_READ_BACKEND_DSTATE() ( \ |
5062 | trace_event_get_state_dynamic_by_id(TRACE_ESP_PCI_ERROR_INVALID_READ) || \ |
5063 | false) |
5064 | |
5065 | static inline void _nocheck__trace_esp_pci_error_invalid_read(uint32_t reg) |
5066 | { |
5067 | if (trace_event_get_state(TRACE_ESP_PCI_ERROR_INVALID_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
5068 | struct timeval _now; |
5069 | gettimeofday(&_now, NULL); |
5070 | qemu_log("%d@%zu.%06zu:esp_pci_error_invalid_read " "read access outside bounds (reg 0x%x)" "\n" , |
5071 | qemu_get_thread_id(), |
5072 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5073 | , reg); |
5074 | } |
5075 | } |
5076 | |
5077 | static inline void trace_esp_pci_error_invalid_read(uint32_t reg) |
5078 | { |
5079 | if (true) { |
5080 | _nocheck__trace_esp_pci_error_invalid_read(reg); |
5081 | } |
5082 | } |
5083 | |
5084 | #define TRACE_ESP_PCI_ERROR_INVALID_WRITE_BACKEND_DSTATE() ( \ |
5085 | trace_event_get_state_dynamic_by_id(TRACE_ESP_PCI_ERROR_INVALID_WRITE) || \ |
5086 | false) |
5087 | |
5088 | static inline void _nocheck__trace_esp_pci_error_invalid_write(uint32_t reg) |
5089 | { |
5090 | if (trace_event_get_state(TRACE_ESP_PCI_ERROR_INVALID_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
5091 | struct timeval _now; |
5092 | gettimeofday(&_now, NULL); |
5093 | qemu_log("%d@%zu.%06zu:esp_pci_error_invalid_write " "write access outside bounds (reg 0x%x)" "\n" , |
5094 | qemu_get_thread_id(), |
5095 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5096 | , reg); |
5097 | } |
5098 | } |
5099 | |
5100 | static inline void trace_esp_pci_error_invalid_write(uint32_t reg) |
5101 | { |
5102 | if (true) { |
5103 | _nocheck__trace_esp_pci_error_invalid_write(reg); |
5104 | } |
5105 | } |
5106 | |
5107 | #define TRACE_ESP_PCI_ERROR_INVALID_WRITE_DMA_BACKEND_DSTATE() ( \ |
5108 | trace_event_get_state_dynamic_by_id(TRACE_ESP_PCI_ERROR_INVALID_WRITE_DMA) || \ |
5109 | false) |
5110 | |
5111 | static inline void _nocheck__trace_esp_pci_error_invalid_write_dma(uint32_t val, uint32_t addr) |
5112 | { |
5113 | if (trace_event_get_state(TRACE_ESP_PCI_ERROR_INVALID_WRITE_DMA) && qemu_loglevel_mask(LOG_TRACE)) { |
5114 | struct timeval _now; |
5115 | gettimeofday(&_now, NULL); |
5116 | qemu_log("%d@%zu.%06zu:esp_pci_error_invalid_write_dma " "invalid write of 0x%02x at [0x%x]" "\n" , |
5117 | qemu_get_thread_id(), |
5118 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5119 | , val, addr); |
5120 | } |
5121 | } |
5122 | |
5123 | static inline void trace_esp_pci_error_invalid_write_dma(uint32_t val, uint32_t addr) |
5124 | { |
5125 | if (true) { |
5126 | _nocheck__trace_esp_pci_error_invalid_write_dma(val, addr); |
5127 | } |
5128 | } |
5129 | |
5130 | #define TRACE_ESP_PCI_DMA_READ_BACKEND_DSTATE() ( \ |
5131 | trace_event_get_state_dynamic_by_id(TRACE_ESP_PCI_DMA_READ) || \ |
5132 | false) |
5133 | |
5134 | static inline void _nocheck__trace_esp_pci_dma_read(uint32_t saddr, uint32_t reg) |
5135 | { |
5136 | if (trace_event_get_state(TRACE_ESP_PCI_DMA_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
5137 | struct timeval _now; |
5138 | gettimeofday(&_now, NULL); |
5139 | qemu_log("%d@%zu.%06zu:esp_pci_dma_read " "reg[%d]: 0x%8.8x" "\n" , |
5140 | qemu_get_thread_id(), |
5141 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5142 | , saddr, reg); |
5143 | } |
5144 | } |
5145 | |
5146 | static inline void trace_esp_pci_dma_read(uint32_t saddr, uint32_t reg) |
5147 | { |
5148 | if (true) { |
5149 | _nocheck__trace_esp_pci_dma_read(saddr, reg); |
5150 | } |
5151 | } |
5152 | |
5153 | #define TRACE_ESP_PCI_DMA_WRITE_BACKEND_DSTATE() ( \ |
5154 | trace_event_get_state_dynamic_by_id(TRACE_ESP_PCI_DMA_WRITE) || \ |
5155 | false) |
5156 | |
5157 | static inline void _nocheck__trace_esp_pci_dma_write(uint32_t saddr, uint32_t reg, uint32_t val) |
5158 | { |
5159 | if (trace_event_get_state(TRACE_ESP_PCI_DMA_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
5160 | struct timeval _now; |
5161 | gettimeofday(&_now, NULL); |
5162 | qemu_log("%d@%zu.%06zu:esp_pci_dma_write " "reg[%d]: 0x%8.8x -> 0x%8.8x" "\n" , |
5163 | qemu_get_thread_id(), |
5164 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5165 | , saddr, reg, val); |
5166 | } |
5167 | } |
5168 | |
5169 | static inline void trace_esp_pci_dma_write(uint32_t saddr, uint32_t reg, uint32_t val) |
5170 | { |
5171 | if (true) { |
5172 | _nocheck__trace_esp_pci_dma_write(saddr, reg, val); |
5173 | } |
5174 | } |
5175 | |
5176 | #define TRACE_ESP_PCI_DMA_IDLE_BACKEND_DSTATE() ( \ |
5177 | trace_event_get_state_dynamic_by_id(TRACE_ESP_PCI_DMA_IDLE) || \ |
5178 | false) |
5179 | |
5180 | static inline void _nocheck__trace_esp_pci_dma_idle(uint32_t val) |
5181 | { |
5182 | if (trace_event_get_state(TRACE_ESP_PCI_DMA_IDLE) && qemu_loglevel_mask(LOG_TRACE)) { |
5183 | struct timeval _now; |
5184 | gettimeofday(&_now, NULL); |
5185 | qemu_log("%d@%zu.%06zu:esp_pci_dma_idle " "IDLE (0x%.8x)" "\n" , |
5186 | qemu_get_thread_id(), |
5187 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5188 | , val); |
5189 | } |
5190 | } |
5191 | |
5192 | static inline void trace_esp_pci_dma_idle(uint32_t val) |
5193 | { |
5194 | if (true) { |
5195 | _nocheck__trace_esp_pci_dma_idle(val); |
5196 | } |
5197 | } |
5198 | |
5199 | #define TRACE_ESP_PCI_DMA_BLAST_BACKEND_DSTATE() ( \ |
5200 | trace_event_get_state_dynamic_by_id(TRACE_ESP_PCI_DMA_BLAST) || \ |
5201 | false) |
5202 | |
5203 | static inline void _nocheck__trace_esp_pci_dma_blast(uint32_t val) |
5204 | { |
5205 | if (trace_event_get_state(TRACE_ESP_PCI_DMA_BLAST) && qemu_loglevel_mask(LOG_TRACE)) { |
5206 | struct timeval _now; |
5207 | gettimeofday(&_now, NULL); |
5208 | qemu_log("%d@%zu.%06zu:esp_pci_dma_blast " "BLAST (0x%.8x)" "\n" , |
5209 | qemu_get_thread_id(), |
5210 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5211 | , val); |
5212 | } |
5213 | } |
5214 | |
5215 | static inline void trace_esp_pci_dma_blast(uint32_t val) |
5216 | { |
5217 | if (true) { |
5218 | _nocheck__trace_esp_pci_dma_blast(val); |
5219 | } |
5220 | } |
5221 | |
5222 | #define TRACE_ESP_PCI_DMA_ABORT_BACKEND_DSTATE() ( \ |
5223 | trace_event_get_state_dynamic_by_id(TRACE_ESP_PCI_DMA_ABORT) || \ |
5224 | false) |
5225 | |
5226 | static inline void _nocheck__trace_esp_pci_dma_abort(uint32_t val) |
5227 | { |
5228 | if (trace_event_get_state(TRACE_ESP_PCI_DMA_ABORT) && qemu_loglevel_mask(LOG_TRACE)) { |
5229 | struct timeval _now; |
5230 | gettimeofday(&_now, NULL); |
5231 | qemu_log("%d@%zu.%06zu:esp_pci_dma_abort " "ABORT (0x%.8x)" "\n" , |
5232 | qemu_get_thread_id(), |
5233 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5234 | , val); |
5235 | } |
5236 | } |
5237 | |
5238 | static inline void trace_esp_pci_dma_abort(uint32_t val) |
5239 | { |
5240 | if (true) { |
5241 | _nocheck__trace_esp_pci_dma_abort(val); |
5242 | } |
5243 | } |
5244 | |
5245 | #define TRACE_ESP_PCI_DMA_START_BACKEND_DSTATE() ( \ |
5246 | trace_event_get_state_dynamic_by_id(TRACE_ESP_PCI_DMA_START) || \ |
5247 | false) |
5248 | |
5249 | static inline void _nocheck__trace_esp_pci_dma_start(uint32_t val) |
5250 | { |
5251 | if (trace_event_get_state(TRACE_ESP_PCI_DMA_START) && qemu_loglevel_mask(LOG_TRACE)) { |
5252 | struct timeval _now; |
5253 | gettimeofday(&_now, NULL); |
5254 | qemu_log("%d@%zu.%06zu:esp_pci_dma_start " "START (0x%.8x)" "\n" , |
5255 | qemu_get_thread_id(), |
5256 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5257 | , val); |
5258 | } |
5259 | } |
5260 | |
5261 | static inline void trace_esp_pci_dma_start(uint32_t val) |
5262 | { |
5263 | if (true) { |
5264 | _nocheck__trace_esp_pci_dma_start(val); |
5265 | } |
5266 | } |
5267 | |
5268 | #define TRACE_ESP_PCI_SBAC_READ_BACKEND_DSTATE() ( \ |
5269 | trace_event_get_state_dynamic_by_id(TRACE_ESP_PCI_SBAC_READ) || \ |
5270 | false) |
5271 | |
5272 | static inline void _nocheck__trace_esp_pci_sbac_read(uint32_t reg) |
5273 | { |
5274 | if (trace_event_get_state(TRACE_ESP_PCI_SBAC_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
5275 | struct timeval _now; |
5276 | gettimeofday(&_now, NULL); |
5277 | qemu_log("%d@%zu.%06zu:esp_pci_sbac_read " "sbac: 0x%8.8x" "\n" , |
5278 | qemu_get_thread_id(), |
5279 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5280 | , reg); |
5281 | } |
5282 | } |
5283 | |
5284 | static inline void trace_esp_pci_sbac_read(uint32_t reg) |
5285 | { |
5286 | if (true) { |
5287 | _nocheck__trace_esp_pci_sbac_read(reg); |
5288 | } |
5289 | } |
5290 | |
5291 | #define TRACE_ESP_PCI_SBAC_WRITE_BACKEND_DSTATE() ( \ |
5292 | trace_event_get_state_dynamic_by_id(TRACE_ESP_PCI_SBAC_WRITE) || \ |
5293 | false) |
5294 | |
5295 | static inline void _nocheck__trace_esp_pci_sbac_write(uint32_t reg, uint32_t val) |
5296 | { |
5297 | if (trace_event_get_state(TRACE_ESP_PCI_SBAC_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
5298 | struct timeval _now; |
5299 | gettimeofday(&_now, NULL); |
5300 | qemu_log("%d@%zu.%06zu:esp_pci_sbac_write " "sbac: 0x%8.8x -> 0x%8.8x" "\n" , |
5301 | qemu_get_thread_id(), |
5302 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5303 | , reg, val); |
5304 | } |
5305 | } |
5306 | |
5307 | static inline void trace_esp_pci_sbac_write(uint32_t reg, uint32_t val) |
5308 | { |
5309 | if (true) { |
5310 | _nocheck__trace_esp_pci_sbac_write(reg, val); |
5311 | } |
5312 | } |
5313 | |
5314 | #define TRACE_SPAPR_VSCSI_SEND_RSP_BACKEND_DSTATE() ( \ |
5315 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_SEND_RSP) || \ |
5316 | false) |
5317 | |
5318 | static inline void _nocheck__trace_spapr_vscsi_send_rsp(uint8_t status, int32_t res_in, int32_t res_out) |
5319 | { |
5320 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_SEND_RSP) && qemu_loglevel_mask(LOG_TRACE)) { |
5321 | struct timeval _now; |
5322 | gettimeofday(&_now, NULL); |
5323 | qemu_log("%d@%zu.%06zu:spapr_vscsi_send_rsp " "status: 0x%x, res_in: %" PRId32", res_out: %" PRId32 "\n" , |
5324 | qemu_get_thread_id(), |
5325 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5326 | , status, res_in, res_out); |
5327 | } |
5328 | } |
5329 | |
5330 | static inline void trace_spapr_vscsi_send_rsp(uint8_t status, int32_t res_in, int32_t res_out) |
5331 | { |
5332 | if (true) { |
5333 | _nocheck__trace_spapr_vscsi_send_rsp(status, res_in, res_out); |
5334 | } |
5335 | } |
5336 | |
5337 | #define TRACE_SPAPR_VSCSI_FETCH_DESC_NO_DATA_BACKEND_DSTATE() ( \ |
5338 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_FETCH_DESC_NO_DATA) || \ |
5339 | false) |
5340 | |
5341 | static inline void _nocheck__trace_spapr_vscsi_fetch_desc_no_data(void) |
5342 | { |
5343 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_FETCH_DESC_NO_DATA) && qemu_loglevel_mask(LOG_TRACE)) { |
5344 | struct timeval _now; |
5345 | gettimeofday(&_now, NULL); |
5346 | qemu_log("%d@%zu.%06zu:spapr_vscsi_fetch_desc_no_data " "no data descriptor" "\n" , |
5347 | qemu_get_thread_id(), |
5348 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5349 | ); |
5350 | } |
5351 | } |
5352 | |
5353 | static inline void trace_spapr_vscsi_fetch_desc_no_data(void) |
5354 | { |
5355 | if (true) { |
5356 | _nocheck__trace_spapr_vscsi_fetch_desc_no_data(); |
5357 | } |
5358 | } |
5359 | |
5360 | #define TRACE_SPAPR_VSCSI_FETCH_DESC_DIRECT_BACKEND_DSTATE() ( \ |
5361 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_FETCH_DESC_DIRECT) || \ |
5362 | false) |
5363 | |
5364 | static inline void _nocheck__trace_spapr_vscsi_fetch_desc_direct(void) |
5365 | { |
5366 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_FETCH_DESC_DIRECT) && qemu_loglevel_mask(LOG_TRACE)) { |
5367 | struct timeval _now; |
5368 | gettimeofday(&_now, NULL); |
5369 | qemu_log("%d@%zu.%06zu:spapr_vscsi_fetch_desc_direct " "direct segment" "\n" , |
5370 | qemu_get_thread_id(), |
5371 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5372 | ); |
5373 | } |
5374 | } |
5375 | |
5376 | static inline void trace_spapr_vscsi_fetch_desc_direct(void) |
5377 | { |
5378 | if (true) { |
5379 | _nocheck__trace_spapr_vscsi_fetch_desc_direct(); |
5380 | } |
5381 | } |
5382 | |
5383 | #define TRACE_SPAPR_VSCSI_FETCH_DESC_INDIRECT_BACKEND_DSTATE() ( \ |
5384 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_FETCH_DESC_INDIRECT) || \ |
5385 | false) |
5386 | |
5387 | static inline void _nocheck__trace_spapr_vscsi_fetch_desc_indirect(uint32_t qtag, unsigned desc, unsigned local_desc) |
5388 | { |
5389 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_FETCH_DESC_INDIRECT) && qemu_loglevel_mask(LOG_TRACE)) { |
5390 | struct timeval _now; |
5391 | gettimeofday(&_now, NULL); |
5392 | qemu_log("%d@%zu.%06zu:spapr_vscsi_fetch_desc_indirect " "indirect segment local tag=0x%" PRIx32" desc#%u/%u" "\n" , |
5393 | qemu_get_thread_id(), |
5394 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5395 | , qtag, desc, local_desc); |
5396 | } |
5397 | } |
5398 | |
5399 | static inline void trace_spapr_vscsi_fetch_desc_indirect(uint32_t qtag, unsigned desc, unsigned local_desc) |
5400 | { |
5401 | if (true) { |
5402 | _nocheck__trace_spapr_vscsi_fetch_desc_indirect(qtag, desc, local_desc); |
5403 | } |
5404 | } |
5405 | |
5406 | #define TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_RANGE_BACKEND_DSTATE() ( \ |
5407 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_RANGE) || \ |
5408 | false) |
5409 | |
5410 | static inline void _nocheck__trace_spapr_vscsi_fetch_desc_out_of_range(unsigned desc, unsigned desc_offset) |
5411 | { |
5412 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_RANGE) && qemu_loglevel_mask(LOG_TRACE)) { |
5413 | struct timeval _now; |
5414 | gettimeofday(&_now, NULL); |
5415 | qemu_log("%d@%zu.%06zu:spapr_vscsi_fetch_desc_out_of_range " "#%u is ouf of range (%u bytes)" "\n" , |
5416 | qemu_get_thread_id(), |
5417 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5418 | , desc, desc_offset); |
5419 | } |
5420 | } |
5421 | |
5422 | static inline void trace_spapr_vscsi_fetch_desc_out_of_range(unsigned desc, unsigned desc_offset) |
5423 | { |
5424 | if (true) { |
5425 | _nocheck__trace_spapr_vscsi_fetch_desc_out_of_range(desc, desc_offset); |
5426 | } |
5427 | } |
5428 | |
5429 | #define TRACE_SPAPR_VSCSI_FETCH_DESC_DMA_READ_ERROR_BACKEND_DSTATE() ( \ |
5430 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_FETCH_DESC_DMA_READ_ERROR) || \ |
5431 | false) |
5432 | |
5433 | static inline void _nocheck__trace_spapr_vscsi_fetch_desc_dma_read_error(int rc) |
5434 | { |
5435 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_FETCH_DESC_DMA_READ_ERROR) && qemu_loglevel_mask(LOG_TRACE)) { |
5436 | struct timeval _now; |
5437 | gettimeofday(&_now, NULL); |
5438 | qemu_log("%d@%zu.%06zu:spapr_vscsi_fetch_desc_dma_read_error " "spapr_vio_dma_read -> %d reading ext_desc" "\n" , |
5439 | qemu_get_thread_id(), |
5440 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5441 | , rc); |
5442 | } |
5443 | } |
5444 | |
5445 | static inline void trace_spapr_vscsi_fetch_desc_dma_read_error(int rc) |
5446 | { |
5447 | if (true) { |
5448 | _nocheck__trace_spapr_vscsi_fetch_desc_dma_read_error(rc); |
5449 | } |
5450 | } |
5451 | |
5452 | #define TRACE_SPAPR_VSCSI_FETCH_DESC_INDIRECT_SEG_EXT_BACKEND_DSTATE() ( \ |
5453 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_FETCH_DESC_INDIRECT_SEG_EXT) || \ |
5454 | false) |
5455 | |
5456 | static inline void _nocheck__trace_spapr_vscsi_fetch_desc_indirect_seg_ext(uint32_t qtag, unsigned n, unsigned desc, uint64_t va, uint32_t len) |
5457 | { |
5458 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_FETCH_DESC_INDIRECT_SEG_EXT) && qemu_loglevel_mask(LOG_TRACE)) { |
5459 | struct timeval _now; |
5460 | gettimeofday(&_now, NULL); |
5461 | qemu_log("%d@%zu.%06zu:spapr_vscsi_fetch_desc_indirect_seg_ext " "indirect segment ext. tag=0x%" PRIx32" desc#%u/%u { va=0x%" PRIx64" len=0x%" PRIx32" }" "\n" , |
5462 | qemu_get_thread_id(), |
5463 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5464 | , qtag, n, desc, va, len); |
5465 | } |
5466 | } |
5467 | |
5468 | static inline void trace_spapr_vscsi_fetch_desc_indirect_seg_ext(uint32_t qtag, unsigned n, unsigned desc, uint64_t va, uint32_t len) |
5469 | { |
5470 | if (true) { |
5471 | _nocheck__trace_spapr_vscsi_fetch_desc_indirect_seg_ext(qtag, n, desc, va, len); |
5472 | } |
5473 | } |
5474 | |
5475 | #define TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_DESC_BACKEND_DSTATE() ( \ |
5476 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_DESC) || \ |
5477 | false) |
5478 | |
5479 | static inline void _nocheck__trace_spapr_vscsi_fetch_desc_out_of_desc(void) |
5480 | { |
5481 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_DESC) && qemu_loglevel_mask(LOG_TRACE)) { |
5482 | struct timeval _now; |
5483 | gettimeofday(&_now, NULL); |
5484 | qemu_log("%d@%zu.%06zu:spapr_vscsi_fetch_desc_out_of_desc " "Out of descriptors !" "\n" , |
5485 | qemu_get_thread_id(), |
5486 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5487 | ); |
5488 | } |
5489 | } |
5490 | |
5491 | static inline void trace_spapr_vscsi_fetch_desc_out_of_desc(void) |
5492 | { |
5493 | if (true) { |
5494 | _nocheck__trace_spapr_vscsi_fetch_desc_out_of_desc(); |
5495 | } |
5496 | } |
5497 | |
5498 | #define TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_DESC_BOUNDARY_BACKEND_DSTATE() ( \ |
5499 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_DESC_BOUNDARY) || \ |
5500 | false) |
5501 | |
5502 | static inline void _nocheck__trace_spapr_vscsi_fetch_desc_out_of_desc_boundary(unsigned offset, unsigned desc, uint32_t len) |
5503 | { |
5504 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_FETCH_DESC_OUT_OF_DESC_BOUNDARY) && qemu_loglevel_mask(LOG_TRACE)) { |
5505 | struct timeval _now; |
5506 | gettimeofday(&_now, NULL); |
5507 | qemu_log("%d@%zu.%06zu:spapr_vscsi_fetch_desc_out_of_desc_boundary " " offset=0x%x is out of a descriptor #%u boundary=0x%" PRIx32 "\n" , |
5508 | qemu_get_thread_id(), |
5509 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5510 | , offset, desc, len); |
5511 | } |
5512 | } |
5513 | |
5514 | static inline void trace_spapr_vscsi_fetch_desc_out_of_desc_boundary(unsigned offset, unsigned desc, uint32_t len) |
5515 | { |
5516 | if (true) { |
5517 | _nocheck__trace_spapr_vscsi_fetch_desc_out_of_desc_boundary(offset, desc, len); |
5518 | } |
5519 | } |
5520 | |
5521 | #define TRACE_SPAPR_VSCSI_FETCH_DESC_DONE_BACKEND_DSTATE() ( \ |
5522 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_FETCH_DESC_DONE) || \ |
5523 | false) |
5524 | |
5525 | static inline void _nocheck__trace_spapr_vscsi_fetch_desc_done(unsigned desc_num, unsigned desc_offset, uint64_t va, uint32_t len) |
5526 | { |
5527 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_FETCH_DESC_DONE) && qemu_loglevel_mask(LOG_TRACE)) { |
5528 | struct timeval _now; |
5529 | gettimeofday(&_now, NULL); |
5530 | qemu_log("%d@%zu.%06zu:spapr_vscsi_fetch_desc_done " " cur=%u offs=0x%x ret { va=0x%" PRIx64" len=0x%" PRIx32" }" "\n" , |
5531 | qemu_get_thread_id(), |
5532 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5533 | , desc_num, desc_offset, va, len); |
5534 | } |
5535 | } |
5536 | |
5537 | static inline void trace_spapr_vscsi_fetch_desc_done(unsigned desc_num, unsigned desc_offset, uint64_t va, uint32_t len) |
5538 | { |
5539 | if (true) { |
5540 | _nocheck__trace_spapr_vscsi_fetch_desc_done(desc_num, desc_offset, va, len); |
5541 | } |
5542 | } |
5543 | |
5544 | #define TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_BACKEND_DSTATE() ( \ |
5545 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA) || \ |
5546 | false) |
5547 | |
5548 | static inline void _nocheck__trace_spapr_vscsi_srp_indirect_data(uint32_t len) |
5549 | { |
5550 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA) && qemu_loglevel_mask(LOG_TRACE)) { |
5551 | struct timeval _now; |
5552 | gettimeofday(&_now, NULL); |
5553 | qemu_log("%d@%zu.%06zu:spapr_vscsi_srp_indirect_data " "indirect segment 0x%" PRIx32" bytes" "\n" , |
5554 | qemu_get_thread_id(), |
5555 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5556 | , len); |
5557 | } |
5558 | } |
5559 | |
5560 | static inline void trace_spapr_vscsi_srp_indirect_data(uint32_t len) |
5561 | { |
5562 | if (true) { |
5563 | _nocheck__trace_spapr_vscsi_srp_indirect_data(len); |
5564 | } |
5565 | } |
5566 | |
5567 | #define TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_RW_BACKEND_DSTATE() ( \ |
5568 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_RW) || \ |
5569 | false) |
5570 | |
5571 | static inline void _nocheck__trace_spapr_vscsi_srp_indirect_data_rw(int writing, int rc) |
5572 | { |
5573 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_RW) && qemu_loglevel_mask(LOG_TRACE)) { |
5574 | struct timeval _now; |
5575 | gettimeofday(&_now, NULL); |
5576 | qemu_log("%d@%zu.%06zu:spapr_vscsi_srp_indirect_data_rw " "spapr_vio_dma_r/w(%d) -> %d" "\n" , |
5577 | qemu_get_thread_id(), |
5578 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5579 | , writing, rc); |
5580 | } |
5581 | } |
5582 | |
5583 | static inline void trace_spapr_vscsi_srp_indirect_data_rw(int writing, int rc) |
5584 | { |
5585 | if (true) { |
5586 | _nocheck__trace_spapr_vscsi_srp_indirect_data_rw(writing, rc); |
5587 | } |
5588 | } |
5589 | |
5590 | #define TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_BUF_BACKEND_DSTATE() ( \ |
5591 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_BUF) || \ |
5592 | false) |
5593 | |
5594 | static inline void _nocheck__trace_spapr_vscsi_srp_indirect_data_buf(unsigned a, unsigned b, unsigned c, unsigned d) |
5595 | { |
5596 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_SRP_INDIRECT_DATA_BUF) && qemu_loglevel_mask(LOG_TRACE)) { |
5597 | struct timeval _now; |
5598 | gettimeofday(&_now, NULL); |
5599 | qemu_log("%d@%zu.%06zu:spapr_vscsi_srp_indirect_data_buf " " data: %02x %02x %02x %02x..." "\n" , |
5600 | qemu_get_thread_id(), |
5601 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5602 | , a, b, c, d); |
5603 | } |
5604 | } |
5605 | |
5606 | static inline void trace_spapr_vscsi_srp_indirect_data_buf(unsigned a, unsigned b, unsigned c, unsigned d) |
5607 | { |
5608 | if (true) { |
5609 | _nocheck__trace_spapr_vscsi_srp_indirect_data_buf(a, b, c, d); |
5610 | } |
5611 | } |
5612 | |
5613 | #define TRACE_SPAPR_VSCSI_SRP_TRANSFER_DATA_BACKEND_DSTATE() ( \ |
5614 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_SRP_TRANSFER_DATA) || \ |
5615 | false) |
5616 | |
5617 | static inline void _nocheck__trace_spapr_vscsi_srp_transfer_data(uint32_t len) |
5618 | { |
5619 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_SRP_TRANSFER_DATA) && qemu_loglevel_mask(LOG_TRACE)) { |
5620 | struct timeval _now; |
5621 | gettimeofday(&_now, NULL); |
5622 | qemu_log("%d@%zu.%06zu:spapr_vscsi_srp_transfer_data " "no data desc transfer, skipping 0x%" PRIx32" bytes" "\n" , |
5623 | qemu_get_thread_id(), |
5624 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5625 | , len); |
5626 | } |
5627 | } |
5628 | |
5629 | static inline void trace_spapr_vscsi_srp_transfer_data(uint32_t len) |
5630 | { |
5631 | if (true) { |
5632 | _nocheck__trace_spapr_vscsi_srp_transfer_data(len); |
5633 | } |
5634 | } |
5635 | |
5636 | #define TRACE_SPAPR_VSCSI_TRANSFER_DATA_BACKEND_DSTATE() ( \ |
5637 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_TRANSFER_DATA) || \ |
5638 | false) |
5639 | |
5640 | static inline void _nocheck__trace_spapr_vscsi_transfer_data(uint32_t tag, uint32_t len, void * req) |
5641 | { |
5642 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_TRANSFER_DATA) && qemu_loglevel_mask(LOG_TRACE)) { |
5643 | struct timeval _now; |
5644 | gettimeofday(&_now, NULL); |
5645 | qemu_log("%d@%zu.%06zu:spapr_vscsi_transfer_data " "SCSI xfer complete tag=0x%" PRIx32" len=0x%" PRIx32", req=%p" "\n" , |
5646 | qemu_get_thread_id(), |
5647 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5648 | , tag, len, req); |
5649 | } |
5650 | } |
5651 | |
5652 | static inline void trace_spapr_vscsi_transfer_data(uint32_t tag, uint32_t len, void * req) |
5653 | { |
5654 | if (true) { |
5655 | _nocheck__trace_spapr_vscsi_transfer_data(tag, len, req); |
5656 | } |
5657 | } |
5658 | |
5659 | #define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_BACKEND_DSTATE() ( \ |
5660 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_COMMAND_COMPLETE) || \ |
5661 | false) |
5662 | |
5663 | static inline void _nocheck__trace_spapr_vscsi_command_complete(uint32_t tag, uint32_t status, void * req) |
5664 | { |
5665 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_COMMAND_COMPLETE) && qemu_loglevel_mask(LOG_TRACE)) { |
5666 | struct timeval _now; |
5667 | gettimeofday(&_now, NULL); |
5668 | qemu_log("%d@%zu.%06zu:spapr_vscsi_command_complete " "SCSI cmd complete, tag=0x%" PRIx32" status=0x%" PRIx32", req=%p" "\n" , |
5669 | qemu_get_thread_id(), |
5670 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5671 | , tag, status, req); |
5672 | } |
5673 | } |
5674 | |
5675 | static inline void trace_spapr_vscsi_command_complete(uint32_t tag, uint32_t status, void * req) |
5676 | { |
5677 | if (true) { |
5678 | _nocheck__trace_spapr_vscsi_command_complete(tag, status, req); |
5679 | } |
5680 | } |
5681 | |
5682 | #define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_SENSE_DATA1_BACKEND_DSTATE() ( \ |
5683 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_SENSE_DATA1) || \ |
5684 | false) |
5685 | |
5686 | static inline void _nocheck__trace_spapr_vscsi_command_complete_sense_data1(uint32_t len, unsigned s0, unsigned s1, unsigned s2, unsigned s3, unsigned s4, unsigned s5, unsigned s6, unsigned s7) |
5687 | { |
5688 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_SENSE_DATA1) && qemu_loglevel_mask(LOG_TRACE)) { |
5689 | struct timeval _now; |
5690 | gettimeofday(&_now, NULL); |
5691 | qemu_log("%d@%zu.%06zu:spapr_vscsi_command_complete_sense_data1 " "Sense data, %d bytes: %02x %02x %02x %02x %02x %02x %02x %02x" "\n" , |
5692 | qemu_get_thread_id(), |
5693 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5694 | , len, s0, s1, s2, s3, s4, s5, s6, s7); |
5695 | } |
5696 | } |
5697 | |
5698 | static inline void trace_spapr_vscsi_command_complete_sense_data1(uint32_t len, unsigned s0, unsigned s1, unsigned s2, unsigned s3, unsigned s4, unsigned s5, unsigned s6, unsigned s7) |
5699 | { |
5700 | if (true) { |
5701 | _nocheck__trace_spapr_vscsi_command_complete_sense_data1(len, s0, s1, s2, s3, s4, s5, s6, s7); |
5702 | } |
5703 | } |
5704 | |
5705 | #define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_SENSE_DATA2_BACKEND_DSTATE() ( \ |
5706 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_SENSE_DATA2) || \ |
5707 | false) |
5708 | |
5709 | static inline void _nocheck__trace_spapr_vscsi_command_complete_sense_data2(unsigned s8, unsigned s9, unsigned s10, unsigned s11, unsigned s12, unsigned s13, unsigned s14, unsigned s15) |
5710 | { |
5711 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_SENSE_DATA2) && qemu_loglevel_mask(LOG_TRACE)) { |
5712 | struct timeval _now; |
5713 | gettimeofday(&_now, NULL); |
5714 | qemu_log("%d@%zu.%06zu:spapr_vscsi_command_complete_sense_data2 " " %02x %02x %02x %02x %02x %02x %02x %02x" "\n" , |
5715 | qemu_get_thread_id(), |
5716 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5717 | , s8, s9, s10, s11, s12, s13, s14, s15); |
5718 | } |
5719 | } |
5720 | |
5721 | static inline void trace_spapr_vscsi_command_complete_sense_data2(unsigned s8, unsigned s9, unsigned s10, unsigned s11, unsigned s12, unsigned s13, unsigned s14, unsigned s15) |
5722 | { |
5723 | if (true) { |
5724 | _nocheck__trace_spapr_vscsi_command_complete_sense_data2(s8, s9, s10, s11, s12, s13, s14, s15); |
5725 | } |
5726 | } |
5727 | |
5728 | #define TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_STATUS_BACKEND_DSTATE() ( \ |
5729 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_STATUS) || \ |
5730 | false) |
5731 | |
5732 | static inline void _nocheck__trace_spapr_vscsi_command_complete_status(uint32_t status) |
5733 | { |
5734 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_COMMAND_COMPLETE_STATUS) && qemu_loglevel_mask(LOG_TRACE)) { |
5735 | struct timeval _now; |
5736 | gettimeofday(&_now, NULL); |
5737 | qemu_log("%d@%zu.%06zu:spapr_vscsi_command_complete_status " "Command complete err=%" PRIu32 "\n" , |
5738 | qemu_get_thread_id(), |
5739 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5740 | , status); |
5741 | } |
5742 | } |
5743 | |
5744 | static inline void trace_spapr_vscsi_command_complete_status(uint32_t status) |
5745 | { |
5746 | if (true) { |
5747 | _nocheck__trace_spapr_vscsi_command_complete_status(status); |
5748 | } |
5749 | } |
5750 | |
5751 | #define TRACE_SPAPR_VSCSI_SAVE_REQUEST_BACKEND_DSTATE() ( \ |
5752 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_SAVE_REQUEST) || \ |
5753 | false) |
5754 | |
5755 | static inline void _nocheck__trace_spapr_vscsi_save_request(uint32_t qtag, unsigned desc, unsigned offset) |
5756 | { |
5757 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_SAVE_REQUEST) && qemu_loglevel_mask(LOG_TRACE)) { |
5758 | struct timeval _now; |
5759 | gettimeofday(&_now, NULL); |
5760 | qemu_log("%d@%zu.%06zu:spapr_vscsi_save_request " "saving tag=%" PRIu32", current desc#%u, offset=0x%x" "\n" , |
5761 | qemu_get_thread_id(), |
5762 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5763 | , qtag, desc, offset); |
5764 | } |
5765 | } |
5766 | |
5767 | static inline void trace_spapr_vscsi_save_request(uint32_t qtag, unsigned desc, unsigned offset) |
5768 | { |
5769 | if (true) { |
5770 | _nocheck__trace_spapr_vscsi_save_request(qtag, desc, offset); |
5771 | } |
5772 | } |
5773 | |
5774 | #define TRACE_SPAPR_VSCSI_LOAD_REQUEST_BACKEND_DSTATE() ( \ |
5775 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_LOAD_REQUEST) || \ |
5776 | false) |
5777 | |
5778 | static inline void _nocheck__trace_spapr_vscsi_load_request(uint32_t qtag, unsigned desc, unsigned offset) |
5779 | { |
5780 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_LOAD_REQUEST) && qemu_loglevel_mask(LOG_TRACE)) { |
5781 | struct timeval _now; |
5782 | gettimeofday(&_now, NULL); |
5783 | qemu_log("%d@%zu.%06zu:spapr_vscsi_load_request " "restoring tag=%" PRIu32", current desc#%u, offset=0x%x" "\n" , |
5784 | qemu_get_thread_id(), |
5785 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5786 | , qtag, desc, offset); |
5787 | } |
5788 | } |
5789 | |
5790 | static inline void trace_spapr_vscsi_load_request(uint32_t qtag, unsigned desc, unsigned offset) |
5791 | { |
5792 | if (true) { |
5793 | _nocheck__trace_spapr_vscsi_load_request(qtag, desc, offset); |
5794 | } |
5795 | } |
5796 | |
5797 | #define TRACE_SPAPR_VSCSI_PROCESS_LOGIN_BACKEND_DSTATE() ( \ |
5798 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_PROCESS_LOGIN) || \ |
5799 | false) |
5800 | |
5801 | static inline void _nocheck__trace_spapr_vscsi_process_login(void) |
5802 | { |
5803 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_PROCESS_LOGIN) && qemu_loglevel_mask(LOG_TRACE)) { |
5804 | struct timeval _now; |
5805 | gettimeofday(&_now, NULL); |
5806 | qemu_log("%d@%zu.%06zu:spapr_vscsi_process_login " "Got login, sending response !" "\n" , |
5807 | qemu_get_thread_id(), |
5808 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5809 | ); |
5810 | } |
5811 | } |
5812 | |
5813 | static inline void trace_spapr_vscsi_process_login(void) |
5814 | { |
5815 | if (true) { |
5816 | _nocheck__trace_spapr_vscsi_process_login(); |
5817 | } |
5818 | } |
5819 | |
5820 | #define TRACE_SPAPR_VSCSI_QUEUE_CMD_NO_DRIVE_BACKEND_DSTATE() ( \ |
5821 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_QUEUE_CMD_NO_DRIVE) || \ |
5822 | false) |
5823 | |
5824 | static inline void _nocheck__trace_spapr_vscsi_queue_cmd_no_drive(uint64_t lun) |
5825 | { |
5826 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_QUEUE_CMD_NO_DRIVE) && qemu_loglevel_mask(LOG_TRACE)) { |
5827 | struct timeval _now; |
5828 | gettimeofday(&_now, NULL); |
5829 | qemu_log("%d@%zu.%06zu:spapr_vscsi_queue_cmd_no_drive " "Command for lun 0x%08" PRIx64 " with no drive" "\n" , |
5830 | qemu_get_thread_id(), |
5831 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5832 | , lun); |
5833 | } |
5834 | } |
5835 | |
5836 | static inline void trace_spapr_vscsi_queue_cmd_no_drive(uint64_t lun) |
5837 | { |
5838 | if (true) { |
5839 | _nocheck__trace_spapr_vscsi_queue_cmd_no_drive(lun); |
5840 | } |
5841 | } |
5842 | |
5843 | #define TRACE_SPAPR_VSCSI_QUEUE_CMD_BACKEND_DSTATE() ( \ |
5844 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_QUEUE_CMD) || \ |
5845 | false) |
5846 | |
5847 | static inline void _nocheck__trace_spapr_vscsi_queue_cmd(uint32_t qtag, unsigned cdb, const char * cmd, int lun, int ret) |
5848 | { |
5849 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_QUEUE_CMD) && qemu_loglevel_mask(LOG_TRACE)) { |
5850 | struct timeval _now; |
5851 | gettimeofday(&_now, NULL); |
5852 | qemu_log("%d@%zu.%06zu:spapr_vscsi_queue_cmd " "Queued command tag 0x%" PRIx32" CMD 0x%x=%s LUN %d ret: %d" "\n" , |
5853 | qemu_get_thread_id(), |
5854 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5855 | , qtag, cdb, cmd, lun, ret); |
5856 | } |
5857 | } |
5858 | |
5859 | static inline void trace_spapr_vscsi_queue_cmd(uint32_t qtag, unsigned cdb, const char * cmd, int lun, int ret) |
5860 | { |
5861 | if (true) { |
5862 | _nocheck__trace_spapr_vscsi_queue_cmd(qtag, cdb, cmd, lun, ret); |
5863 | } |
5864 | } |
5865 | |
5866 | #define TRACE_SPAPR_VSCSI_DO_CRQ_BACKEND_DSTATE() ( \ |
5867 | trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VSCSI_DO_CRQ) || \ |
5868 | false) |
5869 | |
5870 | static inline void _nocheck__trace_spapr_vscsi_do_crq(unsigned c0, unsigned c1) |
5871 | { |
5872 | if (trace_event_get_state(TRACE_SPAPR_VSCSI_DO_CRQ) && qemu_loglevel_mask(LOG_TRACE)) { |
5873 | struct timeval _now; |
5874 | gettimeofday(&_now, NULL); |
5875 | qemu_log("%d@%zu.%06zu:spapr_vscsi_do_crq " "crq: %02x %02x ..." "\n" , |
5876 | qemu_get_thread_id(), |
5877 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5878 | , c0, c1); |
5879 | } |
5880 | } |
5881 | |
5882 | static inline void trace_spapr_vscsi_do_crq(unsigned c0, unsigned c1) |
5883 | { |
5884 | if (true) { |
5885 | _nocheck__trace_spapr_vscsi_do_crq(c0, c1); |
5886 | } |
5887 | } |
5888 | |
5889 | #define TRACE_LSI_RESET_BACKEND_DSTATE() ( \ |
5890 | trace_event_get_state_dynamic_by_id(TRACE_LSI_RESET) || \ |
5891 | false) |
5892 | |
5893 | static inline void _nocheck__trace_lsi_reset(void) |
5894 | { |
5895 | if (trace_event_get_state(TRACE_LSI_RESET) && qemu_loglevel_mask(LOG_TRACE)) { |
5896 | struct timeval _now; |
5897 | gettimeofday(&_now, NULL); |
5898 | qemu_log("%d@%zu.%06zu:lsi_reset " "Reset" "\n" , |
5899 | qemu_get_thread_id(), |
5900 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5901 | ); |
5902 | } |
5903 | } |
5904 | |
5905 | static inline void trace_lsi_reset(void) |
5906 | { |
5907 | if (true) { |
5908 | _nocheck__trace_lsi_reset(); |
5909 | } |
5910 | } |
5911 | |
5912 | #define TRACE_LSI_UPDATE_IRQ_BACKEND_DSTATE() ( \ |
5913 | trace_event_get_state_dynamic_by_id(TRACE_LSI_UPDATE_IRQ) || \ |
5914 | false) |
5915 | |
5916 | static inline void _nocheck__trace_lsi_update_irq(int level, uint8_t dstat, uint8_t sist1, uint8_t sist0) |
5917 | { |
5918 | if (trace_event_get_state(TRACE_LSI_UPDATE_IRQ) && qemu_loglevel_mask(LOG_TRACE)) { |
5919 | struct timeval _now; |
5920 | gettimeofday(&_now, NULL); |
5921 | qemu_log("%d@%zu.%06zu:lsi_update_irq " "Update IRQ level %d dstat 0x%02x sist 0x%02x0x%02x" "\n" , |
5922 | qemu_get_thread_id(), |
5923 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5924 | , level, dstat, sist1, sist0); |
5925 | } |
5926 | } |
5927 | |
5928 | static inline void trace_lsi_update_irq(int level, uint8_t dstat, uint8_t sist1, uint8_t sist0) |
5929 | { |
5930 | if (true) { |
5931 | _nocheck__trace_lsi_update_irq(level, dstat, sist1, sist0); |
5932 | } |
5933 | } |
5934 | |
5935 | #define TRACE_LSI_UPDATE_IRQ_DISCONNECTED_BACKEND_DSTATE() ( \ |
5936 | trace_event_get_state_dynamic_by_id(TRACE_LSI_UPDATE_IRQ_DISCONNECTED) || \ |
5937 | false) |
5938 | |
5939 | static inline void _nocheck__trace_lsi_update_irq_disconnected(void) |
5940 | { |
5941 | if (trace_event_get_state(TRACE_LSI_UPDATE_IRQ_DISCONNECTED) && qemu_loglevel_mask(LOG_TRACE)) { |
5942 | struct timeval _now; |
5943 | gettimeofday(&_now, NULL); |
5944 | qemu_log("%d@%zu.%06zu:lsi_update_irq_disconnected " "Handled IRQs & disconnected, looking for pending processes" "\n" , |
5945 | qemu_get_thread_id(), |
5946 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5947 | ); |
5948 | } |
5949 | } |
5950 | |
5951 | static inline void trace_lsi_update_irq_disconnected(void) |
5952 | { |
5953 | if (true) { |
5954 | _nocheck__trace_lsi_update_irq_disconnected(); |
5955 | } |
5956 | } |
5957 | |
5958 | #define TRACE_LSI_SCRIPT_SCSI_INTERRUPT_BACKEND_DSTATE() ( \ |
5959 | trace_event_get_state_dynamic_by_id(TRACE_LSI_SCRIPT_SCSI_INTERRUPT) || \ |
5960 | false) |
5961 | |
5962 | static inline void _nocheck__trace_lsi_script_scsi_interrupt(uint8_t stat1, uint8_t stat0, uint8_t sist1, uint8_t sist0) |
5963 | { |
5964 | if (trace_event_get_state(TRACE_LSI_SCRIPT_SCSI_INTERRUPT) && qemu_loglevel_mask(LOG_TRACE)) { |
5965 | struct timeval _now; |
5966 | gettimeofday(&_now, NULL); |
5967 | qemu_log("%d@%zu.%06zu:lsi_script_scsi_interrupt " "SCSI Interrupt 0x%02x0x%02x prev 0x%02x0x%02x" "\n" , |
5968 | qemu_get_thread_id(), |
5969 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5970 | , stat1, stat0, sist1, sist0); |
5971 | } |
5972 | } |
5973 | |
5974 | static inline void trace_lsi_script_scsi_interrupt(uint8_t stat1, uint8_t stat0, uint8_t sist1, uint8_t sist0) |
5975 | { |
5976 | if (true) { |
5977 | _nocheck__trace_lsi_script_scsi_interrupt(stat1, stat0, sist1, sist0); |
5978 | } |
5979 | } |
5980 | |
5981 | #define TRACE_LSI_SCRIPT_DMA_INTERRUPT_BACKEND_DSTATE() ( \ |
5982 | trace_event_get_state_dynamic_by_id(TRACE_LSI_SCRIPT_DMA_INTERRUPT) || \ |
5983 | false) |
5984 | |
5985 | static inline void _nocheck__trace_lsi_script_dma_interrupt(uint8_t stat, uint8_t dstat) |
5986 | { |
5987 | if (trace_event_get_state(TRACE_LSI_SCRIPT_DMA_INTERRUPT) && qemu_loglevel_mask(LOG_TRACE)) { |
5988 | struct timeval _now; |
5989 | gettimeofday(&_now, NULL); |
5990 | qemu_log("%d@%zu.%06zu:lsi_script_dma_interrupt " "DMA Interrupt 0x%x prev 0x%x" "\n" , |
5991 | qemu_get_thread_id(), |
5992 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
5993 | , stat, dstat); |
5994 | } |
5995 | } |
5996 | |
5997 | static inline void trace_lsi_script_dma_interrupt(uint8_t stat, uint8_t dstat) |
5998 | { |
5999 | if (true) { |
6000 | _nocheck__trace_lsi_script_dma_interrupt(stat, dstat); |
6001 | } |
6002 | } |
6003 | |
6004 | #define TRACE_LSI_BAD_PHASE_JUMP_BACKEND_DSTATE() ( \ |
6005 | trace_event_get_state_dynamic_by_id(TRACE_LSI_BAD_PHASE_JUMP) || \ |
6006 | false) |
6007 | |
6008 | static inline void _nocheck__trace_lsi_bad_phase_jump(uint32_t dsp) |
6009 | { |
6010 | if (trace_event_get_state(TRACE_LSI_BAD_PHASE_JUMP) && qemu_loglevel_mask(LOG_TRACE)) { |
6011 | struct timeval _now; |
6012 | gettimeofday(&_now, NULL); |
6013 | qemu_log("%d@%zu.%06zu:lsi_bad_phase_jump " "Data phase mismatch jump to 0x%" PRIX32 "\n" , |
6014 | qemu_get_thread_id(), |
6015 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6016 | , dsp); |
6017 | } |
6018 | } |
6019 | |
6020 | static inline void trace_lsi_bad_phase_jump(uint32_t dsp) |
6021 | { |
6022 | if (true) { |
6023 | _nocheck__trace_lsi_bad_phase_jump(dsp); |
6024 | } |
6025 | } |
6026 | |
6027 | #define TRACE_LSI_BAD_PHASE_INTERRUPT_BACKEND_DSTATE() ( \ |
6028 | trace_event_get_state_dynamic_by_id(TRACE_LSI_BAD_PHASE_INTERRUPT) || \ |
6029 | false) |
6030 | |
6031 | static inline void _nocheck__trace_lsi_bad_phase_interrupt(void) |
6032 | { |
6033 | if (trace_event_get_state(TRACE_LSI_BAD_PHASE_INTERRUPT) && qemu_loglevel_mask(LOG_TRACE)) { |
6034 | struct timeval _now; |
6035 | gettimeofday(&_now, NULL); |
6036 | qemu_log("%d@%zu.%06zu:lsi_bad_phase_interrupt " "Phase mismatch interrupt" "\n" , |
6037 | qemu_get_thread_id(), |
6038 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6039 | ); |
6040 | } |
6041 | } |
6042 | |
6043 | static inline void trace_lsi_bad_phase_interrupt(void) |
6044 | { |
6045 | if (true) { |
6046 | _nocheck__trace_lsi_bad_phase_interrupt(); |
6047 | } |
6048 | } |
6049 | |
6050 | #define TRACE_LSI_BAD_SELECTION_BACKEND_DSTATE() ( \ |
6051 | trace_event_get_state_dynamic_by_id(TRACE_LSI_BAD_SELECTION) || \ |
6052 | false) |
6053 | |
6054 | static inline void _nocheck__trace_lsi_bad_selection(uint32_t id) |
6055 | { |
6056 | if (trace_event_get_state(TRACE_LSI_BAD_SELECTION) && qemu_loglevel_mask(LOG_TRACE)) { |
6057 | struct timeval _now; |
6058 | gettimeofday(&_now, NULL); |
6059 | qemu_log("%d@%zu.%06zu:lsi_bad_selection " "Selected absent target %" PRIu32 "\n" , |
6060 | qemu_get_thread_id(), |
6061 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6062 | , id); |
6063 | } |
6064 | } |
6065 | |
6066 | static inline void trace_lsi_bad_selection(uint32_t id) |
6067 | { |
6068 | if (true) { |
6069 | _nocheck__trace_lsi_bad_selection(id); |
6070 | } |
6071 | } |
6072 | |
6073 | #define TRACE_LSI_DO_DMA_UNAVAILABLE_BACKEND_DSTATE() ( \ |
6074 | trace_event_get_state_dynamic_by_id(TRACE_LSI_DO_DMA_UNAVAILABLE) || \ |
6075 | false) |
6076 | |
6077 | static inline void _nocheck__trace_lsi_do_dma_unavailable(void) |
6078 | { |
6079 | if (trace_event_get_state(TRACE_LSI_DO_DMA_UNAVAILABLE) && qemu_loglevel_mask(LOG_TRACE)) { |
6080 | struct timeval _now; |
6081 | gettimeofday(&_now, NULL); |
6082 | qemu_log("%d@%zu.%06zu:lsi_do_dma_unavailable " "DMA no data available" "\n" , |
6083 | qemu_get_thread_id(), |
6084 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6085 | ); |
6086 | } |
6087 | } |
6088 | |
6089 | static inline void trace_lsi_do_dma_unavailable(void) |
6090 | { |
6091 | if (true) { |
6092 | _nocheck__trace_lsi_do_dma_unavailable(); |
6093 | } |
6094 | } |
6095 | |
6096 | #define TRACE_LSI_DO_DMA_BACKEND_DSTATE() ( \ |
6097 | trace_event_get_state_dynamic_by_id(TRACE_LSI_DO_DMA) || \ |
6098 | false) |
6099 | |
6100 | static inline void _nocheck__trace_lsi_do_dma(uint64_t addr, int len) |
6101 | { |
6102 | if (trace_event_get_state(TRACE_LSI_DO_DMA) && qemu_loglevel_mask(LOG_TRACE)) { |
6103 | struct timeval _now; |
6104 | gettimeofday(&_now, NULL); |
6105 | qemu_log("%d@%zu.%06zu:lsi_do_dma " "DMA addr=0x%" PRIx64" len=%d" "\n" , |
6106 | qemu_get_thread_id(), |
6107 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6108 | , addr, len); |
6109 | } |
6110 | } |
6111 | |
6112 | static inline void trace_lsi_do_dma(uint64_t addr, int len) |
6113 | { |
6114 | if (true) { |
6115 | _nocheck__trace_lsi_do_dma(addr, len); |
6116 | } |
6117 | } |
6118 | |
6119 | #define TRACE_LSI_QUEUE_COMMAND_BACKEND_DSTATE() ( \ |
6120 | trace_event_get_state_dynamic_by_id(TRACE_LSI_QUEUE_COMMAND) || \ |
6121 | false) |
6122 | |
6123 | static inline void _nocheck__trace_lsi_queue_command(uint32_t tag) |
6124 | { |
6125 | if (trace_event_get_state(TRACE_LSI_QUEUE_COMMAND) && qemu_loglevel_mask(LOG_TRACE)) { |
6126 | struct timeval _now; |
6127 | gettimeofday(&_now, NULL); |
6128 | qemu_log("%d@%zu.%06zu:lsi_queue_command " "Queueing tag=0x%" PRId32 "\n" , |
6129 | qemu_get_thread_id(), |
6130 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6131 | , tag); |
6132 | } |
6133 | } |
6134 | |
6135 | static inline void trace_lsi_queue_command(uint32_t tag) |
6136 | { |
6137 | if (true) { |
6138 | _nocheck__trace_lsi_queue_command(tag); |
6139 | } |
6140 | } |
6141 | |
6142 | #define TRACE_LSI_ADD_MSG_BYTE_ERROR_BACKEND_DSTATE() ( \ |
6143 | trace_event_get_state_dynamic_by_id(TRACE_LSI_ADD_MSG_BYTE_ERROR) || \ |
6144 | false) |
6145 | |
6146 | static inline void _nocheck__trace_lsi_add_msg_byte_error(void) |
6147 | { |
6148 | if (trace_event_get_state(TRACE_LSI_ADD_MSG_BYTE_ERROR) && qemu_loglevel_mask(LOG_TRACE)) { |
6149 | struct timeval _now; |
6150 | gettimeofday(&_now, NULL); |
6151 | qemu_log("%d@%zu.%06zu:lsi_add_msg_byte_error " "MSG IN data too long" "\n" , |
6152 | qemu_get_thread_id(), |
6153 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6154 | ); |
6155 | } |
6156 | } |
6157 | |
6158 | static inline void trace_lsi_add_msg_byte_error(void) |
6159 | { |
6160 | if (true) { |
6161 | _nocheck__trace_lsi_add_msg_byte_error(); |
6162 | } |
6163 | } |
6164 | |
6165 | #define TRACE_LSI_ADD_MSG_BYTE_BACKEND_DSTATE() ( \ |
6166 | trace_event_get_state_dynamic_by_id(TRACE_LSI_ADD_MSG_BYTE) || \ |
6167 | false) |
6168 | |
6169 | static inline void _nocheck__trace_lsi_add_msg_byte(uint8_t data) |
6170 | { |
6171 | if (trace_event_get_state(TRACE_LSI_ADD_MSG_BYTE) && qemu_loglevel_mask(LOG_TRACE)) { |
6172 | struct timeval _now; |
6173 | gettimeofday(&_now, NULL); |
6174 | qemu_log("%d@%zu.%06zu:lsi_add_msg_byte " "MSG IN 0x%02x" "\n" , |
6175 | qemu_get_thread_id(), |
6176 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6177 | , data); |
6178 | } |
6179 | } |
6180 | |
6181 | static inline void trace_lsi_add_msg_byte(uint8_t data) |
6182 | { |
6183 | if (true) { |
6184 | _nocheck__trace_lsi_add_msg_byte(data); |
6185 | } |
6186 | } |
6187 | |
6188 | #define TRACE_LSI_RESELECT_BACKEND_DSTATE() ( \ |
6189 | trace_event_get_state_dynamic_by_id(TRACE_LSI_RESELECT) || \ |
6190 | false) |
6191 | |
6192 | static inline void _nocheck__trace_lsi_reselect(int id) |
6193 | { |
6194 | if (trace_event_get_state(TRACE_LSI_RESELECT) && qemu_loglevel_mask(LOG_TRACE)) { |
6195 | struct timeval _now; |
6196 | gettimeofday(&_now, NULL); |
6197 | qemu_log("%d@%zu.%06zu:lsi_reselect " "Reselected target %d" "\n" , |
6198 | qemu_get_thread_id(), |
6199 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6200 | , id); |
6201 | } |
6202 | } |
6203 | |
6204 | static inline void trace_lsi_reselect(int id) |
6205 | { |
6206 | if (true) { |
6207 | _nocheck__trace_lsi_reselect(id); |
6208 | } |
6209 | } |
6210 | |
6211 | #define TRACE_LSI_QUEUE_REQ_ERROR_BACKEND_DSTATE() ( \ |
6212 | trace_event_get_state_dynamic_by_id(TRACE_LSI_QUEUE_REQ_ERROR) || \ |
6213 | false) |
6214 | |
6215 | static inline void _nocheck__trace_lsi_queue_req_error(void * p) |
6216 | { |
6217 | if (trace_event_get_state(TRACE_LSI_QUEUE_REQ_ERROR) && qemu_loglevel_mask(LOG_TRACE)) { |
6218 | struct timeval _now; |
6219 | gettimeofday(&_now, NULL); |
6220 | qemu_log("%d@%zu.%06zu:lsi_queue_req_error " "Multiple IO pending for request %p" "\n" , |
6221 | qemu_get_thread_id(), |
6222 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6223 | , p); |
6224 | } |
6225 | } |
6226 | |
6227 | static inline void trace_lsi_queue_req_error(void * p) |
6228 | { |
6229 | if (true) { |
6230 | _nocheck__trace_lsi_queue_req_error(p); |
6231 | } |
6232 | } |
6233 | |
6234 | #define TRACE_LSI_QUEUE_REQ_BACKEND_DSTATE() ( \ |
6235 | trace_event_get_state_dynamic_by_id(TRACE_LSI_QUEUE_REQ) || \ |
6236 | false) |
6237 | |
6238 | static inline void _nocheck__trace_lsi_queue_req(uint32_t tag) |
6239 | { |
6240 | if (trace_event_get_state(TRACE_LSI_QUEUE_REQ) && qemu_loglevel_mask(LOG_TRACE)) { |
6241 | struct timeval _now; |
6242 | gettimeofday(&_now, NULL); |
6243 | qemu_log("%d@%zu.%06zu:lsi_queue_req " "Queueing IO tag=0x%" PRIx32 "\n" , |
6244 | qemu_get_thread_id(), |
6245 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6246 | , tag); |
6247 | } |
6248 | } |
6249 | |
6250 | static inline void trace_lsi_queue_req(uint32_t tag) |
6251 | { |
6252 | if (true) { |
6253 | _nocheck__trace_lsi_queue_req(tag); |
6254 | } |
6255 | } |
6256 | |
6257 | #define TRACE_LSI_COMMAND_COMPLETE_BACKEND_DSTATE() ( \ |
6258 | trace_event_get_state_dynamic_by_id(TRACE_LSI_COMMAND_COMPLETE) || \ |
6259 | false) |
6260 | |
6261 | static inline void _nocheck__trace_lsi_command_complete(uint32_t status) |
6262 | { |
6263 | if (trace_event_get_state(TRACE_LSI_COMMAND_COMPLETE) && qemu_loglevel_mask(LOG_TRACE)) { |
6264 | struct timeval _now; |
6265 | gettimeofday(&_now, NULL); |
6266 | qemu_log("%d@%zu.%06zu:lsi_command_complete " "Command complete status=%" PRId32 "\n" , |
6267 | qemu_get_thread_id(), |
6268 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6269 | , status); |
6270 | } |
6271 | } |
6272 | |
6273 | static inline void trace_lsi_command_complete(uint32_t status) |
6274 | { |
6275 | if (true) { |
6276 | _nocheck__trace_lsi_command_complete(status); |
6277 | } |
6278 | } |
6279 | |
6280 | #define TRACE_LSI_TRANSFER_DATA_BACKEND_DSTATE() ( \ |
6281 | trace_event_get_state_dynamic_by_id(TRACE_LSI_TRANSFER_DATA) || \ |
6282 | false) |
6283 | |
6284 | static inline void _nocheck__trace_lsi_transfer_data(uint32_t tag, uint32_t len) |
6285 | { |
6286 | if (trace_event_get_state(TRACE_LSI_TRANSFER_DATA) && qemu_loglevel_mask(LOG_TRACE)) { |
6287 | struct timeval _now; |
6288 | gettimeofday(&_now, NULL); |
6289 | qemu_log("%d@%zu.%06zu:lsi_transfer_data " "Data ready tag=0x%" PRIx32" len=%" PRId32 "\n" , |
6290 | qemu_get_thread_id(), |
6291 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6292 | , tag, len); |
6293 | } |
6294 | } |
6295 | |
6296 | static inline void trace_lsi_transfer_data(uint32_t tag, uint32_t len) |
6297 | { |
6298 | if (true) { |
6299 | _nocheck__trace_lsi_transfer_data(tag, len); |
6300 | } |
6301 | } |
6302 | |
6303 | #define TRACE_LSI_DO_COMMAND_BACKEND_DSTATE() ( \ |
6304 | trace_event_get_state_dynamic_by_id(TRACE_LSI_DO_COMMAND) || \ |
6305 | false) |
6306 | |
6307 | static inline void _nocheck__trace_lsi_do_command(uint32_t dbc) |
6308 | { |
6309 | if (trace_event_get_state(TRACE_LSI_DO_COMMAND) && qemu_loglevel_mask(LOG_TRACE)) { |
6310 | struct timeval _now; |
6311 | gettimeofday(&_now, NULL); |
6312 | qemu_log("%d@%zu.%06zu:lsi_do_command " "Send command len=%" PRId32 "\n" , |
6313 | qemu_get_thread_id(), |
6314 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6315 | , dbc); |
6316 | } |
6317 | } |
6318 | |
6319 | static inline void trace_lsi_do_command(uint32_t dbc) |
6320 | { |
6321 | if (true) { |
6322 | _nocheck__trace_lsi_do_command(dbc); |
6323 | } |
6324 | } |
6325 | |
6326 | #define TRACE_LSI_DO_STATUS_BACKEND_DSTATE() ( \ |
6327 | trace_event_get_state_dynamic_by_id(TRACE_LSI_DO_STATUS) || \ |
6328 | false) |
6329 | |
6330 | static inline void _nocheck__trace_lsi_do_status(uint32_t dbc, uint8_t status) |
6331 | { |
6332 | if (trace_event_get_state(TRACE_LSI_DO_STATUS) && qemu_loglevel_mask(LOG_TRACE)) { |
6333 | struct timeval _now; |
6334 | gettimeofday(&_now, NULL); |
6335 | qemu_log("%d@%zu.%06zu:lsi_do_status " "Get status len=%" PRId32" status=%d" "\n" , |
6336 | qemu_get_thread_id(), |
6337 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6338 | , dbc, status); |
6339 | } |
6340 | } |
6341 | |
6342 | static inline void trace_lsi_do_status(uint32_t dbc, uint8_t status) |
6343 | { |
6344 | if (true) { |
6345 | _nocheck__trace_lsi_do_status(dbc, status); |
6346 | } |
6347 | } |
6348 | |
6349 | #define TRACE_LSI_DO_STATUS_ERROR_BACKEND_DSTATE() ( \ |
6350 | trace_event_get_state_dynamic_by_id(TRACE_LSI_DO_STATUS_ERROR) || \ |
6351 | false) |
6352 | |
6353 | static inline void _nocheck__trace_lsi_do_status_error(void) |
6354 | { |
6355 | if (trace_event_get_state(TRACE_LSI_DO_STATUS_ERROR) && qemu_loglevel_mask(LOG_TRACE)) { |
6356 | struct timeval _now; |
6357 | gettimeofday(&_now, NULL); |
6358 | qemu_log("%d@%zu.%06zu:lsi_do_status_error " "Bad Status move" "\n" , |
6359 | qemu_get_thread_id(), |
6360 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6361 | ); |
6362 | } |
6363 | } |
6364 | |
6365 | static inline void trace_lsi_do_status_error(void) |
6366 | { |
6367 | if (true) { |
6368 | _nocheck__trace_lsi_do_status_error(); |
6369 | } |
6370 | } |
6371 | |
6372 | #define TRACE_LSI_DO_MSGIN_BACKEND_DSTATE() ( \ |
6373 | trace_event_get_state_dynamic_by_id(TRACE_LSI_DO_MSGIN) || \ |
6374 | false) |
6375 | |
6376 | static inline void _nocheck__trace_lsi_do_msgin(uint32_t dbc, int len) |
6377 | { |
6378 | if (trace_event_get_state(TRACE_LSI_DO_MSGIN) && qemu_loglevel_mask(LOG_TRACE)) { |
6379 | struct timeval _now; |
6380 | gettimeofday(&_now, NULL); |
6381 | qemu_log("%d@%zu.%06zu:lsi_do_msgin " "Message in len=%" PRId32" %d" "\n" , |
6382 | qemu_get_thread_id(), |
6383 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6384 | , dbc, len); |
6385 | } |
6386 | } |
6387 | |
6388 | static inline void trace_lsi_do_msgin(uint32_t dbc, int len) |
6389 | { |
6390 | if (true) { |
6391 | _nocheck__trace_lsi_do_msgin(dbc, len); |
6392 | } |
6393 | } |
6394 | |
6395 | #define TRACE_LSI_DO_MSGOUT_BACKEND_DSTATE() ( \ |
6396 | trace_event_get_state_dynamic_by_id(TRACE_LSI_DO_MSGOUT) || \ |
6397 | false) |
6398 | |
6399 | static inline void _nocheck__trace_lsi_do_msgout(uint32_t dbc) |
6400 | { |
6401 | if (trace_event_get_state(TRACE_LSI_DO_MSGOUT) && qemu_loglevel_mask(LOG_TRACE)) { |
6402 | struct timeval _now; |
6403 | gettimeofday(&_now, NULL); |
6404 | qemu_log("%d@%zu.%06zu:lsi_do_msgout " "MSG out len=%" PRId32 "\n" , |
6405 | qemu_get_thread_id(), |
6406 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6407 | , dbc); |
6408 | } |
6409 | } |
6410 | |
6411 | static inline void trace_lsi_do_msgout(uint32_t dbc) |
6412 | { |
6413 | if (true) { |
6414 | _nocheck__trace_lsi_do_msgout(dbc); |
6415 | } |
6416 | } |
6417 | |
6418 | #define TRACE_LSI_DO_MSGOUT_DISCONNECT_BACKEND_DSTATE() ( \ |
6419 | trace_event_get_state_dynamic_by_id(TRACE_LSI_DO_MSGOUT_DISCONNECT) || \ |
6420 | false) |
6421 | |
6422 | static inline void _nocheck__trace_lsi_do_msgout_disconnect(void) |
6423 | { |
6424 | if (trace_event_get_state(TRACE_LSI_DO_MSGOUT_DISCONNECT) && qemu_loglevel_mask(LOG_TRACE)) { |
6425 | struct timeval _now; |
6426 | gettimeofday(&_now, NULL); |
6427 | qemu_log("%d@%zu.%06zu:lsi_do_msgout_disconnect " "MSG: Disconnect" "\n" , |
6428 | qemu_get_thread_id(), |
6429 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6430 | ); |
6431 | } |
6432 | } |
6433 | |
6434 | static inline void trace_lsi_do_msgout_disconnect(void) |
6435 | { |
6436 | if (true) { |
6437 | _nocheck__trace_lsi_do_msgout_disconnect(); |
6438 | } |
6439 | } |
6440 | |
6441 | #define TRACE_LSI_DO_MSGOUT_NOOP_BACKEND_DSTATE() ( \ |
6442 | trace_event_get_state_dynamic_by_id(TRACE_LSI_DO_MSGOUT_NOOP) || \ |
6443 | false) |
6444 | |
6445 | static inline void _nocheck__trace_lsi_do_msgout_noop(void) |
6446 | { |
6447 | if (trace_event_get_state(TRACE_LSI_DO_MSGOUT_NOOP) && qemu_loglevel_mask(LOG_TRACE)) { |
6448 | struct timeval _now; |
6449 | gettimeofday(&_now, NULL); |
6450 | qemu_log("%d@%zu.%06zu:lsi_do_msgout_noop " "MSG: No Operation" "\n" , |
6451 | qemu_get_thread_id(), |
6452 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6453 | ); |
6454 | } |
6455 | } |
6456 | |
6457 | static inline void trace_lsi_do_msgout_noop(void) |
6458 | { |
6459 | if (true) { |
6460 | _nocheck__trace_lsi_do_msgout_noop(); |
6461 | } |
6462 | } |
6463 | |
6464 | #define TRACE_LSI_DO_MSGOUT_EXTENDED_BACKEND_DSTATE() ( \ |
6465 | trace_event_get_state_dynamic_by_id(TRACE_LSI_DO_MSGOUT_EXTENDED) || \ |
6466 | false) |
6467 | |
6468 | static inline void _nocheck__trace_lsi_do_msgout_extended(uint8_t msg, uint8_t len) |
6469 | { |
6470 | if (trace_event_get_state(TRACE_LSI_DO_MSGOUT_EXTENDED) && qemu_loglevel_mask(LOG_TRACE)) { |
6471 | struct timeval _now; |
6472 | gettimeofday(&_now, NULL); |
6473 | qemu_log("%d@%zu.%06zu:lsi_do_msgout_extended " "Extended message 0x%x (len %d)" "\n" , |
6474 | qemu_get_thread_id(), |
6475 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6476 | , msg, len); |
6477 | } |
6478 | } |
6479 | |
6480 | static inline void trace_lsi_do_msgout_extended(uint8_t msg, uint8_t len) |
6481 | { |
6482 | if (true) { |
6483 | _nocheck__trace_lsi_do_msgout_extended(msg, len); |
6484 | } |
6485 | } |
6486 | |
6487 | #define TRACE_LSI_DO_MSGOUT_IGNORED_BACKEND_DSTATE() ( \ |
6488 | trace_event_get_state_dynamic_by_id(TRACE_LSI_DO_MSGOUT_IGNORED) || \ |
6489 | false) |
6490 | |
6491 | static inline void _nocheck__trace_lsi_do_msgout_ignored(const char * msg) |
6492 | { |
6493 | if (trace_event_get_state(TRACE_LSI_DO_MSGOUT_IGNORED) && qemu_loglevel_mask(LOG_TRACE)) { |
6494 | struct timeval _now; |
6495 | gettimeofday(&_now, NULL); |
6496 | qemu_log("%d@%zu.%06zu:lsi_do_msgout_ignored " "%s (ignored)" "\n" , |
6497 | qemu_get_thread_id(), |
6498 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6499 | , msg); |
6500 | } |
6501 | } |
6502 | |
6503 | static inline void trace_lsi_do_msgout_ignored(const char * msg) |
6504 | { |
6505 | if (true) { |
6506 | _nocheck__trace_lsi_do_msgout_ignored(msg); |
6507 | } |
6508 | } |
6509 | |
6510 | #define TRACE_LSI_DO_MSGOUT_SIMPLEQUEUE_BACKEND_DSTATE() ( \ |
6511 | trace_event_get_state_dynamic_by_id(TRACE_LSI_DO_MSGOUT_SIMPLEQUEUE) || \ |
6512 | false) |
6513 | |
6514 | static inline void _nocheck__trace_lsi_do_msgout_simplequeue(uint8_t select_tag) |
6515 | { |
6516 | if (trace_event_get_state(TRACE_LSI_DO_MSGOUT_SIMPLEQUEUE) && qemu_loglevel_mask(LOG_TRACE)) { |
6517 | struct timeval _now; |
6518 | gettimeofday(&_now, NULL); |
6519 | qemu_log("%d@%zu.%06zu:lsi_do_msgout_simplequeue " "SIMPLE queue tag=0x%x" "\n" , |
6520 | qemu_get_thread_id(), |
6521 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6522 | , select_tag); |
6523 | } |
6524 | } |
6525 | |
6526 | static inline void trace_lsi_do_msgout_simplequeue(uint8_t select_tag) |
6527 | { |
6528 | if (true) { |
6529 | _nocheck__trace_lsi_do_msgout_simplequeue(select_tag); |
6530 | } |
6531 | } |
6532 | |
6533 | #define TRACE_LSI_DO_MSGOUT_ABORT_BACKEND_DSTATE() ( \ |
6534 | trace_event_get_state_dynamic_by_id(TRACE_LSI_DO_MSGOUT_ABORT) || \ |
6535 | false) |
6536 | |
6537 | static inline void _nocheck__trace_lsi_do_msgout_abort(uint32_t tag) |
6538 | { |
6539 | if (trace_event_get_state(TRACE_LSI_DO_MSGOUT_ABORT) && qemu_loglevel_mask(LOG_TRACE)) { |
6540 | struct timeval _now; |
6541 | gettimeofday(&_now, NULL); |
6542 | qemu_log("%d@%zu.%06zu:lsi_do_msgout_abort " "MSG: ABORT TAG tag=0x%" PRId32 "\n" , |
6543 | qemu_get_thread_id(), |
6544 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6545 | , tag); |
6546 | } |
6547 | } |
6548 | |
6549 | static inline void trace_lsi_do_msgout_abort(uint32_t tag) |
6550 | { |
6551 | if (true) { |
6552 | _nocheck__trace_lsi_do_msgout_abort(tag); |
6553 | } |
6554 | } |
6555 | |
6556 | #define TRACE_LSI_DO_MSGOUT_CLEARQUEUE_BACKEND_DSTATE() ( \ |
6557 | trace_event_get_state_dynamic_by_id(TRACE_LSI_DO_MSGOUT_CLEARQUEUE) || \ |
6558 | false) |
6559 | |
6560 | static inline void _nocheck__trace_lsi_do_msgout_clearqueue(uint32_t tag) |
6561 | { |
6562 | if (trace_event_get_state(TRACE_LSI_DO_MSGOUT_CLEARQUEUE) && qemu_loglevel_mask(LOG_TRACE)) { |
6563 | struct timeval _now; |
6564 | gettimeofday(&_now, NULL); |
6565 | qemu_log("%d@%zu.%06zu:lsi_do_msgout_clearqueue " "MSG: CLEAR QUEUE tag=0x%" PRIx32 "\n" , |
6566 | qemu_get_thread_id(), |
6567 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6568 | , tag); |
6569 | } |
6570 | } |
6571 | |
6572 | static inline void trace_lsi_do_msgout_clearqueue(uint32_t tag) |
6573 | { |
6574 | if (true) { |
6575 | _nocheck__trace_lsi_do_msgout_clearqueue(tag); |
6576 | } |
6577 | } |
6578 | |
6579 | #define TRACE_LSI_DO_MSGOUT_BUSDEVICERESET_BACKEND_DSTATE() ( \ |
6580 | trace_event_get_state_dynamic_by_id(TRACE_LSI_DO_MSGOUT_BUSDEVICERESET) || \ |
6581 | false) |
6582 | |
6583 | static inline void _nocheck__trace_lsi_do_msgout_busdevicereset(uint32_t tag) |
6584 | { |
6585 | if (trace_event_get_state(TRACE_LSI_DO_MSGOUT_BUSDEVICERESET) && qemu_loglevel_mask(LOG_TRACE)) { |
6586 | struct timeval _now; |
6587 | gettimeofday(&_now, NULL); |
6588 | qemu_log("%d@%zu.%06zu:lsi_do_msgout_busdevicereset " "MSG: BUS DEVICE RESET tag=0x%" PRIx32 "\n" , |
6589 | qemu_get_thread_id(), |
6590 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6591 | , tag); |
6592 | } |
6593 | } |
6594 | |
6595 | static inline void trace_lsi_do_msgout_busdevicereset(uint32_t tag) |
6596 | { |
6597 | if (true) { |
6598 | _nocheck__trace_lsi_do_msgout_busdevicereset(tag); |
6599 | } |
6600 | } |
6601 | |
6602 | #define TRACE_LSI_DO_MSGOUT_SELECT_BACKEND_DSTATE() ( \ |
6603 | trace_event_get_state_dynamic_by_id(TRACE_LSI_DO_MSGOUT_SELECT) || \ |
6604 | false) |
6605 | |
6606 | static inline void _nocheck__trace_lsi_do_msgout_select(int id) |
6607 | { |
6608 | if (trace_event_get_state(TRACE_LSI_DO_MSGOUT_SELECT) && qemu_loglevel_mask(LOG_TRACE)) { |
6609 | struct timeval _now; |
6610 | gettimeofday(&_now, NULL); |
6611 | qemu_log("%d@%zu.%06zu:lsi_do_msgout_select " "Select LUN %d" "\n" , |
6612 | qemu_get_thread_id(), |
6613 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6614 | , id); |
6615 | } |
6616 | } |
6617 | |
6618 | static inline void trace_lsi_do_msgout_select(int id) |
6619 | { |
6620 | if (true) { |
6621 | _nocheck__trace_lsi_do_msgout_select(id); |
6622 | } |
6623 | } |
6624 | |
6625 | #define TRACE_LSI_MEMCPY_BACKEND_DSTATE() ( \ |
6626 | trace_event_get_state_dynamic_by_id(TRACE_LSI_MEMCPY) || \ |
6627 | false) |
6628 | |
6629 | static inline void _nocheck__trace_lsi_memcpy(uint32_t dest, uint32_t src, int count) |
6630 | { |
6631 | if (trace_event_get_state(TRACE_LSI_MEMCPY) && qemu_loglevel_mask(LOG_TRACE)) { |
6632 | struct timeval _now; |
6633 | gettimeofday(&_now, NULL); |
6634 | qemu_log("%d@%zu.%06zu:lsi_memcpy " "memcpy dest 0x%" PRIx32" src 0x%" PRIx32" count %d" "\n" , |
6635 | qemu_get_thread_id(), |
6636 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6637 | , dest, src, count); |
6638 | } |
6639 | } |
6640 | |
6641 | static inline void trace_lsi_memcpy(uint32_t dest, uint32_t src, int count) |
6642 | { |
6643 | if (true) { |
6644 | _nocheck__trace_lsi_memcpy(dest, src, count); |
6645 | } |
6646 | } |
6647 | |
6648 | #define TRACE_LSI_WAIT_RESELECT_BACKEND_DSTATE() ( \ |
6649 | trace_event_get_state_dynamic_by_id(TRACE_LSI_WAIT_RESELECT) || \ |
6650 | false) |
6651 | |
6652 | static inline void _nocheck__trace_lsi_wait_reselect(void) |
6653 | { |
6654 | if (trace_event_get_state(TRACE_LSI_WAIT_RESELECT) && qemu_loglevel_mask(LOG_TRACE)) { |
6655 | struct timeval _now; |
6656 | gettimeofday(&_now, NULL); |
6657 | qemu_log("%d@%zu.%06zu:lsi_wait_reselect " "Wait Reselect" "\n" , |
6658 | qemu_get_thread_id(), |
6659 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6660 | ); |
6661 | } |
6662 | } |
6663 | |
6664 | static inline void trace_lsi_wait_reselect(void) |
6665 | { |
6666 | if (true) { |
6667 | _nocheck__trace_lsi_wait_reselect(); |
6668 | } |
6669 | } |
6670 | |
6671 | #define TRACE_LSI_EXECUTE_SCRIPT_BACKEND_DSTATE() ( \ |
6672 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT) || \ |
6673 | false) |
6674 | |
6675 | static inline void _nocheck__trace_lsi_execute_script(uint32_t dsp, uint32_t insn, uint32_t addr) |
6676 | { |
6677 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT) && qemu_loglevel_mask(LOG_TRACE)) { |
6678 | struct timeval _now; |
6679 | gettimeofday(&_now, NULL); |
6680 | qemu_log("%d@%zu.%06zu:lsi_execute_script " "SCRIPTS dsp=0x%" PRIx32" opcode 0x%" PRIx32" arg 0x%" PRIx32 "\n" , |
6681 | qemu_get_thread_id(), |
6682 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6683 | , dsp, insn, addr); |
6684 | } |
6685 | } |
6686 | |
6687 | static inline void trace_lsi_execute_script(uint32_t dsp, uint32_t insn, uint32_t addr) |
6688 | { |
6689 | if (true) { |
6690 | _nocheck__trace_lsi_execute_script(dsp, insn, addr); |
6691 | } |
6692 | } |
6693 | |
6694 | #define TRACE_LSI_EXECUTE_SCRIPT_BLOCKMOVE_DELAYED_BACKEND_DSTATE() ( \ |
6695 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_BLOCKMOVE_DELAYED) || \ |
6696 | false) |
6697 | |
6698 | static inline void _nocheck__trace_lsi_execute_script_blockmove_delayed(void) |
6699 | { |
6700 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_BLOCKMOVE_DELAYED) && qemu_loglevel_mask(LOG_TRACE)) { |
6701 | struct timeval _now; |
6702 | gettimeofday(&_now, NULL); |
6703 | qemu_log("%d@%zu.%06zu:lsi_execute_script_blockmove_delayed " "Delayed select timeout" "\n" , |
6704 | qemu_get_thread_id(), |
6705 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6706 | ); |
6707 | } |
6708 | } |
6709 | |
6710 | static inline void trace_lsi_execute_script_blockmove_delayed(void) |
6711 | { |
6712 | if (true) { |
6713 | _nocheck__trace_lsi_execute_script_blockmove_delayed(); |
6714 | } |
6715 | } |
6716 | |
6717 | #define TRACE_LSI_EXECUTE_SCRIPT_BLOCKMOVE_BADPHASE_BACKEND_DSTATE() ( \ |
6718 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_BLOCKMOVE_BADPHASE) || \ |
6719 | false) |
6720 | |
6721 | static inline void _nocheck__trace_lsi_execute_script_blockmove_badphase(const char * phase, const char * expected) |
6722 | { |
6723 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_BLOCKMOVE_BADPHASE) && qemu_loglevel_mask(LOG_TRACE)) { |
6724 | struct timeval _now; |
6725 | gettimeofday(&_now, NULL); |
6726 | qemu_log("%d@%zu.%06zu:lsi_execute_script_blockmove_badphase " "Wrong phase got %s expected %s" "\n" , |
6727 | qemu_get_thread_id(), |
6728 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6729 | , phase, expected); |
6730 | } |
6731 | } |
6732 | |
6733 | static inline void trace_lsi_execute_script_blockmove_badphase(const char * phase, const char * expected) |
6734 | { |
6735 | if (true) { |
6736 | _nocheck__trace_lsi_execute_script_blockmove_badphase(phase, expected); |
6737 | } |
6738 | } |
6739 | |
6740 | #define TRACE_LSI_EXECUTE_SCRIPT_IO_ALREADYRESELECTED_BACKEND_DSTATE() ( \ |
6741 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_IO_ALREADYRESELECTED) || \ |
6742 | false) |
6743 | |
6744 | static inline void _nocheck__trace_lsi_execute_script_io_alreadyreselected(void) |
6745 | { |
6746 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_IO_ALREADYRESELECTED) && qemu_loglevel_mask(LOG_TRACE)) { |
6747 | struct timeval _now; |
6748 | gettimeofday(&_now, NULL); |
6749 | qemu_log("%d@%zu.%06zu:lsi_execute_script_io_alreadyreselected " "Already reselected, jumping to alternative address" "\n" , |
6750 | qemu_get_thread_id(), |
6751 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6752 | ); |
6753 | } |
6754 | } |
6755 | |
6756 | static inline void trace_lsi_execute_script_io_alreadyreselected(void) |
6757 | { |
6758 | if (true) { |
6759 | _nocheck__trace_lsi_execute_script_io_alreadyreselected(); |
6760 | } |
6761 | } |
6762 | |
6763 | #define TRACE_LSI_EXECUTE_SCRIPT_IO_SELECTED_BACKEND_DSTATE() ( \ |
6764 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_IO_SELECTED) || \ |
6765 | false) |
6766 | |
6767 | static inline void _nocheck__trace_lsi_execute_script_io_selected(uint8_t id, const char * atn) |
6768 | { |
6769 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_IO_SELECTED) && qemu_loglevel_mask(LOG_TRACE)) { |
6770 | struct timeval _now; |
6771 | gettimeofday(&_now, NULL); |
6772 | qemu_log("%d@%zu.%06zu:lsi_execute_script_io_selected " "Selected target %d%s" "\n" , |
6773 | qemu_get_thread_id(), |
6774 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6775 | , id, atn); |
6776 | } |
6777 | } |
6778 | |
6779 | static inline void trace_lsi_execute_script_io_selected(uint8_t id, const char * atn) |
6780 | { |
6781 | if (true) { |
6782 | _nocheck__trace_lsi_execute_script_io_selected(id, atn); |
6783 | } |
6784 | } |
6785 | |
6786 | #define TRACE_LSI_EXECUTE_SCRIPT_IO_DISCONNECT_BACKEND_DSTATE() ( \ |
6787 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_IO_DISCONNECT) || \ |
6788 | false) |
6789 | |
6790 | static inline void _nocheck__trace_lsi_execute_script_io_disconnect(void) |
6791 | { |
6792 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_IO_DISCONNECT) && qemu_loglevel_mask(LOG_TRACE)) { |
6793 | struct timeval _now; |
6794 | gettimeofday(&_now, NULL); |
6795 | qemu_log("%d@%zu.%06zu:lsi_execute_script_io_disconnect " "Wait Disconnect" "\n" , |
6796 | qemu_get_thread_id(), |
6797 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6798 | ); |
6799 | } |
6800 | } |
6801 | |
6802 | static inline void trace_lsi_execute_script_io_disconnect(void) |
6803 | { |
6804 | if (true) { |
6805 | _nocheck__trace_lsi_execute_script_io_disconnect(); |
6806 | } |
6807 | } |
6808 | |
6809 | #define TRACE_LSI_EXECUTE_SCRIPT_IO_SET_BACKEND_DSTATE() ( \ |
6810 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_IO_SET) || \ |
6811 | false) |
6812 | |
6813 | static inline void _nocheck__trace_lsi_execute_script_io_set(const char * atn, const char * ack, const char * tm, const char * cc) |
6814 | { |
6815 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_IO_SET) && qemu_loglevel_mask(LOG_TRACE)) { |
6816 | struct timeval _now; |
6817 | gettimeofday(&_now, NULL); |
6818 | qemu_log("%d@%zu.%06zu:lsi_execute_script_io_set " "Set%s%s%s%s" "\n" , |
6819 | qemu_get_thread_id(), |
6820 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6821 | , atn, ack, tm, cc); |
6822 | } |
6823 | } |
6824 | |
6825 | static inline void trace_lsi_execute_script_io_set(const char * atn, const char * ack, const char * tm, const char * cc) |
6826 | { |
6827 | if (true) { |
6828 | _nocheck__trace_lsi_execute_script_io_set(atn, ack, tm, cc); |
6829 | } |
6830 | } |
6831 | |
6832 | #define TRACE_LSI_EXECUTE_SCRIPT_IO_CLEAR_BACKEND_DSTATE() ( \ |
6833 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_IO_CLEAR) || \ |
6834 | false) |
6835 | |
6836 | static inline void _nocheck__trace_lsi_execute_script_io_clear(const char * atn, const char * ack, const char * tm, const char * cc) |
6837 | { |
6838 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_IO_CLEAR) && qemu_loglevel_mask(LOG_TRACE)) { |
6839 | struct timeval _now; |
6840 | gettimeofday(&_now, NULL); |
6841 | qemu_log("%d@%zu.%06zu:lsi_execute_script_io_clear " "Clear%s%s%s%s" "\n" , |
6842 | qemu_get_thread_id(), |
6843 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6844 | , atn, ack, tm, cc); |
6845 | } |
6846 | } |
6847 | |
6848 | static inline void trace_lsi_execute_script_io_clear(const char * atn, const char * ack, const char * tm, const char * cc) |
6849 | { |
6850 | if (true) { |
6851 | _nocheck__trace_lsi_execute_script_io_clear(atn, ack, tm, cc); |
6852 | } |
6853 | } |
6854 | |
6855 | #define TRACE_LSI_EXECUTE_SCRIPT_IO_OPCODE_BACKEND_DSTATE() ( \ |
6856 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_IO_OPCODE) || \ |
6857 | false) |
6858 | |
6859 | static inline void _nocheck__trace_lsi_execute_script_io_opcode(const char * opcode, int reg, const char * opname, uint8_t data8, uint32_t sfbr, const char * ssfbr) |
6860 | { |
6861 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_IO_OPCODE) && qemu_loglevel_mask(LOG_TRACE)) { |
6862 | struct timeval _now; |
6863 | gettimeofday(&_now, NULL); |
6864 | qemu_log("%d@%zu.%06zu:lsi_execute_script_io_opcode " "%s reg 0x%x %s data8=0x%02x sfbr=0x%02x%s" "\n" , |
6865 | qemu_get_thread_id(), |
6866 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6867 | , opcode, reg, opname, data8, sfbr, ssfbr); |
6868 | } |
6869 | } |
6870 | |
6871 | static inline void trace_lsi_execute_script_io_opcode(const char * opcode, int reg, const char * opname, uint8_t data8, uint32_t sfbr, const char * ssfbr) |
6872 | { |
6873 | if (true) { |
6874 | _nocheck__trace_lsi_execute_script_io_opcode(opcode, reg, opname, data8, sfbr, ssfbr); |
6875 | } |
6876 | } |
6877 | |
6878 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_NOP_BACKEND_DSTATE() ( \ |
6879 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_TC_NOP) || \ |
6880 | false) |
6881 | |
6882 | static inline void _nocheck__trace_lsi_execute_script_tc_nop(void) |
6883 | { |
6884 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_TC_NOP) && qemu_loglevel_mask(LOG_TRACE)) { |
6885 | struct timeval _now; |
6886 | gettimeofday(&_now, NULL); |
6887 | qemu_log("%d@%zu.%06zu:lsi_execute_script_tc_nop " "NOP" "\n" , |
6888 | qemu_get_thread_id(), |
6889 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6890 | ); |
6891 | } |
6892 | } |
6893 | |
6894 | static inline void trace_lsi_execute_script_tc_nop(void) |
6895 | { |
6896 | if (true) { |
6897 | _nocheck__trace_lsi_execute_script_tc_nop(); |
6898 | } |
6899 | } |
6900 | |
6901 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_DELAYEDSELECT_TIMEOUT_BACKEND_DSTATE() ( \ |
6902 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_TC_DELAYEDSELECT_TIMEOUT) || \ |
6903 | false) |
6904 | |
6905 | static inline void _nocheck__trace_lsi_execute_script_tc_delayedselect_timeout(void) |
6906 | { |
6907 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_TC_DELAYEDSELECT_TIMEOUT) && qemu_loglevel_mask(LOG_TRACE)) { |
6908 | struct timeval _now; |
6909 | gettimeofday(&_now, NULL); |
6910 | qemu_log("%d@%zu.%06zu:lsi_execute_script_tc_delayedselect_timeout " "Delayed select timeout" "\n" , |
6911 | qemu_get_thread_id(), |
6912 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6913 | ); |
6914 | } |
6915 | } |
6916 | |
6917 | static inline void trace_lsi_execute_script_tc_delayedselect_timeout(void) |
6918 | { |
6919 | if (true) { |
6920 | _nocheck__trace_lsi_execute_script_tc_delayedselect_timeout(); |
6921 | } |
6922 | } |
6923 | |
6924 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_COMPC_BACKEND_DSTATE() ( \ |
6925 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_TC_COMPC) || \ |
6926 | false) |
6927 | |
6928 | static inline void _nocheck__trace_lsi_execute_script_tc_compc(int result) |
6929 | { |
6930 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_TC_COMPC) && qemu_loglevel_mask(LOG_TRACE)) { |
6931 | struct timeval _now; |
6932 | gettimeofday(&_now, NULL); |
6933 | qemu_log("%d@%zu.%06zu:lsi_execute_script_tc_compc " "Compare carry %d" "\n" , |
6934 | qemu_get_thread_id(), |
6935 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6936 | , result); |
6937 | } |
6938 | } |
6939 | |
6940 | static inline void trace_lsi_execute_script_tc_compc(int result) |
6941 | { |
6942 | if (true) { |
6943 | _nocheck__trace_lsi_execute_script_tc_compc(result); |
6944 | } |
6945 | } |
6946 | |
6947 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_COMPP_BACKEND_DSTATE() ( \ |
6948 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_TC_COMPP) || \ |
6949 | false) |
6950 | |
6951 | static inline void _nocheck__trace_lsi_execute_script_tc_compp(const char * phase, char op, const char * insn_phase) |
6952 | { |
6953 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_TC_COMPP) && qemu_loglevel_mask(LOG_TRACE)) { |
6954 | struct timeval _now; |
6955 | gettimeofday(&_now, NULL); |
6956 | qemu_log("%d@%zu.%06zu:lsi_execute_script_tc_compp " "Compare phase %s %c= %s" "\n" , |
6957 | qemu_get_thread_id(), |
6958 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6959 | , phase, op, insn_phase); |
6960 | } |
6961 | } |
6962 | |
6963 | static inline void trace_lsi_execute_script_tc_compp(const char * phase, char op, const char * insn_phase) |
6964 | { |
6965 | if (true) { |
6966 | _nocheck__trace_lsi_execute_script_tc_compp(phase, op, insn_phase); |
6967 | } |
6968 | } |
6969 | |
6970 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_COMPD_BACKEND_DSTATE() ( \ |
6971 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_TC_COMPD) || \ |
6972 | false) |
6973 | |
6974 | static inline void _nocheck__trace_lsi_execute_script_tc_compd(uint32_t sfbr, uint8_t mask, char op, int result) |
6975 | { |
6976 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_TC_COMPD) && qemu_loglevel_mask(LOG_TRACE)) { |
6977 | struct timeval _now; |
6978 | gettimeofday(&_now, NULL); |
6979 | qemu_log("%d@%zu.%06zu:lsi_execute_script_tc_compd " "Compare data 0x%" PRIx32" & 0x%x %c= 0x%x" "\n" , |
6980 | qemu_get_thread_id(), |
6981 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
6982 | , sfbr, mask, op, result); |
6983 | } |
6984 | } |
6985 | |
6986 | static inline void trace_lsi_execute_script_tc_compd(uint32_t sfbr, uint8_t mask, char op, int result) |
6987 | { |
6988 | if (true) { |
6989 | _nocheck__trace_lsi_execute_script_tc_compd(sfbr, mask, op, result); |
6990 | } |
6991 | } |
6992 | |
6993 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_JUMP_BACKEND_DSTATE() ( \ |
6994 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_TC_JUMP) || \ |
6995 | false) |
6996 | |
6997 | static inline void _nocheck__trace_lsi_execute_script_tc_jump(uint32_t addr) |
6998 | { |
6999 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_TC_JUMP) && qemu_loglevel_mask(LOG_TRACE)) { |
7000 | struct timeval _now; |
7001 | gettimeofday(&_now, NULL); |
7002 | qemu_log("%d@%zu.%06zu:lsi_execute_script_tc_jump " "Jump to 0x%" PRIx32 "\n" , |
7003 | qemu_get_thread_id(), |
7004 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7005 | , addr); |
7006 | } |
7007 | } |
7008 | |
7009 | static inline void trace_lsi_execute_script_tc_jump(uint32_t addr) |
7010 | { |
7011 | if (true) { |
7012 | _nocheck__trace_lsi_execute_script_tc_jump(addr); |
7013 | } |
7014 | } |
7015 | |
7016 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_CALL_BACKEND_DSTATE() ( \ |
7017 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_TC_CALL) || \ |
7018 | false) |
7019 | |
7020 | static inline void _nocheck__trace_lsi_execute_script_tc_call(uint32_t addr) |
7021 | { |
7022 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_TC_CALL) && qemu_loglevel_mask(LOG_TRACE)) { |
7023 | struct timeval _now; |
7024 | gettimeofday(&_now, NULL); |
7025 | qemu_log("%d@%zu.%06zu:lsi_execute_script_tc_call " "Call 0x%" PRIx32 "\n" , |
7026 | qemu_get_thread_id(), |
7027 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7028 | , addr); |
7029 | } |
7030 | } |
7031 | |
7032 | static inline void trace_lsi_execute_script_tc_call(uint32_t addr) |
7033 | { |
7034 | if (true) { |
7035 | _nocheck__trace_lsi_execute_script_tc_call(addr); |
7036 | } |
7037 | } |
7038 | |
7039 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_RETURN_BACKEND_DSTATE() ( \ |
7040 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_TC_RETURN) || \ |
7041 | false) |
7042 | |
7043 | static inline void _nocheck__trace_lsi_execute_script_tc_return(uint32_t addr) |
7044 | { |
7045 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_TC_RETURN) && qemu_loglevel_mask(LOG_TRACE)) { |
7046 | struct timeval _now; |
7047 | gettimeofday(&_now, NULL); |
7048 | qemu_log("%d@%zu.%06zu:lsi_execute_script_tc_return " "Return to 0x%" PRIx32 "\n" , |
7049 | qemu_get_thread_id(), |
7050 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7051 | , addr); |
7052 | } |
7053 | } |
7054 | |
7055 | static inline void trace_lsi_execute_script_tc_return(uint32_t addr) |
7056 | { |
7057 | if (true) { |
7058 | _nocheck__trace_lsi_execute_script_tc_return(addr); |
7059 | } |
7060 | } |
7061 | |
7062 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_INTERRUPT_BACKEND_DSTATE() ( \ |
7063 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_TC_INTERRUPT) || \ |
7064 | false) |
7065 | |
7066 | static inline void _nocheck__trace_lsi_execute_script_tc_interrupt(uint32_t addr) |
7067 | { |
7068 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_TC_INTERRUPT) && qemu_loglevel_mask(LOG_TRACE)) { |
7069 | struct timeval _now; |
7070 | gettimeofday(&_now, NULL); |
7071 | qemu_log("%d@%zu.%06zu:lsi_execute_script_tc_interrupt " "Interrupt 0x%" PRIx32 "\n" , |
7072 | qemu_get_thread_id(), |
7073 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7074 | , addr); |
7075 | } |
7076 | } |
7077 | |
7078 | static inline void trace_lsi_execute_script_tc_interrupt(uint32_t addr) |
7079 | { |
7080 | if (true) { |
7081 | _nocheck__trace_lsi_execute_script_tc_interrupt(addr); |
7082 | } |
7083 | } |
7084 | |
7085 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_ILLEGAL_BACKEND_DSTATE() ( \ |
7086 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_TC_ILLEGAL) || \ |
7087 | false) |
7088 | |
7089 | static inline void _nocheck__trace_lsi_execute_script_tc_illegal(void) |
7090 | { |
7091 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_TC_ILLEGAL) && qemu_loglevel_mask(LOG_TRACE)) { |
7092 | struct timeval _now; |
7093 | gettimeofday(&_now, NULL); |
7094 | qemu_log("%d@%zu.%06zu:lsi_execute_script_tc_illegal " "Illegal transfer control" "\n" , |
7095 | qemu_get_thread_id(), |
7096 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7097 | ); |
7098 | } |
7099 | } |
7100 | |
7101 | static inline void trace_lsi_execute_script_tc_illegal(void) |
7102 | { |
7103 | if (true) { |
7104 | _nocheck__trace_lsi_execute_script_tc_illegal(); |
7105 | } |
7106 | } |
7107 | |
7108 | #define TRACE_LSI_EXECUTE_SCRIPT_TC_CC_FAILED_BACKEND_DSTATE() ( \ |
7109 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_TC_CC_FAILED) || \ |
7110 | false) |
7111 | |
7112 | static inline void _nocheck__trace_lsi_execute_script_tc_cc_failed(void) |
7113 | { |
7114 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_TC_CC_FAILED) && qemu_loglevel_mask(LOG_TRACE)) { |
7115 | struct timeval _now; |
7116 | gettimeofday(&_now, NULL); |
7117 | qemu_log("%d@%zu.%06zu:lsi_execute_script_tc_cc_failed " "Control condition failed" "\n" , |
7118 | qemu_get_thread_id(), |
7119 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7120 | ); |
7121 | } |
7122 | } |
7123 | |
7124 | static inline void trace_lsi_execute_script_tc_cc_failed(void) |
7125 | { |
7126 | if (true) { |
7127 | _nocheck__trace_lsi_execute_script_tc_cc_failed(); |
7128 | } |
7129 | } |
7130 | |
7131 | #define TRACE_LSI_EXECUTE_SCRIPT_MM_LOAD_BACKEND_DSTATE() ( \ |
7132 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_MM_LOAD) || \ |
7133 | false) |
7134 | |
7135 | static inline void _nocheck__trace_lsi_execute_script_mm_load(int reg, int n, uint32_t addr, int data) |
7136 | { |
7137 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_MM_LOAD) && qemu_loglevel_mask(LOG_TRACE)) { |
7138 | struct timeval _now; |
7139 | gettimeofday(&_now, NULL); |
7140 | qemu_log("%d@%zu.%06zu:lsi_execute_script_mm_load " "Load reg 0x%x size %d addr 0x%" PRIx32" = 0x%08x" "\n" , |
7141 | qemu_get_thread_id(), |
7142 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7143 | , reg, n, addr, data); |
7144 | } |
7145 | } |
7146 | |
7147 | static inline void trace_lsi_execute_script_mm_load(int reg, int n, uint32_t addr, int data) |
7148 | { |
7149 | if (true) { |
7150 | _nocheck__trace_lsi_execute_script_mm_load(reg, n, addr, data); |
7151 | } |
7152 | } |
7153 | |
7154 | #define TRACE_LSI_EXECUTE_SCRIPT_MM_STORE_BACKEND_DSTATE() ( \ |
7155 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_MM_STORE) || \ |
7156 | false) |
7157 | |
7158 | static inline void _nocheck__trace_lsi_execute_script_mm_store(int reg, int n, uint32_t addr) |
7159 | { |
7160 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_MM_STORE) && qemu_loglevel_mask(LOG_TRACE)) { |
7161 | struct timeval _now; |
7162 | gettimeofday(&_now, NULL); |
7163 | qemu_log("%d@%zu.%06zu:lsi_execute_script_mm_store " "Store reg 0x%x size %d addr 0x%" PRIx32 "\n" , |
7164 | qemu_get_thread_id(), |
7165 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7166 | , reg, n, addr); |
7167 | } |
7168 | } |
7169 | |
7170 | static inline void trace_lsi_execute_script_mm_store(int reg, int n, uint32_t addr) |
7171 | { |
7172 | if (true) { |
7173 | _nocheck__trace_lsi_execute_script_mm_store(reg, n, addr); |
7174 | } |
7175 | } |
7176 | |
7177 | #define TRACE_LSI_EXECUTE_SCRIPT_STOP_BACKEND_DSTATE() ( \ |
7178 | trace_event_get_state_dynamic_by_id(TRACE_LSI_EXECUTE_SCRIPT_STOP) || \ |
7179 | false) |
7180 | |
7181 | static inline void _nocheck__trace_lsi_execute_script_stop(void) |
7182 | { |
7183 | if (trace_event_get_state(TRACE_LSI_EXECUTE_SCRIPT_STOP) && qemu_loglevel_mask(LOG_TRACE)) { |
7184 | struct timeval _now; |
7185 | gettimeofday(&_now, NULL); |
7186 | qemu_log("%d@%zu.%06zu:lsi_execute_script_stop " "SCRIPTS execution stopped" "\n" , |
7187 | qemu_get_thread_id(), |
7188 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7189 | ); |
7190 | } |
7191 | } |
7192 | |
7193 | static inline void trace_lsi_execute_script_stop(void) |
7194 | { |
7195 | if (true) { |
7196 | _nocheck__trace_lsi_execute_script_stop(); |
7197 | } |
7198 | } |
7199 | |
7200 | #define TRACE_LSI_AWOKEN_BACKEND_DSTATE() ( \ |
7201 | trace_event_get_state_dynamic_by_id(TRACE_LSI_AWOKEN) || \ |
7202 | false) |
7203 | |
7204 | static inline void _nocheck__trace_lsi_awoken(void) |
7205 | { |
7206 | if (trace_event_get_state(TRACE_LSI_AWOKEN) && qemu_loglevel_mask(LOG_TRACE)) { |
7207 | struct timeval _now; |
7208 | gettimeofday(&_now, NULL); |
7209 | qemu_log("%d@%zu.%06zu:lsi_awoken " "Woken by SIGP" "\n" , |
7210 | qemu_get_thread_id(), |
7211 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7212 | ); |
7213 | } |
7214 | } |
7215 | |
7216 | static inline void trace_lsi_awoken(void) |
7217 | { |
7218 | if (true) { |
7219 | _nocheck__trace_lsi_awoken(); |
7220 | } |
7221 | } |
7222 | |
7223 | #define TRACE_LSI_REG_READ_BACKEND_DSTATE() ( \ |
7224 | trace_event_get_state_dynamic_by_id(TRACE_LSI_REG_READ) || \ |
7225 | false) |
7226 | |
7227 | static inline void _nocheck__trace_lsi_reg_read(const char * name, int offset, uint8_t ret) |
7228 | { |
7229 | if (trace_event_get_state(TRACE_LSI_REG_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
7230 | struct timeval _now; |
7231 | gettimeofday(&_now, NULL); |
7232 | qemu_log("%d@%zu.%06zu:lsi_reg_read " "Read reg %s 0x%x = 0x%02x" "\n" , |
7233 | qemu_get_thread_id(), |
7234 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7235 | , name, offset, ret); |
7236 | } |
7237 | } |
7238 | |
7239 | static inline void trace_lsi_reg_read(const char * name, int offset, uint8_t ret) |
7240 | { |
7241 | if (true) { |
7242 | _nocheck__trace_lsi_reg_read(name, offset, ret); |
7243 | } |
7244 | } |
7245 | |
7246 | #define TRACE_LSI_REG_WRITE_BACKEND_DSTATE() ( \ |
7247 | trace_event_get_state_dynamic_by_id(TRACE_LSI_REG_WRITE) || \ |
7248 | false) |
7249 | |
7250 | static inline void _nocheck__trace_lsi_reg_write(const char * name, int offset, uint8_t val) |
7251 | { |
7252 | if (trace_event_get_state(TRACE_LSI_REG_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
7253 | struct timeval _now; |
7254 | gettimeofday(&_now, NULL); |
7255 | qemu_log("%d@%zu.%06zu:lsi_reg_write " "Write reg %s 0x%x = 0x%02x" "\n" , |
7256 | qemu_get_thread_id(), |
7257 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7258 | , name, offset, val); |
7259 | } |
7260 | } |
7261 | |
7262 | static inline void trace_lsi_reg_write(const char * name, int offset, uint8_t val) |
7263 | { |
7264 | if (true) { |
7265 | _nocheck__trace_lsi_reg_write(name, offset, val); |
7266 | } |
7267 | } |
7268 | |
7269 | #define TRACE_SCSI_DISK_CHECK_CONDITION_BACKEND_DSTATE() ( \ |
7270 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_CHECK_CONDITION) || \ |
7271 | false) |
7272 | |
7273 | static inline void _nocheck__trace_scsi_disk_check_condition(uint32_t tag, uint8_t key, uint8_t asc, uint8_t ascq) |
7274 | { |
7275 | if (trace_event_get_state(TRACE_SCSI_DISK_CHECK_CONDITION) && qemu_loglevel_mask(LOG_TRACE)) { |
7276 | struct timeval _now; |
7277 | gettimeofday(&_now, NULL); |
7278 | qemu_log("%d@%zu.%06zu:scsi_disk_check_condition " "Command complete tag=0x%x sense=%d/%d/%d" "\n" , |
7279 | qemu_get_thread_id(), |
7280 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7281 | , tag, key, asc, ascq); |
7282 | } |
7283 | } |
7284 | |
7285 | static inline void trace_scsi_disk_check_condition(uint32_t tag, uint8_t key, uint8_t asc, uint8_t ascq) |
7286 | { |
7287 | if (true) { |
7288 | _nocheck__trace_scsi_disk_check_condition(tag, key, asc, ascq); |
7289 | } |
7290 | } |
7291 | |
7292 | #define TRACE_SCSI_DISK_READ_COMPLETE_BACKEND_DSTATE() ( \ |
7293 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_READ_COMPLETE) || \ |
7294 | false) |
7295 | |
7296 | static inline void _nocheck__trace_scsi_disk_read_complete(uint32_t tag, size_t size) |
7297 | { |
7298 | if (trace_event_get_state(TRACE_SCSI_DISK_READ_COMPLETE) && qemu_loglevel_mask(LOG_TRACE)) { |
7299 | struct timeval _now; |
7300 | gettimeofday(&_now, NULL); |
7301 | qemu_log("%d@%zu.%06zu:scsi_disk_read_complete " "Data ready tag=0x%x len=%zd" "\n" , |
7302 | qemu_get_thread_id(), |
7303 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7304 | , tag, size); |
7305 | } |
7306 | } |
7307 | |
7308 | static inline void trace_scsi_disk_read_complete(uint32_t tag, size_t size) |
7309 | { |
7310 | if (true) { |
7311 | _nocheck__trace_scsi_disk_read_complete(tag, size); |
7312 | } |
7313 | } |
7314 | |
7315 | #define TRACE_SCSI_DISK_READ_DATA_COUNT_BACKEND_DSTATE() ( \ |
7316 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_READ_DATA_COUNT) || \ |
7317 | false) |
7318 | |
7319 | static inline void _nocheck__trace_scsi_disk_read_data_count(uint32_t sector_count) |
7320 | { |
7321 | if (trace_event_get_state(TRACE_SCSI_DISK_READ_DATA_COUNT) && qemu_loglevel_mask(LOG_TRACE)) { |
7322 | struct timeval _now; |
7323 | gettimeofday(&_now, NULL); |
7324 | qemu_log("%d@%zu.%06zu:scsi_disk_read_data_count " "Read sector_count=%d" "\n" , |
7325 | qemu_get_thread_id(), |
7326 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7327 | , sector_count); |
7328 | } |
7329 | } |
7330 | |
7331 | static inline void trace_scsi_disk_read_data_count(uint32_t sector_count) |
7332 | { |
7333 | if (true) { |
7334 | _nocheck__trace_scsi_disk_read_data_count(sector_count); |
7335 | } |
7336 | } |
7337 | |
7338 | #define TRACE_SCSI_DISK_READ_DATA_INVALID_BACKEND_DSTATE() ( \ |
7339 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_READ_DATA_INVALID) || \ |
7340 | false) |
7341 | |
7342 | static inline void _nocheck__trace_scsi_disk_read_data_invalid(void) |
7343 | { |
7344 | if (trace_event_get_state(TRACE_SCSI_DISK_READ_DATA_INVALID) && qemu_loglevel_mask(LOG_TRACE)) { |
7345 | struct timeval _now; |
7346 | gettimeofday(&_now, NULL); |
7347 | qemu_log("%d@%zu.%06zu:scsi_disk_read_data_invalid " "Data transfer direction invalid" "\n" , |
7348 | qemu_get_thread_id(), |
7349 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7350 | ); |
7351 | } |
7352 | } |
7353 | |
7354 | static inline void trace_scsi_disk_read_data_invalid(void) |
7355 | { |
7356 | if (true) { |
7357 | _nocheck__trace_scsi_disk_read_data_invalid(); |
7358 | } |
7359 | } |
7360 | |
7361 | #define TRACE_SCSI_DISK_WRITE_COMPLETE_NOIO_BACKEND_DSTATE() ( \ |
7362 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_WRITE_COMPLETE_NOIO) || \ |
7363 | false) |
7364 | |
7365 | static inline void _nocheck__trace_scsi_disk_write_complete_noio(uint32_t tag, size_t size) |
7366 | { |
7367 | if (trace_event_get_state(TRACE_SCSI_DISK_WRITE_COMPLETE_NOIO) && qemu_loglevel_mask(LOG_TRACE)) { |
7368 | struct timeval _now; |
7369 | gettimeofday(&_now, NULL); |
7370 | qemu_log("%d@%zu.%06zu:scsi_disk_write_complete_noio " "Write complete tag=0x%x more=%zd" "\n" , |
7371 | qemu_get_thread_id(), |
7372 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7373 | , tag, size); |
7374 | } |
7375 | } |
7376 | |
7377 | static inline void trace_scsi_disk_write_complete_noio(uint32_t tag, size_t size) |
7378 | { |
7379 | if (true) { |
7380 | _nocheck__trace_scsi_disk_write_complete_noio(tag, size); |
7381 | } |
7382 | } |
7383 | |
7384 | #define TRACE_SCSI_DISK_WRITE_DATA_INVALID_BACKEND_DSTATE() ( \ |
7385 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_WRITE_DATA_INVALID) || \ |
7386 | false) |
7387 | |
7388 | static inline void _nocheck__trace_scsi_disk_write_data_invalid(void) |
7389 | { |
7390 | if (trace_event_get_state(TRACE_SCSI_DISK_WRITE_DATA_INVALID) && qemu_loglevel_mask(LOG_TRACE)) { |
7391 | struct timeval _now; |
7392 | gettimeofday(&_now, NULL); |
7393 | qemu_log("%d@%zu.%06zu:scsi_disk_write_data_invalid " "Data transfer direction invalid" "\n" , |
7394 | qemu_get_thread_id(), |
7395 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7396 | ); |
7397 | } |
7398 | } |
7399 | |
7400 | static inline void trace_scsi_disk_write_data_invalid(void) |
7401 | { |
7402 | if (true) { |
7403 | _nocheck__trace_scsi_disk_write_data_invalid(); |
7404 | } |
7405 | } |
7406 | |
7407 | #define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_00_BACKEND_DSTATE() ( \ |
7408 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_EMULATE_VPD_PAGE_00) || \ |
7409 | false) |
7410 | |
7411 | static inline void _nocheck__trace_scsi_disk_emulate_vpd_page_00(size_t xfer) |
7412 | { |
7413 | if (trace_event_get_state(TRACE_SCSI_DISK_EMULATE_VPD_PAGE_00) && qemu_loglevel_mask(LOG_TRACE)) { |
7414 | struct timeval _now; |
7415 | gettimeofday(&_now, NULL); |
7416 | qemu_log("%d@%zu.%06zu:scsi_disk_emulate_vpd_page_00 " "Inquiry EVPD[Supported pages] buffer size %zd" "\n" , |
7417 | qemu_get_thread_id(), |
7418 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7419 | , xfer); |
7420 | } |
7421 | } |
7422 | |
7423 | static inline void trace_scsi_disk_emulate_vpd_page_00(size_t xfer) |
7424 | { |
7425 | if (true) { |
7426 | _nocheck__trace_scsi_disk_emulate_vpd_page_00(xfer); |
7427 | } |
7428 | } |
7429 | |
7430 | #define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_80_NOT_SUPPORTED_BACKEND_DSTATE() ( \ |
7431 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_EMULATE_VPD_PAGE_80_NOT_SUPPORTED) || \ |
7432 | false) |
7433 | |
7434 | static inline void _nocheck__trace_scsi_disk_emulate_vpd_page_80_not_supported(void) |
7435 | { |
7436 | if (trace_event_get_state(TRACE_SCSI_DISK_EMULATE_VPD_PAGE_80_NOT_SUPPORTED) && qemu_loglevel_mask(LOG_TRACE)) { |
7437 | struct timeval _now; |
7438 | gettimeofday(&_now, NULL); |
7439 | qemu_log("%d@%zu.%06zu:scsi_disk_emulate_vpd_page_80_not_supported " "Inquiry (EVPD[Serial number] not supported" "\n" , |
7440 | qemu_get_thread_id(), |
7441 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7442 | ); |
7443 | } |
7444 | } |
7445 | |
7446 | static inline void trace_scsi_disk_emulate_vpd_page_80_not_supported(void) |
7447 | { |
7448 | if (true) { |
7449 | _nocheck__trace_scsi_disk_emulate_vpd_page_80_not_supported(); |
7450 | } |
7451 | } |
7452 | |
7453 | #define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_80_BACKEND_DSTATE() ( \ |
7454 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_EMULATE_VPD_PAGE_80) || \ |
7455 | false) |
7456 | |
7457 | static inline void _nocheck__trace_scsi_disk_emulate_vpd_page_80(size_t xfer) |
7458 | { |
7459 | if (trace_event_get_state(TRACE_SCSI_DISK_EMULATE_VPD_PAGE_80) && qemu_loglevel_mask(LOG_TRACE)) { |
7460 | struct timeval _now; |
7461 | gettimeofday(&_now, NULL); |
7462 | qemu_log("%d@%zu.%06zu:scsi_disk_emulate_vpd_page_80 " "Inquiry EVPD[Serial number] buffer size %zd" "\n" , |
7463 | qemu_get_thread_id(), |
7464 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7465 | , xfer); |
7466 | } |
7467 | } |
7468 | |
7469 | static inline void trace_scsi_disk_emulate_vpd_page_80(size_t xfer) |
7470 | { |
7471 | if (true) { |
7472 | _nocheck__trace_scsi_disk_emulate_vpd_page_80(xfer); |
7473 | } |
7474 | } |
7475 | |
7476 | #define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_83_BACKEND_DSTATE() ( \ |
7477 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_EMULATE_VPD_PAGE_83) || \ |
7478 | false) |
7479 | |
7480 | static inline void _nocheck__trace_scsi_disk_emulate_vpd_page_83(size_t xfer) |
7481 | { |
7482 | if (trace_event_get_state(TRACE_SCSI_DISK_EMULATE_VPD_PAGE_83) && qemu_loglevel_mask(LOG_TRACE)) { |
7483 | struct timeval _now; |
7484 | gettimeofday(&_now, NULL); |
7485 | qemu_log("%d@%zu.%06zu:scsi_disk_emulate_vpd_page_83 " "Inquiry EVPD[Device identification] buffer size %zd" "\n" , |
7486 | qemu_get_thread_id(), |
7487 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7488 | , xfer); |
7489 | } |
7490 | } |
7491 | |
7492 | static inline void trace_scsi_disk_emulate_vpd_page_83(size_t xfer) |
7493 | { |
7494 | if (true) { |
7495 | _nocheck__trace_scsi_disk_emulate_vpd_page_83(xfer); |
7496 | } |
7497 | } |
7498 | |
7499 | #define TRACE_SCSI_DISK_EMULATE_VPD_PAGE_B0_NOT_SUPPORTED_BACKEND_DSTATE() ( \ |
7500 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_EMULATE_VPD_PAGE_B0_NOT_SUPPORTED) || \ |
7501 | false) |
7502 | |
7503 | static inline void _nocheck__trace_scsi_disk_emulate_vpd_page_b0_not_supported(void) |
7504 | { |
7505 | if (trace_event_get_state(TRACE_SCSI_DISK_EMULATE_VPD_PAGE_B0_NOT_SUPPORTED) && qemu_loglevel_mask(LOG_TRACE)) { |
7506 | struct timeval _now; |
7507 | gettimeofday(&_now, NULL); |
7508 | qemu_log("%d@%zu.%06zu:scsi_disk_emulate_vpd_page_b0_not_supported " "Inquiry (EVPD[Block limits] not supported for CDROM" "\n" , |
7509 | qemu_get_thread_id(), |
7510 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7511 | ); |
7512 | } |
7513 | } |
7514 | |
7515 | static inline void trace_scsi_disk_emulate_vpd_page_b0_not_supported(void) |
7516 | { |
7517 | if (true) { |
7518 | _nocheck__trace_scsi_disk_emulate_vpd_page_b0_not_supported(); |
7519 | } |
7520 | } |
7521 | |
7522 | #define TRACE_SCSI_DISK_EMULATE_MODE_SENSE_BACKEND_DSTATE() ( \ |
7523 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_EMULATE_MODE_SENSE) || \ |
7524 | false) |
7525 | |
7526 | static inline void _nocheck__trace_scsi_disk_emulate_mode_sense(int cmd, int page, size_t xfer, int control) |
7527 | { |
7528 | if (trace_event_get_state(TRACE_SCSI_DISK_EMULATE_MODE_SENSE) && qemu_loglevel_mask(LOG_TRACE)) { |
7529 | struct timeval _now; |
7530 | gettimeofday(&_now, NULL); |
7531 | qemu_log("%d@%zu.%06zu:scsi_disk_emulate_mode_sense " "Mode Sense(%d) (page %d, xfer %zd, page_control %d)" "\n" , |
7532 | qemu_get_thread_id(), |
7533 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7534 | , cmd, page, xfer, control); |
7535 | } |
7536 | } |
7537 | |
7538 | static inline void trace_scsi_disk_emulate_mode_sense(int cmd, int page, size_t xfer, int control) |
7539 | { |
7540 | if (true) { |
7541 | _nocheck__trace_scsi_disk_emulate_mode_sense(cmd, page, xfer, control); |
7542 | } |
7543 | } |
7544 | |
7545 | #define TRACE_SCSI_DISK_EMULATE_READ_TOC_BACKEND_DSTATE() ( \ |
7546 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_EMULATE_READ_TOC) || \ |
7547 | false) |
7548 | |
7549 | static inline void _nocheck__trace_scsi_disk_emulate_read_toc(int start_track, int format, int msf) |
7550 | { |
7551 | if (trace_event_get_state(TRACE_SCSI_DISK_EMULATE_READ_TOC) && qemu_loglevel_mask(LOG_TRACE)) { |
7552 | struct timeval _now; |
7553 | gettimeofday(&_now, NULL); |
7554 | qemu_log("%d@%zu.%06zu:scsi_disk_emulate_read_toc " "Read TOC (track %d format %d msf %d)" "\n" , |
7555 | qemu_get_thread_id(), |
7556 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7557 | , start_track, format, msf); |
7558 | } |
7559 | } |
7560 | |
7561 | static inline void trace_scsi_disk_emulate_read_toc(int start_track, int format, int msf) |
7562 | { |
7563 | if (true) { |
7564 | _nocheck__trace_scsi_disk_emulate_read_toc(start_track, format, msf); |
7565 | } |
7566 | } |
7567 | |
7568 | #define TRACE_SCSI_DISK_EMULATE_READ_DATA_BACKEND_DSTATE() ( \ |
7569 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_EMULATE_READ_DATA) || \ |
7570 | false) |
7571 | |
7572 | static inline void _nocheck__trace_scsi_disk_emulate_read_data(int buflen) |
7573 | { |
7574 | if (trace_event_get_state(TRACE_SCSI_DISK_EMULATE_READ_DATA) && qemu_loglevel_mask(LOG_TRACE)) { |
7575 | struct timeval _now; |
7576 | gettimeofday(&_now, NULL); |
7577 | qemu_log("%d@%zu.%06zu:scsi_disk_emulate_read_data " "Read buf_len=%d" "\n" , |
7578 | qemu_get_thread_id(), |
7579 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7580 | , buflen); |
7581 | } |
7582 | } |
7583 | |
7584 | static inline void trace_scsi_disk_emulate_read_data(int buflen) |
7585 | { |
7586 | if (true) { |
7587 | _nocheck__trace_scsi_disk_emulate_read_data(buflen); |
7588 | } |
7589 | } |
7590 | |
7591 | #define TRACE_SCSI_DISK_EMULATE_WRITE_DATA_BACKEND_DSTATE() ( \ |
7592 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_EMULATE_WRITE_DATA) || \ |
7593 | false) |
7594 | |
7595 | static inline void _nocheck__trace_scsi_disk_emulate_write_data(int buflen) |
7596 | { |
7597 | if (trace_event_get_state(TRACE_SCSI_DISK_EMULATE_WRITE_DATA) && qemu_loglevel_mask(LOG_TRACE)) { |
7598 | struct timeval _now; |
7599 | gettimeofday(&_now, NULL); |
7600 | qemu_log("%d@%zu.%06zu:scsi_disk_emulate_write_data " "Write buf_len=%d" "\n" , |
7601 | qemu_get_thread_id(), |
7602 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7603 | , buflen); |
7604 | } |
7605 | } |
7606 | |
7607 | static inline void trace_scsi_disk_emulate_write_data(int buflen) |
7608 | { |
7609 | if (true) { |
7610 | _nocheck__trace_scsi_disk_emulate_write_data(buflen); |
7611 | } |
7612 | } |
7613 | |
7614 | #define TRACE_SCSI_DISK_EMULATE_COMMAND_SAI_16_BACKEND_DSTATE() ( \ |
7615 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_EMULATE_COMMAND_SAI_16) || \ |
7616 | false) |
7617 | |
7618 | static inline void _nocheck__trace_scsi_disk_emulate_command_SAI_16(void) |
7619 | { |
7620 | if (trace_event_get_state(TRACE_SCSI_DISK_EMULATE_COMMAND_SAI_16) && qemu_loglevel_mask(LOG_TRACE)) { |
7621 | struct timeval _now; |
7622 | gettimeofday(&_now, NULL); |
7623 | qemu_log("%d@%zu.%06zu:scsi_disk_emulate_command_SAI_16 " "SAI READ CAPACITY(16)" "\n" , |
7624 | qemu_get_thread_id(), |
7625 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7626 | ); |
7627 | } |
7628 | } |
7629 | |
7630 | static inline void trace_scsi_disk_emulate_command_SAI_16(void) |
7631 | { |
7632 | if (true) { |
7633 | _nocheck__trace_scsi_disk_emulate_command_SAI_16(); |
7634 | } |
7635 | } |
7636 | |
7637 | #define TRACE_SCSI_DISK_EMULATE_COMMAND_SAI_UNSUPPORTED_BACKEND_DSTATE() ( \ |
7638 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_EMULATE_COMMAND_SAI_UNSUPPORTED) || \ |
7639 | false) |
7640 | |
7641 | static inline void _nocheck__trace_scsi_disk_emulate_command_SAI_unsupported(void) |
7642 | { |
7643 | if (trace_event_get_state(TRACE_SCSI_DISK_EMULATE_COMMAND_SAI_UNSUPPORTED) && qemu_loglevel_mask(LOG_TRACE)) { |
7644 | struct timeval _now; |
7645 | gettimeofday(&_now, NULL); |
7646 | qemu_log("%d@%zu.%06zu:scsi_disk_emulate_command_SAI_unsupported " "Unsupported Service Action In" "\n" , |
7647 | qemu_get_thread_id(), |
7648 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7649 | ); |
7650 | } |
7651 | } |
7652 | |
7653 | static inline void trace_scsi_disk_emulate_command_SAI_unsupported(void) |
7654 | { |
7655 | if (true) { |
7656 | _nocheck__trace_scsi_disk_emulate_command_SAI_unsupported(); |
7657 | } |
7658 | } |
7659 | |
7660 | #define TRACE_SCSI_DISK_EMULATE_COMMAND_SEEK_10_BACKEND_DSTATE() ( \ |
7661 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_EMULATE_COMMAND_SEEK_10) || \ |
7662 | false) |
7663 | |
7664 | static inline void _nocheck__trace_scsi_disk_emulate_command_SEEK_10(uint64_t lba) |
7665 | { |
7666 | if (trace_event_get_state(TRACE_SCSI_DISK_EMULATE_COMMAND_SEEK_10) && qemu_loglevel_mask(LOG_TRACE)) { |
7667 | struct timeval _now; |
7668 | gettimeofday(&_now, NULL); |
7669 | qemu_log("%d@%zu.%06zu:scsi_disk_emulate_command_SEEK_10 " "Seek(10) (sector %" PRId64 ")" "\n" , |
7670 | qemu_get_thread_id(), |
7671 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7672 | , lba); |
7673 | } |
7674 | } |
7675 | |
7676 | static inline void trace_scsi_disk_emulate_command_SEEK_10(uint64_t lba) |
7677 | { |
7678 | if (true) { |
7679 | _nocheck__trace_scsi_disk_emulate_command_SEEK_10(lba); |
7680 | } |
7681 | } |
7682 | |
7683 | #define TRACE_SCSI_DISK_EMULATE_COMMAND_MODE_SELECT_BACKEND_DSTATE() ( \ |
7684 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_EMULATE_COMMAND_MODE_SELECT) || \ |
7685 | false) |
7686 | |
7687 | static inline void _nocheck__trace_scsi_disk_emulate_command_MODE_SELECT(size_t xfer) |
7688 | { |
7689 | if (trace_event_get_state(TRACE_SCSI_DISK_EMULATE_COMMAND_MODE_SELECT) && qemu_loglevel_mask(LOG_TRACE)) { |
7690 | struct timeval _now; |
7691 | gettimeofday(&_now, NULL); |
7692 | qemu_log("%d@%zu.%06zu:scsi_disk_emulate_command_MODE_SELECT " "Mode Select(6) (len %zd)" "\n" , |
7693 | qemu_get_thread_id(), |
7694 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7695 | , xfer); |
7696 | } |
7697 | } |
7698 | |
7699 | static inline void trace_scsi_disk_emulate_command_MODE_SELECT(size_t xfer) |
7700 | { |
7701 | if (true) { |
7702 | _nocheck__trace_scsi_disk_emulate_command_MODE_SELECT(xfer); |
7703 | } |
7704 | } |
7705 | |
7706 | #define TRACE_SCSI_DISK_EMULATE_COMMAND_MODE_SELECT_10_BACKEND_DSTATE() ( \ |
7707 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_EMULATE_COMMAND_MODE_SELECT_10) || \ |
7708 | false) |
7709 | |
7710 | static inline void _nocheck__trace_scsi_disk_emulate_command_MODE_SELECT_10(size_t xfer) |
7711 | { |
7712 | if (trace_event_get_state(TRACE_SCSI_DISK_EMULATE_COMMAND_MODE_SELECT_10) && qemu_loglevel_mask(LOG_TRACE)) { |
7713 | struct timeval _now; |
7714 | gettimeofday(&_now, NULL); |
7715 | qemu_log("%d@%zu.%06zu:scsi_disk_emulate_command_MODE_SELECT_10 " "Mode Select(10) (len %zd)" "\n" , |
7716 | qemu_get_thread_id(), |
7717 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7718 | , xfer); |
7719 | } |
7720 | } |
7721 | |
7722 | static inline void trace_scsi_disk_emulate_command_MODE_SELECT_10(size_t xfer) |
7723 | { |
7724 | if (true) { |
7725 | _nocheck__trace_scsi_disk_emulate_command_MODE_SELECT_10(xfer); |
7726 | } |
7727 | } |
7728 | |
7729 | #define TRACE_SCSI_DISK_EMULATE_COMMAND_UNMAP_BACKEND_DSTATE() ( \ |
7730 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_EMULATE_COMMAND_UNMAP) || \ |
7731 | false) |
7732 | |
7733 | static inline void _nocheck__trace_scsi_disk_emulate_command_UNMAP(size_t xfer) |
7734 | { |
7735 | if (trace_event_get_state(TRACE_SCSI_DISK_EMULATE_COMMAND_UNMAP) && qemu_loglevel_mask(LOG_TRACE)) { |
7736 | struct timeval _now; |
7737 | gettimeofday(&_now, NULL); |
7738 | qemu_log("%d@%zu.%06zu:scsi_disk_emulate_command_UNMAP " "Unmap (len %zd)" "\n" , |
7739 | qemu_get_thread_id(), |
7740 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7741 | , xfer); |
7742 | } |
7743 | } |
7744 | |
7745 | static inline void trace_scsi_disk_emulate_command_UNMAP(size_t xfer) |
7746 | { |
7747 | if (true) { |
7748 | _nocheck__trace_scsi_disk_emulate_command_UNMAP(xfer); |
7749 | } |
7750 | } |
7751 | |
7752 | #define TRACE_SCSI_DISK_EMULATE_COMMAND_VERIFY_BACKEND_DSTATE() ( \ |
7753 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_EMULATE_COMMAND_VERIFY) || \ |
7754 | false) |
7755 | |
7756 | static inline void _nocheck__trace_scsi_disk_emulate_command_VERIFY(int bytchk) |
7757 | { |
7758 | if (trace_event_get_state(TRACE_SCSI_DISK_EMULATE_COMMAND_VERIFY) && qemu_loglevel_mask(LOG_TRACE)) { |
7759 | struct timeval _now; |
7760 | gettimeofday(&_now, NULL); |
7761 | qemu_log("%d@%zu.%06zu:scsi_disk_emulate_command_VERIFY " "Verify (bytchk %d)" "\n" , |
7762 | qemu_get_thread_id(), |
7763 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7764 | , bytchk); |
7765 | } |
7766 | } |
7767 | |
7768 | static inline void trace_scsi_disk_emulate_command_VERIFY(int bytchk) |
7769 | { |
7770 | if (true) { |
7771 | _nocheck__trace_scsi_disk_emulate_command_VERIFY(bytchk); |
7772 | } |
7773 | } |
7774 | |
7775 | #define TRACE_SCSI_DISK_EMULATE_COMMAND_WRITE_SAME_BACKEND_DSTATE() ( \ |
7776 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_EMULATE_COMMAND_WRITE_SAME) || \ |
7777 | false) |
7778 | |
7779 | static inline void _nocheck__trace_scsi_disk_emulate_command_WRITE_SAME(int cmd, size_t xfer) |
7780 | { |
7781 | if (trace_event_get_state(TRACE_SCSI_DISK_EMULATE_COMMAND_WRITE_SAME) && qemu_loglevel_mask(LOG_TRACE)) { |
7782 | struct timeval _now; |
7783 | gettimeofday(&_now, NULL); |
7784 | qemu_log("%d@%zu.%06zu:scsi_disk_emulate_command_WRITE_SAME " "WRITE SAME %d (len %zd)" "\n" , |
7785 | qemu_get_thread_id(), |
7786 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7787 | , cmd, xfer); |
7788 | } |
7789 | } |
7790 | |
7791 | static inline void trace_scsi_disk_emulate_command_WRITE_SAME(int cmd, size_t xfer) |
7792 | { |
7793 | if (true) { |
7794 | _nocheck__trace_scsi_disk_emulate_command_WRITE_SAME(cmd, xfer); |
7795 | } |
7796 | } |
7797 | |
7798 | #define TRACE_SCSI_DISK_EMULATE_COMMAND_UNKNOWN_BACKEND_DSTATE() ( \ |
7799 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_EMULATE_COMMAND_UNKNOWN) || \ |
7800 | false) |
7801 | |
7802 | static inline void _nocheck__trace_scsi_disk_emulate_command_UNKNOWN(int cmd, const char * name) |
7803 | { |
7804 | if (trace_event_get_state(TRACE_SCSI_DISK_EMULATE_COMMAND_UNKNOWN) && qemu_loglevel_mask(LOG_TRACE)) { |
7805 | struct timeval _now; |
7806 | gettimeofday(&_now, NULL); |
7807 | qemu_log("%d@%zu.%06zu:scsi_disk_emulate_command_UNKNOWN " "Unknown SCSI command (0x%2.2x=%s)" "\n" , |
7808 | qemu_get_thread_id(), |
7809 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7810 | , cmd, name); |
7811 | } |
7812 | } |
7813 | |
7814 | static inline void trace_scsi_disk_emulate_command_UNKNOWN(int cmd, const char * name) |
7815 | { |
7816 | if (true) { |
7817 | _nocheck__trace_scsi_disk_emulate_command_UNKNOWN(cmd, name); |
7818 | } |
7819 | } |
7820 | |
7821 | #define TRACE_SCSI_DISK_DMA_COMMAND_READ_BACKEND_DSTATE() ( \ |
7822 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_DMA_COMMAND_READ) || \ |
7823 | false) |
7824 | |
7825 | static inline void _nocheck__trace_scsi_disk_dma_command_READ(uint64_t lba, uint32_t len) |
7826 | { |
7827 | if (trace_event_get_state(TRACE_SCSI_DISK_DMA_COMMAND_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
7828 | struct timeval _now; |
7829 | gettimeofday(&_now, NULL); |
7830 | qemu_log("%d@%zu.%06zu:scsi_disk_dma_command_READ " "Read (sector %" PRId64 ", count %u)" "\n" , |
7831 | qemu_get_thread_id(), |
7832 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7833 | , lba, len); |
7834 | } |
7835 | } |
7836 | |
7837 | static inline void trace_scsi_disk_dma_command_READ(uint64_t lba, uint32_t len) |
7838 | { |
7839 | if (true) { |
7840 | _nocheck__trace_scsi_disk_dma_command_READ(lba, len); |
7841 | } |
7842 | } |
7843 | |
7844 | #define TRACE_SCSI_DISK_DMA_COMMAND_WRITE_BACKEND_DSTATE() ( \ |
7845 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_DMA_COMMAND_WRITE) || \ |
7846 | false) |
7847 | |
7848 | static inline void _nocheck__trace_scsi_disk_dma_command_WRITE(const char * cmd, uint64_t lba, int len) |
7849 | { |
7850 | if (trace_event_get_state(TRACE_SCSI_DISK_DMA_COMMAND_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
7851 | struct timeval _now; |
7852 | gettimeofday(&_now, NULL); |
7853 | qemu_log("%d@%zu.%06zu:scsi_disk_dma_command_WRITE " "Write %s(sector %" PRId64 ", count %u)" "\n" , |
7854 | qemu_get_thread_id(), |
7855 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7856 | , cmd, lba, len); |
7857 | } |
7858 | } |
7859 | |
7860 | static inline void trace_scsi_disk_dma_command_WRITE(const char * cmd, uint64_t lba, int len) |
7861 | { |
7862 | if (true) { |
7863 | _nocheck__trace_scsi_disk_dma_command_WRITE(cmd, lba, len); |
7864 | } |
7865 | } |
7866 | |
7867 | #define TRACE_SCSI_DISK_NEW_REQUEST_BACKEND_DSTATE() ( \ |
7868 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_DISK_NEW_REQUEST) || \ |
7869 | false) |
7870 | |
7871 | static inline void _nocheck__trace_scsi_disk_new_request(uint32_t lun, uint32_t tag, const char * line) |
7872 | { |
7873 | if (trace_event_get_state(TRACE_SCSI_DISK_NEW_REQUEST) && qemu_loglevel_mask(LOG_TRACE)) { |
7874 | struct timeval _now; |
7875 | gettimeofday(&_now, NULL); |
7876 | qemu_log("%d@%zu.%06zu:scsi_disk_new_request " "Command: lun=%d tag=0x%x data=%s" "\n" , |
7877 | qemu_get_thread_id(), |
7878 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7879 | , lun, tag, line); |
7880 | } |
7881 | } |
7882 | |
7883 | static inline void trace_scsi_disk_new_request(uint32_t lun, uint32_t tag, const char * line) |
7884 | { |
7885 | if (true) { |
7886 | _nocheck__trace_scsi_disk_new_request(lun, tag, line); |
7887 | } |
7888 | } |
7889 | |
7890 | #define TRACE_SCSI_GENERIC_COMMAND_COMPLETE_NOIO_BACKEND_DSTATE() ( \ |
7891 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_GENERIC_COMMAND_COMPLETE_NOIO) || \ |
7892 | false) |
7893 | |
7894 | static inline void _nocheck__trace_scsi_generic_command_complete_noio(void * req, uint32_t tag, int statuc) |
7895 | { |
7896 | if (trace_event_get_state(TRACE_SCSI_GENERIC_COMMAND_COMPLETE_NOIO) && qemu_loglevel_mask(LOG_TRACE)) { |
7897 | struct timeval _now; |
7898 | gettimeofday(&_now, NULL); |
7899 | qemu_log("%d@%zu.%06zu:scsi_generic_command_complete_noio " "Command complete %p tag=0x%x status=%d" "\n" , |
7900 | qemu_get_thread_id(), |
7901 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7902 | , req, tag, statuc); |
7903 | } |
7904 | } |
7905 | |
7906 | static inline void trace_scsi_generic_command_complete_noio(void * req, uint32_t tag, int statuc) |
7907 | { |
7908 | if (true) { |
7909 | _nocheck__trace_scsi_generic_command_complete_noio(req, tag, statuc); |
7910 | } |
7911 | } |
7912 | |
7913 | #define TRACE_SCSI_GENERIC_READ_COMPLETE_BACKEND_DSTATE() ( \ |
7914 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_GENERIC_READ_COMPLETE) || \ |
7915 | false) |
7916 | |
7917 | static inline void _nocheck__trace_scsi_generic_read_complete(uint32_t tag, int len) |
7918 | { |
7919 | if (trace_event_get_state(TRACE_SCSI_GENERIC_READ_COMPLETE) && qemu_loglevel_mask(LOG_TRACE)) { |
7920 | struct timeval _now; |
7921 | gettimeofday(&_now, NULL); |
7922 | qemu_log("%d@%zu.%06zu:scsi_generic_read_complete " "Data ready tag=0x%x len=%d" "\n" , |
7923 | qemu_get_thread_id(), |
7924 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7925 | , tag, len); |
7926 | } |
7927 | } |
7928 | |
7929 | static inline void trace_scsi_generic_read_complete(uint32_t tag, int len) |
7930 | { |
7931 | if (true) { |
7932 | _nocheck__trace_scsi_generic_read_complete(tag, len); |
7933 | } |
7934 | } |
7935 | |
7936 | #define TRACE_SCSI_GENERIC_READ_DATA_BACKEND_DSTATE() ( \ |
7937 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_GENERIC_READ_DATA) || \ |
7938 | false) |
7939 | |
7940 | static inline void _nocheck__trace_scsi_generic_read_data(uint32_t tag) |
7941 | { |
7942 | if (trace_event_get_state(TRACE_SCSI_GENERIC_READ_DATA) && qemu_loglevel_mask(LOG_TRACE)) { |
7943 | struct timeval _now; |
7944 | gettimeofday(&_now, NULL); |
7945 | qemu_log("%d@%zu.%06zu:scsi_generic_read_data " "scsi_read_data tag=0x%x" "\n" , |
7946 | qemu_get_thread_id(), |
7947 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7948 | , tag); |
7949 | } |
7950 | } |
7951 | |
7952 | static inline void trace_scsi_generic_read_data(uint32_t tag) |
7953 | { |
7954 | if (true) { |
7955 | _nocheck__trace_scsi_generic_read_data(tag); |
7956 | } |
7957 | } |
7958 | |
7959 | #define TRACE_SCSI_GENERIC_WRITE_COMPLETE_BACKEND_DSTATE() ( \ |
7960 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_GENERIC_WRITE_COMPLETE) || \ |
7961 | false) |
7962 | |
7963 | static inline void _nocheck__trace_scsi_generic_write_complete(int ret) |
7964 | { |
7965 | if (trace_event_get_state(TRACE_SCSI_GENERIC_WRITE_COMPLETE) && qemu_loglevel_mask(LOG_TRACE)) { |
7966 | struct timeval _now; |
7967 | gettimeofday(&_now, NULL); |
7968 | qemu_log("%d@%zu.%06zu:scsi_generic_write_complete " "scsi_write_complete() ret = %d" "\n" , |
7969 | qemu_get_thread_id(), |
7970 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7971 | , ret); |
7972 | } |
7973 | } |
7974 | |
7975 | static inline void trace_scsi_generic_write_complete(int ret) |
7976 | { |
7977 | if (true) { |
7978 | _nocheck__trace_scsi_generic_write_complete(ret); |
7979 | } |
7980 | } |
7981 | |
7982 | #define TRACE_SCSI_GENERIC_WRITE_COMPLETE_BLOCKSIZE_BACKEND_DSTATE() ( \ |
7983 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_GENERIC_WRITE_COMPLETE_BLOCKSIZE) || \ |
7984 | false) |
7985 | |
7986 | static inline void _nocheck__trace_scsi_generic_write_complete_blocksize(int blocksize) |
7987 | { |
7988 | if (trace_event_get_state(TRACE_SCSI_GENERIC_WRITE_COMPLETE_BLOCKSIZE) && qemu_loglevel_mask(LOG_TRACE)) { |
7989 | struct timeval _now; |
7990 | gettimeofday(&_now, NULL); |
7991 | qemu_log("%d@%zu.%06zu:scsi_generic_write_complete_blocksize " "block size %d" "\n" , |
7992 | qemu_get_thread_id(), |
7993 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
7994 | , blocksize); |
7995 | } |
7996 | } |
7997 | |
7998 | static inline void trace_scsi_generic_write_complete_blocksize(int blocksize) |
7999 | { |
8000 | if (true) { |
8001 | _nocheck__trace_scsi_generic_write_complete_blocksize(blocksize); |
8002 | } |
8003 | } |
8004 | |
8005 | #define TRACE_SCSI_GENERIC_WRITE_DATA_BACKEND_DSTATE() ( \ |
8006 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_GENERIC_WRITE_DATA) || \ |
8007 | false) |
8008 | |
8009 | static inline void _nocheck__trace_scsi_generic_write_data(uint32_t tag) |
8010 | { |
8011 | if (trace_event_get_state(TRACE_SCSI_GENERIC_WRITE_DATA) && qemu_loglevel_mask(LOG_TRACE)) { |
8012 | struct timeval _now; |
8013 | gettimeofday(&_now, NULL); |
8014 | qemu_log("%d@%zu.%06zu:scsi_generic_write_data " "scsi_write_data tag=0x%x" "\n" , |
8015 | qemu_get_thread_id(), |
8016 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
8017 | , tag); |
8018 | } |
8019 | } |
8020 | |
8021 | static inline void trace_scsi_generic_write_data(uint32_t tag) |
8022 | { |
8023 | if (true) { |
8024 | _nocheck__trace_scsi_generic_write_data(tag); |
8025 | } |
8026 | } |
8027 | |
8028 | #define TRACE_SCSI_GENERIC_SEND_COMMAND_BACKEND_DSTATE() ( \ |
8029 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_GENERIC_SEND_COMMAND) || \ |
8030 | false) |
8031 | |
8032 | static inline void _nocheck__trace_scsi_generic_send_command(const char * line) |
8033 | { |
8034 | if (trace_event_get_state(TRACE_SCSI_GENERIC_SEND_COMMAND) && qemu_loglevel_mask(LOG_TRACE)) { |
8035 | struct timeval _now; |
8036 | gettimeofday(&_now, NULL); |
8037 | qemu_log("%d@%zu.%06zu:scsi_generic_send_command " "Command: data=%s" "\n" , |
8038 | qemu_get_thread_id(), |
8039 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
8040 | , line); |
8041 | } |
8042 | } |
8043 | |
8044 | static inline void trace_scsi_generic_send_command(const char * line) |
8045 | { |
8046 | if (true) { |
8047 | _nocheck__trace_scsi_generic_send_command(line); |
8048 | } |
8049 | } |
8050 | |
8051 | #define TRACE_SCSI_GENERIC_REALIZE_TYPE_BACKEND_DSTATE() ( \ |
8052 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_GENERIC_REALIZE_TYPE) || \ |
8053 | false) |
8054 | |
8055 | static inline void _nocheck__trace_scsi_generic_realize_type(int type) |
8056 | { |
8057 | if (trace_event_get_state(TRACE_SCSI_GENERIC_REALIZE_TYPE) && qemu_loglevel_mask(LOG_TRACE)) { |
8058 | struct timeval _now; |
8059 | gettimeofday(&_now, NULL); |
8060 | qemu_log("%d@%zu.%06zu:scsi_generic_realize_type " "device type %d" "\n" , |
8061 | qemu_get_thread_id(), |
8062 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
8063 | , type); |
8064 | } |
8065 | } |
8066 | |
8067 | static inline void trace_scsi_generic_realize_type(int type) |
8068 | { |
8069 | if (true) { |
8070 | _nocheck__trace_scsi_generic_realize_type(type); |
8071 | } |
8072 | } |
8073 | |
8074 | #define TRACE_SCSI_GENERIC_REALIZE_BLOCKSIZE_BACKEND_DSTATE() ( \ |
8075 | trace_event_get_state_dynamic_by_id(TRACE_SCSI_GENERIC_REALIZE_BLOCKSIZE) || \ |
8076 | false) |
8077 | |
8078 | static inline void _nocheck__trace_scsi_generic_realize_blocksize(int blocksize) |
8079 | { |
8080 | if (trace_event_get_state(TRACE_SCSI_GENERIC_REALIZE_BLOCKSIZE) && qemu_loglevel_mask(LOG_TRACE)) { |
8081 | struct timeval _now; |
8082 | gettimeofday(&_now, NULL); |
8083 | qemu_log("%d@%zu.%06zu:scsi_generic_realize_blocksize " "block size %d" "\n" , |
8084 | qemu_get_thread_id(), |
8085 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
8086 | , blocksize); |
8087 | } |
8088 | } |
8089 | |
8090 | static inline void trace_scsi_generic_realize_blocksize(int blocksize) |
8091 | { |
8092 | if (true) { |
8093 | _nocheck__trace_scsi_generic_realize_blocksize(blocksize); |
8094 | } |
8095 | } |
8096 | #endif /* TRACE_HW_SCSI_GENERATED_TRACERS_H */ |
8097 | |