1 | /* This file is autogenerated by tracetool, do not edit. */ |
2 | |
3 | #ifndef TRACE_HW_SD_GENERATED_TRACERS_H |
4 | #define TRACE_HW_SD_GENERATED_TRACERS_H |
5 | |
6 | #include "trace/control.h" |
7 | |
8 | extern TraceEvent _TRACE_BCM2835_SDHOST_READ_EVENT; |
9 | extern TraceEvent _TRACE_BCM2835_SDHOST_WRITE_EVENT; |
10 | extern TraceEvent _TRACE_BCM2835_SDHOST_EDM_CHANGE_EVENT; |
11 | extern TraceEvent _TRACE_BCM2835_SDHOST_UPDATE_IRQ_EVENT; |
12 | extern TraceEvent _TRACE_SDBUS_COMMAND_EVENT; |
13 | extern TraceEvent _TRACE_SDBUS_READ_EVENT; |
14 | extern TraceEvent _TRACE_SDBUS_WRITE_EVENT; |
15 | extern TraceEvent _TRACE_SDBUS_SET_VOLTAGE_EVENT; |
16 | extern TraceEvent _TRACE_SDBUS_GET_DAT_LINES_EVENT; |
17 | extern TraceEvent _TRACE_SDBUS_GET_CMD_LINE_EVENT; |
18 | extern TraceEvent _TRACE_SDHCI_SET_INSERTED_EVENT; |
19 | extern TraceEvent _TRACE_SDHCI_SEND_COMMAND_EVENT; |
20 | extern TraceEvent _TRACE_SDHCI_ERROR_EVENT; |
21 | extern TraceEvent _TRACE_SDHCI_RESPONSE4_EVENT; |
22 | extern TraceEvent _TRACE_SDHCI_RESPONSE16_EVENT; |
23 | extern TraceEvent _TRACE_SDHCI_END_TRANSFER_EVENT; |
24 | extern TraceEvent _TRACE_SDHCI_ADMA_EVENT; |
25 | extern TraceEvent _TRACE_SDHCI_ADMA_LOOP_EVENT; |
26 | extern TraceEvent _TRACE_SDHCI_ADMA_TRANSFER_COMPLETED_EVENT; |
27 | extern TraceEvent _TRACE_SDHCI_ACCESS_EVENT; |
28 | extern TraceEvent _TRACE_SDHCI_READ_DATAPORT_EVENT; |
29 | extern TraceEvent _TRACE_SDHCI_WRITE_DATAPORT_EVENT; |
30 | extern TraceEvent _TRACE_SDHCI_CAPAREG_EVENT; |
31 | extern TraceEvent _TRACE_SDCARD_NORMAL_COMMAND_EVENT; |
32 | extern TraceEvent _TRACE_SDCARD_APP_COMMAND_EVENT; |
33 | extern TraceEvent _TRACE_SDCARD_RESPONSE_EVENT; |
34 | extern TraceEvent _TRACE_SDCARD_POWERUP_EVENT; |
35 | extern TraceEvent _TRACE_SDCARD_INQUIRY_CMD41_EVENT; |
36 | extern TraceEvent _TRACE_SDCARD_RESET_EVENT; |
37 | extern TraceEvent _TRACE_SDCARD_SET_BLOCKLEN_EVENT; |
38 | extern TraceEvent _TRACE_SDCARD_INSERTED_EVENT; |
39 | extern TraceEvent _TRACE_SDCARD_EJECTED_EVENT; |
40 | extern TraceEvent _TRACE_SDCARD_ERASE_EVENT; |
41 | extern TraceEvent _TRACE_SDCARD_LOCK_EVENT; |
42 | extern TraceEvent _TRACE_SDCARD_UNLOCK_EVENT; |
43 | extern TraceEvent _TRACE_SDCARD_READ_BLOCK_EVENT; |
44 | extern TraceEvent _TRACE_SDCARD_WRITE_BLOCK_EVENT; |
45 | extern TraceEvent _TRACE_SDCARD_WRITE_DATA_EVENT; |
46 | extern TraceEvent _TRACE_SDCARD_READ_DATA_EVENT; |
47 | extern TraceEvent _TRACE_SDCARD_SET_VOLTAGE_EVENT; |
48 | extern TraceEvent _TRACE_MILKYMIST_MEMCARD_MEMORY_READ_EVENT; |
49 | extern TraceEvent _TRACE_MILKYMIST_MEMCARD_MEMORY_WRITE_EVENT; |
50 | extern TraceEvent _TRACE_PXA2XX_MMCI_READ_EVENT; |
51 | extern TraceEvent _TRACE_PXA2XX_MMCI_WRITE_EVENT; |
52 | extern uint16_t _TRACE_BCM2835_SDHOST_READ_DSTATE; |
53 | extern uint16_t _TRACE_BCM2835_SDHOST_WRITE_DSTATE; |
54 | extern uint16_t _TRACE_BCM2835_SDHOST_EDM_CHANGE_DSTATE; |
55 | extern uint16_t _TRACE_BCM2835_SDHOST_UPDATE_IRQ_DSTATE; |
56 | extern uint16_t _TRACE_SDBUS_COMMAND_DSTATE; |
57 | extern uint16_t _TRACE_SDBUS_READ_DSTATE; |
58 | extern uint16_t _TRACE_SDBUS_WRITE_DSTATE; |
59 | extern uint16_t _TRACE_SDBUS_SET_VOLTAGE_DSTATE; |
60 | extern uint16_t _TRACE_SDBUS_GET_DAT_LINES_DSTATE; |
61 | extern uint16_t _TRACE_SDBUS_GET_CMD_LINE_DSTATE; |
62 | extern uint16_t _TRACE_SDHCI_SET_INSERTED_DSTATE; |
63 | extern uint16_t _TRACE_SDHCI_SEND_COMMAND_DSTATE; |
64 | extern uint16_t _TRACE_SDHCI_ERROR_DSTATE; |
65 | extern uint16_t _TRACE_SDHCI_RESPONSE4_DSTATE; |
66 | extern uint16_t _TRACE_SDHCI_RESPONSE16_DSTATE; |
67 | extern uint16_t _TRACE_SDHCI_END_TRANSFER_DSTATE; |
68 | extern uint16_t _TRACE_SDHCI_ADMA_DSTATE; |
69 | extern uint16_t _TRACE_SDHCI_ADMA_LOOP_DSTATE; |
70 | extern uint16_t _TRACE_SDHCI_ADMA_TRANSFER_COMPLETED_DSTATE; |
71 | extern uint16_t _TRACE_SDHCI_ACCESS_DSTATE; |
72 | extern uint16_t _TRACE_SDHCI_READ_DATAPORT_DSTATE; |
73 | extern uint16_t _TRACE_SDHCI_WRITE_DATAPORT_DSTATE; |
74 | extern uint16_t _TRACE_SDHCI_CAPAREG_DSTATE; |
75 | extern uint16_t _TRACE_SDCARD_NORMAL_COMMAND_DSTATE; |
76 | extern uint16_t _TRACE_SDCARD_APP_COMMAND_DSTATE; |
77 | extern uint16_t _TRACE_SDCARD_RESPONSE_DSTATE; |
78 | extern uint16_t _TRACE_SDCARD_POWERUP_DSTATE; |
79 | extern uint16_t _TRACE_SDCARD_INQUIRY_CMD41_DSTATE; |
80 | extern uint16_t _TRACE_SDCARD_RESET_DSTATE; |
81 | extern uint16_t _TRACE_SDCARD_SET_BLOCKLEN_DSTATE; |
82 | extern uint16_t _TRACE_SDCARD_INSERTED_DSTATE; |
83 | extern uint16_t _TRACE_SDCARD_EJECTED_DSTATE; |
84 | extern uint16_t _TRACE_SDCARD_ERASE_DSTATE; |
85 | extern uint16_t _TRACE_SDCARD_LOCK_DSTATE; |
86 | extern uint16_t _TRACE_SDCARD_UNLOCK_DSTATE; |
87 | extern uint16_t _TRACE_SDCARD_READ_BLOCK_DSTATE; |
88 | extern uint16_t _TRACE_SDCARD_WRITE_BLOCK_DSTATE; |
89 | extern uint16_t _TRACE_SDCARD_WRITE_DATA_DSTATE; |
90 | extern uint16_t _TRACE_SDCARD_READ_DATA_DSTATE; |
91 | extern uint16_t _TRACE_SDCARD_SET_VOLTAGE_DSTATE; |
92 | extern uint16_t _TRACE_MILKYMIST_MEMCARD_MEMORY_READ_DSTATE; |
93 | extern uint16_t _TRACE_MILKYMIST_MEMCARD_MEMORY_WRITE_DSTATE; |
94 | extern uint16_t _TRACE_PXA2XX_MMCI_READ_DSTATE; |
95 | extern uint16_t _TRACE_PXA2XX_MMCI_WRITE_DSTATE; |
96 | #define TRACE_BCM2835_SDHOST_READ_ENABLED 1 |
97 | #define TRACE_BCM2835_SDHOST_WRITE_ENABLED 1 |
98 | #define TRACE_BCM2835_SDHOST_EDM_CHANGE_ENABLED 1 |
99 | #define TRACE_BCM2835_SDHOST_UPDATE_IRQ_ENABLED 1 |
100 | #define TRACE_SDBUS_COMMAND_ENABLED 1 |
101 | #define TRACE_SDBUS_READ_ENABLED 1 |
102 | #define TRACE_SDBUS_WRITE_ENABLED 1 |
103 | #define TRACE_SDBUS_SET_VOLTAGE_ENABLED 1 |
104 | #define TRACE_SDBUS_GET_DAT_LINES_ENABLED 1 |
105 | #define TRACE_SDBUS_GET_CMD_LINE_ENABLED 1 |
106 | #define TRACE_SDHCI_SET_INSERTED_ENABLED 1 |
107 | #define TRACE_SDHCI_SEND_COMMAND_ENABLED 1 |
108 | #define TRACE_SDHCI_ERROR_ENABLED 1 |
109 | #define TRACE_SDHCI_RESPONSE4_ENABLED 1 |
110 | #define TRACE_SDHCI_RESPONSE16_ENABLED 1 |
111 | #define TRACE_SDHCI_END_TRANSFER_ENABLED 1 |
112 | #define TRACE_SDHCI_ADMA_ENABLED 1 |
113 | #define TRACE_SDHCI_ADMA_LOOP_ENABLED 1 |
114 | #define TRACE_SDHCI_ADMA_TRANSFER_COMPLETED_ENABLED 1 |
115 | #define TRACE_SDHCI_ACCESS_ENABLED 1 |
116 | #define TRACE_SDHCI_READ_DATAPORT_ENABLED 1 |
117 | #define TRACE_SDHCI_WRITE_DATAPORT_ENABLED 1 |
118 | #define TRACE_SDHCI_CAPAREG_ENABLED 1 |
119 | #define TRACE_SDCARD_NORMAL_COMMAND_ENABLED 1 |
120 | #define TRACE_SDCARD_APP_COMMAND_ENABLED 1 |
121 | #define TRACE_SDCARD_RESPONSE_ENABLED 1 |
122 | #define TRACE_SDCARD_POWERUP_ENABLED 1 |
123 | #define TRACE_SDCARD_INQUIRY_CMD41_ENABLED 1 |
124 | #define TRACE_SDCARD_RESET_ENABLED 1 |
125 | #define TRACE_SDCARD_SET_BLOCKLEN_ENABLED 1 |
126 | #define TRACE_SDCARD_INSERTED_ENABLED 1 |
127 | #define TRACE_SDCARD_EJECTED_ENABLED 1 |
128 | #define TRACE_SDCARD_ERASE_ENABLED 1 |
129 | #define TRACE_SDCARD_LOCK_ENABLED 1 |
130 | #define TRACE_SDCARD_UNLOCK_ENABLED 1 |
131 | #define TRACE_SDCARD_READ_BLOCK_ENABLED 1 |
132 | #define TRACE_SDCARD_WRITE_BLOCK_ENABLED 1 |
133 | #define TRACE_SDCARD_WRITE_DATA_ENABLED 1 |
134 | #define TRACE_SDCARD_READ_DATA_ENABLED 1 |
135 | #define TRACE_SDCARD_SET_VOLTAGE_ENABLED 1 |
136 | #define TRACE_MILKYMIST_MEMCARD_MEMORY_READ_ENABLED 1 |
137 | #define TRACE_MILKYMIST_MEMCARD_MEMORY_WRITE_ENABLED 1 |
138 | #define TRACE_PXA2XX_MMCI_READ_ENABLED 1 |
139 | #define TRACE_PXA2XX_MMCI_WRITE_ENABLED 1 |
140 | #include "qemu/log-for-trace.h" |
141 | |
142 | |
143 | #define TRACE_BCM2835_SDHOST_READ_BACKEND_DSTATE() ( \ |
144 | trace_event_get_state_dynamic_by_id(TRACE_BCM2835_SDHOST_READ) || \ |
145 | false) |
146 | |
147 | static inline void _nocheck__trace_bcm2835_sdhost_read(uint64_t offset, uint64_t data, unsigned size) |
148 | { |
149 | if (trace_event_get_state(TRACE_BCM2835_SDHOST_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
150 | struct timeval _now; |
151 | gettimeofday(&_now, NULL); |
152 | qemu_log("%d@%zu.%06zu:bcm2835_sdhost_read " "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" "\n" , |
153 | qemu_get_thread_id(), |
154 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
155 | , offset, data, size); |
156 | } |
157 | } |
158 | |
159 | static inline void trace_bcm2835_sdhost_read(uint64_t offset, uint64_t data, unsigned size) |
160 | { |
161 | if (true) { |
162 | _nocheck__trace_bcm2835_sdhost_read(offset, data, size); |
163 | } |
164 | } |
165 | |
166 | #define TRACE_BCM2835_SDHOST_WRITE_BACKEND_DSTATE() ( \ |
167 | trace_event_get_state_dynamic_by_id(TRACE_BCM2835_SDHOST_WRITE) || \ |
168 | false) |
169 | |
170 | static inline void _nocheck__trace_bcm2835_sdhost_write(uint64_t offset, uint64_t data, unsigned size) |
171 | { |
172 | if (trace_event_get_state(TRACE_BCM2835_SDHOST_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
173 | struct timeval _now; |
174 | gettimeofday(&_now, NULL); |
175 | qemu_log("%d@%zu.%06zu:bcm2835_sdhost_write " "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" "\n" , |
176 | qemu_get_thread_id(), |
177 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
178 | , offset, data, size); |
179 | } |
180 | } |
181 | |
182 | static inline void trace_bcm2835_sdhost_write(uint64_t offset, uint64_t data, unsigned size) |
183 | { |
184 | if (true) { |
185 | _nocheck__trace_bcm2835_sdhost_write(offset, data, size); |
186 | } |
187 | } |
188 | |
189 | #define TRACE_BCM2835_SDHOST_EDM_CHANGE_BACKEND_DSTATE() ( \ |
190 | trace_event_get_state_dynamic_by_id(TRACE_BCM2835_SDHOST_EDM_CHANGE) || \ |
191 | false) |
192 | |
193 | static inline void _nocheck__trace_bcm2835_sdhost_edm_change(const char * why, uint32_t edm) |
194 | { |
195 | if (trace_event_get_state(TRACE_BCM2835_SDHOST_EDM_CHANGE) && qemu_loglevel_mask(LOG_TRACE)) { |
196 | struct timeval _now; |
197 | gettimeofday(&_now, NULL); |
198 | qemu_log("%d@%zu.%06zu:bcm2835_sdhost_edm_change " "(%s) EDM now 0x%x" "\n" , |
199 | qemu_get_thread_id(), |
200 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
201 | , why, edm); |
202 | } |
203 | } |
204 | |
205 | static inline void trace_bcm2835_sdhost_edm_change(const char * why, uint32_t edm) |
206 | { |
207 | if (true) { |
208 | _nocheck__trace_bcm2835_sdhost_edm_change(why, edm); |
209 | } |
210 | } |
211 | |
212 | #define TRACE_BCM2835_SDHOST_UPDATE_IRQ_BACKEND_DSTATE() ( \ |
213 | trace_event_get_state_dynamic_by_id(TRACE_BCM2835_SDHOST_UPDATE_IRQ) || \ |
214 | false) |
215 | |
216 | static inline void _nocheck__trace_bcm2835_sdhost_update_irq(uint32_t irq) |
217 | { |
218 | if (trace_event_get_state(TRACE_BCM2835_SDHOST_UPDATE_IRQ) && qemu_loglevel_mask(LOG_TRACE)) { |
219 | struct timeval _now; |
220 | gettimeofday(&_now, NULL); |
221 | qemu_log("%d@%zu.%06zu:bcm2835_sdhost_update_irq " "IRQ bits 0x%x\n" "\n" , |
222 | qemu_get_thread_id(), |
223 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
224 | , irq); |
225 | } |
226 | } |
227 | |
228 | static inline void trace_bcm2835_sdhost_update_irq(uint32_t irq) |
229 | { |
230 | if (true) { |
231 | _nocheck__trace_bcm2835_sdhost_update_irq(irq); |
232 | } |
233 | } |
234 | |
235 | #define TRACE_SDBUS_COMMAND_BACKEND_DSTATE() ( \ |
236 | trace_event_get_state_dynamic_by_id(TRACE_SDBUS_COMMAND) || \ |
237 | false) |
238 | |
239 | static inline void _nocheck__trace_sdbus_command(const char * bus_name, uint8_t cmd, uint32_t arg) |
240 | { |
241 | if (trace_event_get_state(TRACE_SDBUS_COMMAND) && qemu_loglevel_mask(LOG_TRACE)) { |
242 | struct timeval _now; |
243 | gettimeofday(&_now, NULL); |
244 | qemu_log("%d@%zu.%06zu:sdbus_command " "@%s CMD%02d arg 0x%08x" "\n" , |
245 | qemu_get_thread_id(), |
246 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
247 | , bus_name, cmd, arg); |
248 | } |
249 | } |
250 | |
251 | static inline void trace_sdbus_command(const char * bus_name, uint8_t cmd, uint32_t arg) |
252 | { |
253 | if (true) { |
254 | _nocheck__trace_sdbus_command(bus_name, cmd, arg); |
255 | } |
256 | } |
257 | |
258 | #define TRACE_SDBUS_READ_BACKEND_DSTATE() ( \ |
259 | trace_event_get_state_dynamic_by_id(TRACE_SDBUS_READ) || \ |
260 | false) |
261 | |
262 | static inline void _nocheck__trace_sdbus_read(const char * bus_name, uint8_t value) |
263 | { |
264 | if (trace_event_get_state(TRACE_SDBUS_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
265 | struct timeval _now; |
266 | gettimeofday(&_now, NULL); |
267 | qemu_log("%d@%zu.%06zu:sdbus_read " "@%s value 0x%02x" "\n" , |
268 | qemu_get_thread_id(), |
269 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
270 | , bus_name, value); |
271 | } |
272 | } |
273 | |
274 | static inline void trace_sdbus_read(const char * bus_name, uint8_t value) |
275 | { |
276 | if (true) { |
277 | _nocheck__trace_sdbus_read(bus_name, value); |
278 | } |
279 | } |
280 | |
281 | #define TRACE_SDBUS_WRITE_BACKEND_DSTATE() ( \ |
282 | trace_event_get_state_dynamic_by_id(TRACE_SDBUS_WRITE) || \ |
283 | false) |
284 | |
285 | static inline void _nocheck__trace_sdbus_write(const char * bus_name, uint8_t value) |
286 | { |
287 | if (trace_event_get_state(TRACE_SDBUS_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
288 | struct timeval _now; |
289 | gettimeofday(&_now, NULL); |
290 | qemu_log("%d@%zu.%06zu:sdbus_write " "@%s value 0x%02x" "\n" , |
291 | qemu_get_thread_id(), |
292 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
293 | , bus_name, value); |
294 | } |
295 | } |
296 | |
297 | static inline void trace_sdbus_write(const char * bus_name, uint8_t value) |
298 | { |
299 | if (true) { |
300 | _nocheck__trace_sdbus_write(bus_name, value); |
301 | } |
302 | } |
303 | |
304 | #define TRACE_SDBUS_SET_VOLTAGE_BACKEND_DSTATE() ( \ |
305 | trace_event_get_state_dynamic_by_id(TRACE_SDBUS_SET_VOLTAGE) || \ |
306 | false) |
307 | |
308 | static inline void _nocheck__trace_sdbus_set_voltage(const char * bus_name, uint16_t millivolts) |
309 | { |
310 | if (trace_event_get_state(TRACE_SDBUS_SET_VOLTAGE) && qemu_loglevel_mask(LOG_TRACE)) { |
311 | struct timeval _now; |
312 | gettimeofday(&_now, NULL); |
313 | qemu_log("%d@%zu.%06zu:sdbus_set_voltage " "@%s %u (mV)" "\n" , |
314 | qemu_get_thread_id(), |
315 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
316 | , bus_name, millivolts); |
317 | } |
318 | } |
319 | |
320 | static inline void trace_sdbus_set_voltage(const char * bus_name, uint16_t millivolts) |
321 | { |
322 | if (true) { |
323 | _nocheck__trace_sdbus_set_voltage(bus_name, millivolts); |
324 | } |
325 | } |
326 | |
327 | #define TRACE_SDBUS_GET_DAT_LINES_BACKEND_DSTATE() ( \ |
328 | trace_event_get_state_dynamic_by_id(TRACE_SDBUS_GET_DAT_LINES) || \ |
329 | false) |
330 | |
331 | static inline void _nocheck__trace_sdbus_get_dat_lines(const char * bus_name, uint8_t dat_lines) |
332 | { |
333 | if (trace_event_get_state(TRACE_SDBUS_GET_DAT_LINES) && qemu_loglevel_mask(LOG_TRACE)) { |
334 | struct timeval _now; |
335 | gettimeofday(&_now, NULL); |
336 | qemu_log("%d@%zu.%06zu:sdbus_get_dat_lines " "@%s dat_lines: %u" "\n" , |
337 | qemu_get_thread_id(), |
338 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
339 | , bus_name, dat_lines); |
340 | } |
341 | } |
342 | |
343 | static inline void trace_sdbus_get_dat_lines(const char * bus_name, uint8_t dat_lines) |
344 | { |
345 | if (true) { |
346 | _nocheck__trace_sdbus_get_dat_lines(bus_name, dat_lines); |
347 | } |
348 | } |
349 | |
350 | #define TRACE_SDBUS_GET_CMD_LINE_BACKEND_DSTATE() ( \ |
351 | trace_event_get_state_dynamic_by_id(TRACE_SDBUS_GET_CMD_LINE) || \ |
352 | false) |
353 | |
354 | static inline void _nocheck__trace_sdbus_get_cmd_line(const char * bus_name, bool cmd_line) |
355 | { |
356 | if (trace_event_get_state(TRACE_SDBUS_GET_CMD_LINE) && qemu_loglevel_mask(LOG_TRACE)) { |
357 | struct timeval _now; |
358 | gettimeofday(&_now, NULL); |
359 | qemu_log("%d@%zu.%06zu:sdbus_get_cmd_line " "@%s cmd_line: %u" "\n" , |
360 | qemu_get_thread_id(), |
361 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
362 | , bus_name, cmd_line); |
363 | } |
364 | } |
365 | |
366 | static inline void trace_sdbus_get_cmd_line(const char * bus_name, bool cmd_line) |
367 | { |
368 | if (true) { |
369 | _nocheck__trace_sdbus_get_cmd_line(bus_name, cmd_line); |
370 | } |
371 | } |
372 | |
373 | #define TRACE_SDHCI_SET_INSERTED_BACKEND_DSTATE() ( \ |
374 | trace_event_get_state_dynamic_by_id(TRACE_SDHCI_SET_INSERTED) || \ |
375 | false) |
376 | |
377 | static inline void _nocheck__trace_sdhci_set_inserted(const char * level) |
378 | { |
379 | if (trace_event_get_state(TRACE_SDHCI_SET_INSERTED) && qemu_loglevel_mask(LOG_TRACE)) { |
380 | struct timeval _now; |
381 | gettimeofday(&_now, NULL); |
382 | qemu_log("%d@%zu.%06zu:sdhci_set_inserted " "card state changed: %s" "\n" , |
383 | qemu_get_thread_id(), |
384 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
385 | , level); |
386 | } |
387 | } |
388 | |
389 | static inline void trace_sdhci_set_inserted(const char * level) |
390 | { |
391 | if (true) { |
392 | _nocheck__trace_sdhci_set_inserted(level); |
393 | } |
394 | } |
395 | |
396 | #define TRACE_SDHCI_SEND_COMMAND_BACKEND_DSTATE() ( \ |
397 | trace_event_get_state_dynamic_by_id(TRACE_SDHCI_SEND_COMMAND) || \ |
398 | false) |
399 | |
400 | static inline void _nocheck__trace_sdhci_send_command(uint8_t cmd, uint32_t arg) |
401 | { |
402 | if (trace_event_get_state(TRACE_SDHCI_SEND_COMMAND) && qemu_loglevel_mask(LOG_TRACE)) { |
403 | struct timeval _now; |
404 | gettimeofday(&_now, NULL); |
405 | qemu_log("%d@%zu.%06zu:sdhci_send_command " "CMD%02u ARG[0x%08x]" "\n" , |
406 | qemu_get_thread_id(), |
407 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
408 | , cmd, arg); |
409 | } |
410 | } |
411 | |
412 | static inline void trace_sdhci_send_command(uint8_t cmd, uint32_t arg) |
413 | { |
414 | if (true) { |
415 | _nocheck__trace_sdhci_send_command(cmd, arg); |
416 | } |
417 | } |
418 | |
419 | #define TRACE_SDHCI_ERROR_BACKEND_DSTATE() ( \ |
420 | trace_event_get_state_dynamic_by_id(TRACE_SDHCI_ERROR) || \ |
421 | false) |
422 | |
423 | static inline void _nocheck__trace_sdhci_error(const char * msg) |
424 | { |
425 | if (trace_event_get_state(TRACE_SDHCI_ERROR) && qemu_loglevel_mask(LOG_TRACE)) { |
426 | struct timeval _now; |
427 | gettimeofday(&_now, NULL); |
428 | qemu_log("%d@%zu.%06zu:sdhci_error " "%s" "\n" , |
429 | qemu_get_thread_id(), |
430 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
431 | , msg); |
432 | } |
433 | } |
434 | |
435 | static inline void trace_sdhci_error(const char * msg) |
436 | { |
437 | if (true) { |
438 | _nocheck__trace_sdhci_error(msg); |
439 | } |
440 | } |
441 | |
442 | #define TRACE_SDHCI_RESPONSE4_BACKEND_DSTATE() ( \ |
443 | trace_event_get_state_dynamic_by_id(TRACE_SDHCI_RESPONSE4) || \ |
444 | false) |
445 | |
446 | static inline void _nocheck__trace_sdhci_response4(uint32_t r0) |
447 | { |
448 | if (trace_event_get_state(TRACE_SDHCI_RESPONSE4) && qemu_loglevel_mask(LOG_TRACE)) { |
449 | struct timeval _now; |
450 | gettimeofday(&_now, NULL); |
451 | qemu_log("%d@%zu.%06zu:sdhci_response4 " "RSPREG[31..0]=0x%08x" "\n" , |
452 | qemu_get_thread_id(), |
453 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
454 | , r0); |
455 | } |
456 | } |
457 | |
458 | static inline void trace_sdhci_response4(uint32_t r0) |
459 | { |
460 | if (true) { |
461 | _nocheck__trace_sdhci_response4(r0); |
462 | } |
463 | } |
464 | |
465 | #define TRACE_SDHCI_RESPONSE16_BACKEND_DSTATE() ( \ |
466 | trace_event_get_state_dynamic_by_id(TRACE_SDHCI_RESPONSE16) || \ |
467 | false) |
468 | |
469 | static inline void _nocheck__trace_sdhci_response16(uint32_t r3, uint32_t r2, uint32_t r1, uint32_t r0) |
470 | { |
471 | if (trace_event_get_state(TRACE_SDHCI_RESPONSE16) && qemu_loglevel_mask(LOG_TRACE)) { |
472 | struct timeval _now; |
473 | gettimeofday(&_now, NULL); |
474 | qemu_log("%d@%zu.%06zu:sdhci_response16 " "RSPREG[127..96]=0x%08x, RSPREG[95..64]=0x%08x, RSPREG[63..32]=0x%08x, RSPREG[31..0]=0x%08x" "\n" , |
475 | qemu_get_thread_id(), |
476 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
477 | , r3, r2, r1, r0); |
478 | } |
479 | } |
480 | |
481 | static inline void trace_sdhci_response16(uint32_t r3, uint32_t r2, uint32_t r1, uint32_t r0) |
482 | { |
483 | if (true) { |
484 | _nocheck__trace_sdhci_response16(r3, r2, r1, r0); |
485 | } |
486 | } |
487 | |
488 | #define TRACE_SDHCI_END_TRANSFER_BACKEND_DSTATE() ( \ |
489 | trace_event_get_state_dynamic_by_id(TRACE_SDHCI_END_TRANSFER) || \ |
490 | false) |
491 | |
492 | static inline void _nocheck__trace_sdhci_end_transfer(uint8_t cmd, uint32_t arg) |
493 | { |
494 | if (trace_event_get_state(TRACE_SDHCI_END_TRANSFER) && qemu_loglevel_mask(LOG_TRACE)) { |
495 | struct timeval _now; |
496 | gettimeofday(&_now, NULL); |
497 | qemu_log("%d@%zu.%06zu:sdhci_end_transfer " "Automatically issue CMD%02u 0x%08x" "\n" , |
498 | qemu_get_thread_id(), |
499 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
500 | , cmd, arg); |
501 | } |
502 | } |
503 | |
504 | static inline void trace_sdhci_end_transfer(uint8_t cmd, uint32_t arg) |
505 | { |
506 | if (true) { |
507 | _nocheck__trace_sdhci_end_transfer(cmd, arg); |
508 | } |
509 | } |
510 | |
511 | #define TRACE_SDHCI_ADMA_BACKEND_DSTATE() ( \ |
512 | trace_event_get_state_dynamic_by_id(TRACE_SDHCI_ADMA) || \ |
513 | false) |
514 | |
515 | static inline void _nocheck__trace_sdhci_adma(const char * desc, uint32_t sysad) |
516 | { |
517 | if (trace_event_get_state(TRACE_SDHCI_ADMA) && qemu_loglevel_mask(LOG_TRACE)) { |
518 | struct timeval _now; |
519 | gettimeofday(&_now, NULL); |
520 | qemu_log("%d@%zu.%06zu:sdhci_adma " "%s: admasysaddr=0x%" PRIx32 "\n" , |
521 | qemu_get_thread_id(), |
522 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
523 | , desc, sysad); |
524 | } |
525 | } |
526 | |
527 | static inline void trace_sdhci_adma(const char * desc, uint32_t sysad) |
528 | { |
529 | if (true) { |
530 | _nocheck__trace_sdhci_adma(desc, sysad); |
531 | } |
532 | } |
533 | |
534 | #define TRACE_SDHCI_ADMA_LOOP_BACKEND_DSTATE() ( \ |
535 | trace_event_get_state_dynamic_by_id(TRACE_SDHCI_ADMA_LOOP) || \ |
536 | false) |
537 | |
538 | static inline void _nocheck__trace_sdhci_adma_loop(uint64_t addr, uint16_t length, uint8_t attr) |
539 | { |
540 | if (trace_event_get_state(TRACE_SDHCI_ADMA_LOOP) && qemu_loglevel_mask(LOG_TRACE)) { |
541 | struct timeval _now; |
542 | gettimeofday(&_now, NULL); |
543 | qemu_log("%d@%zu.%06zu:sdhci_adma_loop " "addr=0x%08" PRIx64 ", len=%d, attr=0x%x" "\n" , |
544 | qemu_get_thread_id(), |
545 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
546 | , addr, length, attr); |
547 | } |
548 | } |
549 | |
550 | static inline void trace_sdhci_adma_loop(uint64_t addr, uint16_t length, uint8_t attr) |
551 | { |
552 | if (true) { |
553 | _nocheck__trace_sdhci_adma_loop(addr, length, attr); |
554 | } |
555 | } |
556 | |
557 | #define TRACE_SDHCI_ADMA_TRANSFER_COMPLETED_BACKEND_DSTATE() ( \ |
558 | trace_event_get_state_dynamic_by_id(TRACE_SDHCI_ADMA_TRANSFER_COMPLETED) || \ |
559 | false) |
560 | |
561 | static inline void _nocheck__trace_sdhci_adma_transfer_completed(void) |
562 | { |
563 | if (trace_event_get_state(TRACE_SDHCI_ADMA_TRANSFER_COMPLETED) && qemu_loglevel_mask(LOG_TRACE)) { |
564 | struct timeval _now; |
565 | gettimeofday(&_now, NULL); |
566 | qemu_log("%d@%zu.%06zu:sdhci_adma_transfer_completed " "" "\n" , |
567 | qemu_get_thread_id(), |
568 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
569 | ); |
570 | } |
571 | } |
572 | |
573 | static inline void trace_sdhci_adma_transfer_completed(void) |
574 | { |
575 | if (true) { |
576 | _nocheck__trace_sdhci_adma_transfer_completed(); |
577 | } |
578 | } |
579 | |
580 | #define TRACE_SDHCI_ACCESS_BACKEND_DSTATE() ( \ |
581 | trace_event_get_state_dynamic_by_id(TRACE_SDHCI_ACCESS) || \ |
582 | false) |
583 | |
584 | static inline void _nocheck__trace_sdhci_access(const char * access, unsigned int size, uint64_t offset, const char * dir, uint64_t val, uint64_t val2) |
585 | { |
586 | if (trace_event_get_state(TRACE_SDHCI_ACCESS) && qemu_loglevel_mask(LOG_TRACE)) { |
587 | struct timeval _now; |
588 | gettimeofday(&_now, NULL); |
589 | qemu_log("%d@%zu.%06zu:sdhci_access " "%s%u: addr[0x%04" PRIx64 "] %s 0x%08" PRIx64 " (%" PRIu64 ")" "\n" , |
590 | qemu_get_thread_id(), |
591 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
592 | , access, size, offset, dir, val, val2); |
593 | } |
594 | } |
595 | |
596 | static inline void trace_sdhci_access(const char * access, unsigned int size, uint64_t offset, const char * dir, uint64_t val, uint64_t val2) |
597 | { |
598 | if (true) { |
599 | _nocheck__trace_sdhci_access(access, size, offset, dir, val, val2); |
600 | } |
601 | } |
602 | |
603 | #define TRACE_SDHCI_READ_DATAPORT_BACKEND_DSTATE() ( \ |
604 | trace_event_get_state_dynamic_by_id(TRACE_SDHCI_READ_DATAPORT) || \ |
605 | false) |
606 | |
607 | static inline void _nocheck__trace_sdhci_read_dataport(uint16_t data_count) |
608 | { |
609 | if (trace_event_get_state(TRACE_SDHCI_READ_DATAPORT) && qemu_loglevel_mask(LOG_TRACE)) { |
610 | struct timeval _now; |
611 | gettimeofday(&_now, NULL); |
612 | qemu_log("%d@%zu.%06zu:sdhci_read_dataport " "all %u bytes of data have been read from input buffer" "\n" , |
613 | qemu_get_thread_id(), |
614 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
615 | , data_count); |
616 | } |
617 | } |
618 | |
619 | static inline void trace_sdhci_read_dataport(uint16_t data_count) |
620 | { |
621 | if (true) { |
622 | _nocheck__trace_sdhci_read_dataport(data_count); |
623 | } |
624 | } |
625 | |
626 | #define TRACE_SDHCI_WRITE_DATAPORT_BACKEND_DSTATE() ( \ |
627 | trace_event_get_state_dynamic_by_id(TRACE_SDHCI_WRITE_DATAPORT) || \ |
628 | false) |
629 | |
630 | static inline void _nocheck__trace_sdhci_write_dataport(uint16_t data_count) |
631 | { |
632 | if (trace_event_get_state(TRACE_SDHCI_WRITE_DATAPORT) && qemu_loglevel_mask(LOG_TRACE)) { |
633 | struct timeval _now; |
634 | gettimeofday(&_now, NULL); |
635 | qemu_log("%d@%zu.%06zu:sdhci_write_dataport " "write buffer filled with %u bytes of data" "\n" , |
636 | qemu_get_thread_id(), |
637 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
638 | , data_count); |
639 | } |
640 | } |
641 | |
642 | static inline void trace_sdhci_write_dataport(uint16_t data_count) |
643 | { |
644 | if (true) { |
645 | _nocheck__trace_sdhci_write_dataport(data_count); |
646 | } |
647 | } |
648 | |
649 | #define TRACE_SDHCI_CAPAREG_BACKEND_DSTATE() ( \ |
650 | trace_event_get_state_dynamic_by_id(TRACE_SDHCI_CAPAREG) || \ |
651 | false) |
652 | |
653 | static inline void _nocheck__trace_sdhci_capareg(const char * desc, uint16_t val) |
654 | { |
655 | if (trace_event_get_state(TRACE_SDHCI_CAPAREG) && qemu_loglevel_mask(LOG_TRACE)) { |
656 | struct timeval _now; |
657 | gettimeofday(&_now, NULL); |
658 | qemu_log("%d@%zu.%06zu:sdhci_capareg " "%s: %u" "\n" , |
659 | qemu_get_thread_id(), |
660 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
661 | , desc, val); |
662 | } |
663 | } |
664 | |
665 | static inline void trace_sdhci_capareg(const char * desc, uint16_t val) |
666 | { |
667 | if (true) { |
668 | _nocheck__trace_sdhci_capareg(desc, val); |
669 | } |
670 | } |
671 | |
672 | #define TRACE_SDCARD_NORMAL_COMMAND_BACKEND_DSTATE() ( \ |
673 | trace_event_get_state_dynamic_by_id(TRACE_SDCARD_NORMAL_COMMAND) || \ |
674 | false) |
675 | |
676 | static inline void _nocheck__trace_sdcard_normal_command(const char * proto, const char * cmd_desc, uint8_t cmd, uint32_t arg, const char * state) |
677 | { |
678 | if (trace_event_get_state(TRACE_SDCARD_NORMAL_COMMAND) && qemu_loglevel_mask(LOG_TRACE)) { |
679 | struct timeval _now; |
680 | gettimeofday(&_now, NULL); |
681 | qemu_log("%d@%zu.%06zu:sdcard_normal_command " "%s %20s/ CMD%02d arg 0x%08x (state %s)" "\n" , |
682 | qemu_get_thread_id(), |
683 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
684 | , proto, cmd_desc, cmd, arg, state); |
685 | } |
686 | } |
687 | |
688 | static inline void trace_sdcard_normal_command(const char * proto, const char * cmd_desc, uint8_t cmd, uint32_t arg, const char * state) |
689 | { |
690 | if (true) { |
691 | _nocheck__trace_sdcard_normal_command(proto, cmd_desc, cmd, arg, state); |
692 | } |
693 | } |
694 | |
695 | #define TRACE_SDCARD_APP_COMMAND_BACKEND_DSTATE() ( \ |
696 | trace_event_get_state_dynamic_by_id(TRACE_SDCARD_APP_COMMAND) || \ |
697 | false) |
698 | |
699 | static inline void _nocheck__trace_sdcard_app_command(const char * proto, const char * acmd_desc, uint8_t acmd, uint32_t arg, const char * state) |
700 | { |
701 | if (trace_event_get_state(TRACE_SDCARD_APP_COMMAND) && qemu_loglevel_mask(LOG_TRACE)) { |
702 | struct timeval _now; |
703 | gettimeofday(&_now, NULL); |
704 | qemu_log("%d@%zu.%06zu:sdcard_app_command " "%s %23s/ACMD%02d arg 0x%08x (state %s)" "\n" , |
705 | qemu_get_thread_id(), |
706 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
707 | , proto, acmd_desc, acmd, arg, state); |
708 | } |
709 | } |
710 | |
711 | static inline void trace_sdcard_app_command(const char * proto, const char * acmd_desc, uint8_t acmd, uint32_t arg, const char * state) |
712 | { |
713 | if (true) { |
714 | _nocheck__trace_sdcard_app_command(proto, acmd_desc, acmd, arg, state); |
715 | } |
716 | } |
717 | |
718 | #define TRACE_SDCARD_RESPONSE_BACKEND_DSTATE() ( \ |
719 | trace_event_get_state_dynamic_by_id(TRACE_SDCARD_RESPONSE) || \ |
720 | false) |
721 | |
722 | static inline void _nocheck__trace_sdcard_response(const char * rspdesc, int rsplen) |
723 | { |
724 | if (trace_event_get_state(TRACE_SDCARD_RESPONSE) && qemu_loglevel_mask(LOG_TRACE)) { |
725 | struct timeval _now; |
726 | gettimeofday(&_now, NULL); |
727 | qemu_log("%d@%zu.%06zu:sdcard_response " "%s (sz:%d)" "\n" , |
728 | qemu_get_thread_id(), |
729 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
730 | , rspdesc, rsplen); |
731 | } |
732 | } |
733 | |
734 | static inline void trace_sdcard_response(const char * rspdesc, int rsplen) |
735 | { |
736 | if (true) { |
737 | _nocheck__trace_sdcard_response(rspdesc, rsplen); |
738 | } |
739 | } |
740 | |
741 | #define TRACE_SDCARD_POWERUP_BACKEND_DSTATE() ( \ |
742 | trace_event_get_state_dynamic_by_id(TRACE_SDCARD_POWERUP) || \ |
743 | false) |
744 | |
745 | static inline void _nocheck__trace_sdcard_powerup(void) |
746 | { |
747 | if (trace_event_get_state(TRACE_SDCARD_POWERUP) && qemu_loglevel_mask(LOG_TRACE)) { |
748 | struct timeval _now; |
749 | gettimeofday(&_now, NULL); |
750 | qemu_log("%d@%zu.%06zu:sdcard_powerup " "" "\n" , |
751 | qemu_get_thread_id(), |
752 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
753 | ); |
754 | } |
755 | } |
756 | |
757 | static inline void trace_sdcard_powerup(void) |
758 | { |
759 | if (true) { |
760 | _nocheck__trace_sdcard_powerup(); |
761 | } |
762 | } |
763 | |
764 | #define TRACE_SDCARD_INQUIRY_CMD41_BACKEND_DSTATE() ( \ |
765 | trace_event_get_state_dynamic_by_id(TRACE_SDCARD_INQUIRY_CMD41) || \ |
766 | false) |
767 | |
768 | static inline void _nocheck__trace_sdcard_inquiry_cmd41(void) |
769 | { |
770 | if (trace_event_get_state(TRACE_SDCARD_INQUIRY_CMD41) && qemu_loglevel_mask(LOG_TRACE)) { |
771 | struct timeval _now; |
772 | gettimeofday(&_now, NULL); |
773 | qemu_log("%d@%zu.%06zu:sdcard_inquiry_cmd41 " "" "\n" , |
774 | qemu_get_thread_id(), |
775 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
776 | ); |
777 | } |
778 | } |
779 | |
780 | static inline void trace_sdcard_inquiry_cmd41(void) |
781 | { |
782 | if (true) { |
783 | _nocheck__trace_sdcard_inquiry_cmd41(); |
784 | } |
785 | } |
786 | |
787 | #define TRACE_SDCARD_RESET_BACKEND_DSTATE() ( \ |
788 | trace_event_get_state_dynamic_by_id(TRACE_SDCARD_RESET) || \ |
789 | false) |
790 | |
791 | static inline void _nocheck__trace_sdcard_reset(void) |
792 | { |
793 | if (trace_event_get_state(TRACE_SDCARD_RESET) && qemu_loglevel_mask(LOG_TRACE)) { |
794 | struct timeval _now; |
795 | gettimeofday(&_now, NULL); |
796 | qemu_log("%d@%zu.%06zu:sdcard_reset " "" "\n" , |
797 | qemu_get_thread_id(), |
798 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
799 | ); |
800 | } |
801 | } |
802 | |
803 | static inline void trace_sdcard_reset(void) |
804 | { |
805 | if (true) { |
806 | _nocheck__trace_sdcard_reset(); |
807 | } |
808 | } |
809 | |
810 | #define TRACE_SDCARD_SET_BLOCKLEN_BACKEND_DSTATE() ( \ |
811 | trace_event_get_state_dynamic_by_id(TRACE_SDCARD_SET_BLOCKLEN) || \ |
812 | false) |
813 | |
814 | static inline void _nocheck__trace_sdcard_set_blocklen(uint16_t length) |
815 | { |
816 | if (trace_event_get_state(TRACE_SDCARD_SET_BLOCKLEN) && qemu_loglevel_mask(LOG_TRACE)) { |
817 | struct timeval _now; |
818 | gettimeofday(&_now, NULL); |
819 | qemu_log("%d@%zu.%06zu:sdcard_set_blocklen " "0x%03x" "\n" , |
820 | qemu_get_thread_id(), |
821 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
822 | , length); |
823 | } |
824 | } |
825 | |
826 | static inline void trace_sdcard_set_blocklen(uint16_t length) |
827 | { |
828 | if (true) { |
829 | _nocheck__trace_sdcard_set_blocklen(length); |
830 | } |
831 | } |
832 | |
833 | #define TRACE_SDCARD_INSERTED_BACKEND_DSTATE() ( \ |
834 | trace_event_get_state_dynamic_by_id(TRACE_SDCARD_INSERTED) || \ |
835 | false) |
836 | |
837 | static inline void _nocheck__trace_sdcard_inserted(bool readonly) |
838 | { |
839 | if (trace_event_get_state(TRACE_SDCARD_INSERTED) && qemu_loglevel_mask(LOG_TRACE)) { |
840 | struct timeval _now; |
841 | gettimeofday(&_now, NULL); |
842 | qemu_log("%d@%zu.%06zu:sdcard_inserted " "read_only: %u" "\n" , |
843 | qemu_get_thread_id(), |
844 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
845 | , readonly); |
846 | } |
847 | } |
848 | |
849 | static inline void trace_sdcard_inserted(bool readonly) |
850 | { |
851 | if (true) { |
852 | _nocheck__trace_sdcard_inserted(readonly); |
853 | } |
854 | } |
855 | |
856 | #define TRACE_SDCARD_EJECTED_BACKEND_DSTATE() ( \ |
857 | trace_event_get_state_dynamic_by_id(TRACE_SDCARD_EJECTED) || \ |
858 | false) |
859 | |
860 | static inline void _nocheck__trace_sdcard_ejected(void) |
861 | { |
862 | if (trace_event_get_state(TRACE_SDCARD_EJECTED) && qemu_loglevel_mask(LOG_TRACE)) { |
863 | struct timeval _now; |
864 | gettimeofday(&_now, NULL); |
865 | qemu_log("%d@%zu.%06zu:sdcard_ejected " "" "\n" , |
866 | qemu_get_thread_id(), |
867 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
868 | ); |
869 | } |
870 | } |
871 | |
872 | static inline void trace_sdcard_ejected(void) |
873 | { |
874 | if (true) { |
875 | _nocheck__trace_sdcard_ejected(); |
876 | } |
877 | } |
878 | |
879 | #define TRACE_SDCARD_ERASE_BACKEND_DSTATE() ( \ |
880 | trace_event_get_state_dynamic_by_id(TRACE_SDCARD_ERASE) || \ |
881 | false) |
882 | |
883 | static inline void _nocheck__trace_sdcard_erase(void) |
884 | { |
885 | if (trace_event_get_state(TRACE_SDCARD_ERASE) && qemu_loglevel_mask(LOG_TRACE)) { |
886 | struct timeval _now; |
887 | gettimeofday(&_now, NULL); |
888 | qemu_log("%d@%zu.%06zu:sdcard_erase " "" "\n" , |
889 | qemu_get_thread_id(), |
890 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
891 | ); |
892 | } |
893 | } |
894 | |
895 | static inline void trace_sdcard_erase(void) |
896 | { |
897 | if (true) { |
898 | _nocheck__trace_sdcard_erase(); |
899 | } |
900 | } |
901 | |
902 | #define TRACE_SDCARD_LOCK_BACKEND_DSTATE() ( \ |
903 | trace_event_get_state_dynamic_by_id(TRACE_SDCARD_LOCK) || \ |
904 | false) |
905 | |
906 | static inline void _nocheck__trace_sdcard_lock(void) |
907 | { |
908 | if (trace_event_get_state(TRACE_SDCARD_LOCK) && qemu_loglevel_mask(LOG_TRACE)) { |
909 | struct timeval _now; |
910 | gettimeofday(&_now, NULL); |
911 | qemu_log("%d@%zu.%06zu:sdcard_lock " "" "\n" , |
912 | qemu_get_thread_id(), |
913 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
914 | ); |
915 | } |
916 | } |
917 | |
918 | static inline void trace_sdcard_lock(void) |
919 | { |
920 | if (true) { |
921 | _nocheck__trace_sdcard_lock(); |
922 | } |
923 | } |
924 | |
925 | #define TRACE_SDCARD_UNLOCK_BACKEND_DSTATE() ( \ |
926 | trace_event_get_state_dynamic_by_id(TRACE_SDCARD_UNLOCK) || \ |
927 | false) |
928 | |
929 | static inline void _nocheck__trace_sdcard_unlock(void) |
930 | { |
931 | if (trace_event_get_state(TRACE_SDCARD_UNLOCK) && qemu_loglevel_mask(LOG_TRACE)) { |
932 | struct timeval _now; |
933 | gettimeofday(&_now, NULL); |
934 | qemu_log("%d@%zu.%06zu:sdcard_unlock " "" "\n" , |
935 | qemu_get_thread_id(), |
936 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
937 | ); |
938 | } |
939 | } |
940 | |
941 | static inline void trace_sdcard_unlock(void) |
942 | { |
943 | if (true) { |
944 | _nocheck__trace_sdcard_unlock(); |
945 | } |
946 | } |
947 | |
948 | #define TRACE_SDCARD_READ_BLOCK_BACKEND_DSTATE() ( \ |
949 | trace_event_get_state_dynamic_by_id(TRACE_SDCARD_READ_BLOCK) || \ |
950 | false) |
951 | |
952 | static inline void _nocheck__trace_sdcard_read_block(uint64_t addr, uint32_t len) |
953 | { |
954 | if (trace_event_get_state(TRACE_SDCARD_READ_BLOCK) && qemu_loglevel_mask(LOG_TRACE)) { |
955 | struct timeval _now; |
956 | gettimeofday(&_now, NULL); |
957 | qemu_log("%d@%zu.%06zu:sdcard_read_block " "addr 0x%" PRIx64 " size 0x%x" "\n" , |
958 | qemu_get_thread_id(), |
959 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
960 | , addr, len); |
961 | } |
962 | } |
963 | |
964 | static inline void trace_sdcard_read_block(uint64_t addr, uint32_t len) |
965 | { |
966 | if (true) { |
967 | _nocheck__trace_sdcard_read_block(addr, len); |
968 | } |
969 | } |
970 | |
971 | #define TRACE_SDCARD_WRITE_BLOCK_BACKEND_DSTATE() ( \ |
972 | trace_event_get_state_dynamic_by_id(TRACE_SDCARD_WRITE_BLOCK) || \ |
973 | false) |
974 | |
975 | static inline void _nocheck__trace_sdcard_write_block(uint64_t addr, uint32_t len) |
976 | { |
977 | if (trace_event_get_state(TRACE_SDCARD_WRITE_BLOCK) && qemu_loglevel_mask(LOG_TRACE)) { |
978 | struct timeval _now; |
979 | gettimeofday(&_now, NULL); |
980 | qemu_log("%d@%zu.%06zu:sdcard_write_block " "addr 0x%" PRIx64 " size 0x%x" "\n" , |
981 | qemu_get_thread_id(), |
982 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
983 | , addr, len); |
984 | } |
985 | } |
986 | |
987 | static inline void trace_sdcard_write_block(uint64_t addr, uint32_t len) |
988 | { |
989 | if (true) { |
990 | _nocheck__trace_sdcard_write_block(addr, len); |
991 | } |
992 | } |
993 | |
994 | #define TRACE_SDCARD_WRITE_DATA_BACKEND_DSTATE() ( \ |
995 | trace_event_get_state_dynamic_by_id(TRACE_SDCARD_WRITE_DATA) || \ |
996 | false) |
997 | |
998 | static inline void _nocheck__trace_sdcard_write_data(const char * proto, const char * cmd_desc, uint8_t cmd, uint8_t value) |
999 | { |
1000 | if (trace_event_get_state(TRACE_SDCARD_WRITE_DATA) && qemu_loglevel_mask(LOG_TRACE)) { |
1001 | struct timeval _now; |
1002 | gettimeofday(&_now, NULL); |
1003 | qemu_log("%d@%zu.%06zu:sdcard_write_data " "%s %20s/ CMD%02d value 0x%02x" "\n" , |
1004 | qemu_get_thread_id(), |
1005 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1006 | , proto, cmd_desc, cmd, value); |
1007 | } |
1008 | } |
1009 | |
1010 | static inline void trace_sdcard_write_data(const char * proto, const char * cmd_desc, uint8_t cmd, uint8_t value) |
1011 | { |
1012 | if (true) { |
1013 | _nocheck__trace_sdcard_write_data(proto, cmd_desc, cmd, value); |
1014 | } |
1015 | } |
1016 | |
1017 | #define TRACE_SDCARD_READ_DATA_BACKEND_DSTATE() ( \ |
1018 | trace_event_get_state_dynamic_by_id(TRACE_SDCARD_READ_DATA) || \ |
1019 | false) |
1020 | |
1021 | static inline void _nocheck__trace_sdcard_read_data(const char * proto, const char * cmd_desc, uint8_t cmd, int length) |
1022 | { |
1023 | if (trace_event_get_state(TRACE_SDCARD_READ_DATA) && qemu_loglevel_mask(LOG_TRACE)) { |
1024 | struct timeval _now; |
1025 | gettimeofday(&_now, NULL); |
1026 | qemu_log("%d@%zu.%06zu:sdcard_read_data " "%s %20s/ CMD%02d len %d" "\n" , |
1027 | qemu_get_thread_id(), |
1028 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1029 | , proto, cmd_desc, cmd, length); |
1030 | } |
1031 | } |
1032 | |
1033 | static inline void trace_sdcard_read_data(const char * proto, const char * cmd_desc, uint8_t cmd, int length) |
1034 | { |
1035 | if (true) { |
1036 | _nocheck__trace_sdcard_read_data(proto, cmd_desc, cmd, length); |
1037 | } |
1038 | } |
1039 | |
1040 | #define TRACE_SDCARD_SET_VOLTAGE_BACKEND_DSTATE() ( \ |
1041 | trace_event_get_state_dynamic_by_id(TRACE_SDCARD_SET_VOLTAGE) || \ |
1042 | false) |
1043 | |
1044 | static inline void _nocheck__trace_sdcard_set_voltage(uint16_t millivolts) |
1045 | { |
1046 | if (trace_event_get_state(TRACE_SDCARD_SET_VOLTAGE) && qemu_loglevel_mask(LOG_TRACE)) { |
1047 | struct timeval _now; |
1048 | gettimeofday(&_now, NULL); |
1049 | qemu_log("%d@%zu.%06zu:sdcard_set_voltage " "%u mV" "\n" , |
1050 | qemu_get_thread_id(), |
1051 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1052 | , millivolts); |
1053 | } |
1054 | } |
1055 | |
1056 | static inline void trace_sdcard_set_voltage(uint16_t millivolts) |
1057 | { |
1058 | if (true) { |
1059 | _nocheck__trace_sdcard_set_voltage(millivolts); |
1060 | } |
1061 | } |
1062 | |
1063 | #define TRACE_MILKYMIST_MEMCARD_MEMORY_READ_BACKEND_DSTATE() ( \ |
1064 | trace_event_get_state_dynamic_by_id(TRACE_MILKYMIST_MEMCARD_MEMORY_READ) || \ |
1065 | false) |
1066 | |
1067 | static inline void _nocheck__trace_milkymist_memcard_memory_read(uint32_t addr, uint32_t value) |
1068 | { |
1069 | if (trace_event_get_state(TRACE_MILKYMIST_MEMCARD_MEMORY_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
1070 | struct timeval _now; |
1071 | gettimeofday(&_now, NULL); |
1072 | qemu_log("%d@%zu.%06zu:milkymist_memcard_memory_read " "addr 0x%08x value 0x%08x" "\n" , |
1073 | qemu_get_thread_id(), |
1074 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1075 | , addr, value); |
1076 | } |
1077 | } |
1078 | |
1079 | static inline void trace_milkymist_memcard_memory_read(uint32_t addr, uint32_t value) |
1080 | { |
1081 | if (true) { |
1082 | _nocheck__trace_milkymist_memcard_memory_read(addr, value); |
1083 | } |
1084 | } |
1085 | |
1086 | #define TRACE_MILKYMIST_MEMCARD_MEMORY_WRITE_BACKEND_DSTATE() ( \ |
1087 | trace_event_get_state_dynamic_by_id(TRACE_MILKYMIST_MEMCARD_MEMORY_WRITE) || \ |
1088 | false) |
1089 | |
1090 | static inline void _nocheck__trace_milkymist_memcard_memory_write(uint32_t addr, uint32_t value) |
1091 | { |
1092 | if (trace_event_get_state(TRACE_MILKYMIST_MEMCARD_MEMORY_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
1093 | struct timeval _now; |
1094 | gettimeofday(&_now, NULL); |
1095 | qemu_log("%d@%zu.%06zu:milkymist_memcard_memory_write " "addr 0x%08x value 0x%08x" "\n" , |
1096 | qemu_get_thread_id(), |
1097 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1098 | , addr, value); |
1099 | } |
1100 | } |
1101 | |
1102 | static inline void trace_milkymist_memcard_memory_write(uint32_t addr, uint32_t value) |
1103 | { |
1104 | if (true) { |
1105 | _nocheck__trace_milkymist_memcard_memory_write(addr, value); |
1106 | } |
1107 | } |
1108 | |
1109 | #define TRACE_PXA2XX_MMCI_READ_BACKEND_DSTATE() ( \ |
1110 | trace_event_get_state_dynamic_by_id(TRACE_PXA2XX_MMCI_READ) || \ |
1111 | false) |
1112 | |
1113 | static inline void _nocheck__trace_pxa2xx_mmci_read(uint8_t size, uint32_t addr, uint32_t value) |
1114 | { |
1115 | if (trace_event_get_state(TRACE_PXA2XX_MMCI_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
1116 | struct timeval _now; |
1117 | gettimeofday(&_now, NULL); |
1118 | qemu_log("%d@%zu.%06zu:pxa2xx_mmci_read " "size %d addr 0x%02x value 0x%08x" "\n" , |
1119 | qemu_get_thread_id(), |
1120 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1121 | , size, addr, value); |
1122 | } |
1123 | } |
1124 | |
1125 | static inline void trace_pxa2xx_mmci_read(uint8_t size, uint32_t addr, uint32_t value) |
1126 | { |
1127 | if (true) { |
1128 | _nocheck__trace_pxa2xx_mmci_read(size, addr, value); |
1129 | } |
1130 | } |
1131 | |
1132 | #define TRACE_PXA2XX_MMCI_WRITE_BACKEND_DSTATE() ( \ |
1133 | trace_event_get_state_dynamic_by_id(TRACE_PXA2XX_MMCI_WRITE) || \ |
1134 | false) |
1135 | |
1136 | static inline void _nocheck__trace_pxa2xx_mmci_write(uint8_t size, uint32_t addr, uint32_t value) |
1137 | { |
1138 | if (trace_event_get_state(TRACE_PXA2XX_MMCI_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
1139 | struct timeval _now; |
1140 | gettimeofday(&_now, NULL); |
1141 | qemu_log("%d@%zu.%06zu:pxa2xx_mmci_write " "size %d addr 0x%02x value 0x%08x" "\n" , |
1142 | qemu_get_thread_id(), |
1143 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1144 | , size, addr, value); |
1145 | } |
1146 | } |
1147 | |
1148 | static inline void trace_pxa2xx_mmci_write(uint8_t size, uint32_t addr, uint32_t value) |
1149 | { |
1150 | if (true) { |
1151 | _nocheck__trace_pxa2xx_mmci_write(size, addr, value); |
1152 | } |
1153 | } |
1154 | #endif /* TRACE_HW_SD_GENERATED_TRACERS_H */ |
1155 | |