1 | /* This file is autogenerated by tracetool, do not edit. */ |
2 | |
3 | #ifndef TRACE_HW_VFIO_GENERATED_TRACERS_H |
4 | #define TRACE_HW_VFIO_GENERATED_TRACERS_H |
5 | |
6 | #include "trace/control.h" |
7 | |
8 | extern TraceEvent _TRACE_VFIO_INTX_INTERRUPT_EVENT; |
9 | extern TraceEvent _TRACE_VFIO_INTX_EOI_EVENT; |
10 | extern TraceEvent _TRACE_VFIO_INTX_ENABLE_KVM_EVENT; |
11 | extern TraceEvent _TRACE_VFIO_INTX_DISABLE_KVM_EVENT; |
12 | extern TraceEvent _TRACE_VFIO_INTX_UPDATE_EVENT; |
13 | extern TraceEvent _TRACE_VFIO_INTX_ENABLE_EVENT; |
14 | extern TraceEvent _TRACE_VFIO_INTX_DISABLE_EVENT; |
15 | extern TraceEvent _TRACE_VFIO_MSI_INTERRUPT_EVENT; |
16 | extern TraceEvent _TRACE_VFIO_MSIX_VECTOR_DO_USE_EVENT; |
17 | extern TraceEvent _TRACE_VFIO_MSIX_VECTOR_RELEASE_EVENT; |
18 | extern TraceEvent _TRACE_VFIO_MSIX_ENABLE_EVENT; |
19 | extern TraceEvent _TRACE_VFIO_MSIX_PBA_DISABLE_EVENT; |
20 | extern TraceEvent _TRACE_VFIO_MSIX_PBA_ENABLE_EVENT; |
21 | extern TraceEvent _TRACE_VFIO_MSIX_DISABLE_EVENT; |
22 | extern TraceEvent _TRACE_VFIO_MSIX_FIXUP_EVENT; |
23 | extern TraceEvent _TRACE_VFIO_MSIX_RELO_EVENT; |
24 | extern TraceEvent _TRACE_VFIO_MSI_ENABLE_EVENT; |
25 | extern TraceEvent _TRACE_VFIO_MSI_DISABLE_EVENT; |
26 | extern TraceEvent _TRACE_VFIO_PCI_LOAD_ROM_EVENT; |
27 | extern TraceEvent _TRACE_VFIO_ROM_READ_EVENT; |
28 | extern TraceEvent _TRACE_VFIO_PCI_SIZE_ROM_EVENT; |
29 | extern TraceEvent _TRACE_VFIO_VGA_WRITE_EVENT; |
30 | extern TraceEvent _TRACE_VFIO_VGA_READ_EVENT; |
31 | extern TraceEvent _TRACE_VFIO_PCI_READ_CONFIG_EVENT; |
32 | extern TraceEvent _TRACE_VFIO_PCI_WRITE_CONFIG_EVENT; |
33 | extern TraceEvent _TRACE_VFIO_MSI_SETUP_EVENT; |
34 | extern TraceEvent _TRACE_VFIO_MSIX_EARLY_SETUP_EVENT; |
35 | extern TraceEvent _TRACE_VFIO_CHECK_PCIE_FLR_EVENT; |
36 | extern TraceEvent _TRACE_VFIO_CHECK_PM_RESET_EVENT; |
37 | extern TraceEvent _TRACE_VFIO_CHECK_AF_FLR_EVENT; |
38 | extern TraceEvent _TRACE_VFIO_PCI_HOT_RESET_EVENT; |
39 | extern TraceEvent _TRACE_VFIO_PCI_HOT_RESET_HAS_DEP_DEVICES_EVENT; |
40 | extern TraceEvent _TRACE_VFIO_PCI_HOT_RESET_DEP_DEVICES_EVENT; |
41 | extern TraceEvent _TRACE_VFIO_PCI_HOT_RESET_RESULT_EVENT; |
42 | extern TraceEvent _TRACE_VFIO_POPULATE_DEVICE_CONFIG_EVENT; |
43 | extern TraceEvent _TRACE_VFIO_POPULATE_DEVICE_GET_IRQ_INFO_FAILURE_EVENT; |
44 | extern TraceEvent _TRACE_VFIO_REALIZE_EVENT; |
45 | extern TraceEvent _TRACE_VFIO_MDEV_EVENT; |
46 | extern TraceEvent _TRACE_VFIO_ADD_EXT_CAP_DROPPED_EVENT; |
47 | extern TraceEvent _TRACE_VFIO_PCI_RESET_EVENT; |
48 | extern TraceEvent _TRACE_VFIO_PCI_RESET_FLR_EVENT; |
49 | extern TraceEvent _TRACE_VFIO_PCI_RESET_PM_EVENT; |
50 | extern TraceEvent _TRACE_VFIO_PCI_EMULATED_VENDOR_ID_EVENT; |
51 | extern TraceEvent _TRACE_VFIO_PCI_EMULATED_DEVICE_ID_EVENT; |
52 | extern TraceEvent _TRACE_VFIO_PCI_EMULATED_SUB_VENDOR_ID_EVENT; |
53 | extern TraceEvent _TRACE_VFIO_PCI_EMULATED_SUB_DEVICE_ID_EVENT; |
54 | extern TraceEvent _TRACE_VFIO_QUIRK_ROM_BLACKLISTED_EVENT; |
55 | extern TraceEvent _TRACE_VFIO_QUIRK_GENERIC_WINDOW_ADDRESS_WRITE_EVENT; |
56 | extern TraceEvent _TRACE_VFIO_QUIRK_GENERIC_WINDOW_DATA_READ_EVENT; |
57 | extern TraceEvent _TRACE_VFIO_QUIRK_GENERIC_WINDOW_DATA_WRITE_EVENT; |
58 | extern TraceEvent _TRACE_VFIO_QUIRK_GENERIC_MIRROR_READ_EVENT; |
59 | extern TraceEvent _TRACE_VFIO_QUIRK_GENERIC_MIRROR_WRITE_EVENT; |
60 | extern TraceEvent _TRACE_VFIO_QUIRK_ATI_3C3_READ_EVENT; |
61 | extern TraceEvent _TRACE_VFIO_QUIRK_ATI_3C3_PROBE_EVENT; |
62 | extern TraceEvent _TRACE_VFIO_QUIRK_ATI_BAR4_PROBE_EVENT; |
63 | extern TraceEvent _TRACE_VFIO_QUIRK_ATI_BAR2_PROBE_EVENT; |
64 | extern TraceEvent _TRACE_VFIO_QUIRK_NVIDIA_3D0_STATE_EVENT; |
65 | extern TraceEvent _TRACE_VFIO_QUIRK_NVIDIA_3D0_READ_EVENT; |
66 | extern TraceEvent _TRACE_VFIO_QUIRK_NVIDIA_3D0_WRITE_EVENT; |
67 | extern TraceEvent _TRACE_VFIO_QUIRK_NVIDIA_3D0_PROBE_EVENT; |
68 | extern TraceEvent _TRACE_VFIO_QUIRK_NVIDIA_BAR5_STATE_EVENT; |
69 | extern TraceEvent _TRACE_VFIO_QUIRK_NVIDIA_BAR5_PROBE_EVENT; |
70 | extern TraceEvent _TRACE_VFIO_QUIRK_NVIDIA_BAR0_MSI_ACK_EVENT; |
71 | extern TraceEvent _TRACE_VFIO_QUIRK_NVIDIA_BAR0_PROBE_EVENT; |
72 | extern TraceEvent _TRACE_VFIO_QUIRK_RTL8168_FAKE_LATCH_EVENT; |
73 | extern TraceEvent _TRACE_VFIO_QUIRK_RTL8168_MSIX_WRITE_EVENT; |
74 | extern TraceEvent _TRACE_VFIO_QUIRK_RTL8168_MSIX_READ_EVENT; |
75 | extern TraceEvent _TRACE_VFIO_QUIRK_RTL8168_PROBE_EVENT; |
76 | extern TraceEvent _TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_SKIPPED_EVENT; |
77 | extern TraceEvent _TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_NO_SMC_EVENT; |
78 | extern TraceEvent _TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_TIMEOUT_EVENT; |
79 | extern TraceEvent _TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_DONE_EVENT; |
80 | extern TraceEvent _TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_EVENT; |
81 | extern TraceEvent _TRACE_VFIO_IOEVENTFD_EXIT_EVENT; |
82 | extern TraceEvent _TRACE_VFIO_IOEVENTFD_HANDLER_EVENT; |
83 | extern TraceEvent _TRACE_VFIO_IOEVENTFD_INIT_EVENT; |
84 | extern TraceEvent _TRACE_VFIO_PCI_IGD_BAR4_WRITE_EVENT; |
85 | extern TraceEvent _TRACE_VFIO_PCI_IGD_BDSM_ENABLED_EVENT; |
86 | extern TraceEvent _TRACE_VFIO_PCI_IGD_OPREGION_ENABLED_EVENT; |
87 | extern TraceEvent _TRACE_VFIO_PCI_IGD_HOST_BRIDGE_ENABLED_EVENT; |
88 | extern TraceEvent _TRACE_VFIO_PCI_IGD_LPC_BRIDGE_ENABLED_EVENT; |
89 | extern TraceEvent _TRACE_VFIO_PCI_NVIDIA_GPU_SETUP_QUIRK_EVENT; |
90 | extern TraceEvent _TRACE_VFIO_PCI_NVLINK2_SETUP_QUIRK_SSATGT_EVENT; |
91 | extern TraceEvent _TRACE_VFIO_PCI_NVLINK2_SETUP_QUIRK_LNKSPD_EVENT; |
92 | extern TraceEvent _TRACE_VFIO_REGION_WRITE_EVENT; |
93 | extern TraceEvent _TRACE_VFIO_REGION_READ_EVENT; |
94 | extern TraceEvent _TRACE_VFIO_IOMMU_MAP_NOTIFY_EVENT; |
95 | extern TraceEvent _TRACE_VFIO_LISTENER_REGION_ADD_SKIP_EVENT; |
96 | extern TraceEvent _TRACE_VFIO_SPAPR_GROUP_ATTACH_EVENT; |
97 | extern TraceEvent _TRACE_VFIO_LISTENER_REGION_ADD_IOMMU_EVENT; |
98 | extern TraceEvent _TRACE_VFIO_LISTENER_REGION_ADD_RAM_EVENT; |
99 | extern TraceEvent _TRACE_VFIO_LISTENER_REGION_ADD_NO_DMA_MAP_EVENT; |
100 | extern TraceEvent _TRACE_VFIO_LISTENER_REGION_DEL_SKIP_EVENT; |
101 | extern TraceEvent _TRACE_VFIO_LISTENER_REGION_DEL_EVENT; |
102 | extern TraceEvent _TRACE_VFIO_DISCONNECT_CONTAINER_EVENT; |
103 | extern TraceEvent _TRACE_VFIO_PUT_GROUP_EVENT; |
104 | extern TraceEvent _TRACE_VFIO_GET_DEVICE_EVENT; |
105 | extern TraceEvent _TRACE_VFIO_PUT_BASE_DEVICE_EVENT; |
106 | extern TraceEvent _TRACE_VFIO_REGION_SETUP_EVENT; |
107 | extern TraceEvent _TRACE_VFIO_REGION_MMAP_FAULT_EVENT; |
108 | extern TraceEvent _TRACE_VFIO_REGION_MMAP_EVENT; |
109 | extern TraceEvent _TRACE_VFIO_REGION_EXIT_EVENT; |
110 | extern TraceEvent _TRACE_VFIO_REGION_FINALIZE_EVENT; |
111 | extern TraceEvent _TRACE_VFIO_REGION_MMAPS_SET_ENABLED_EVENT; |
112 | extern TraceEvent ; |
113 | extern TraceEvent _TRACE_VFIO_REGION_SPARSE_MMAP_ENTRY_EVENT; |
114 | extern TraceEvent _TRACE_VFIO_GET_DEV_REGION_EVENT; |
115 | extern TraceEvent _TRACE_VFIO_DMA_UNMAP_OVERFLOW_WORKAROUND_EVENT; |
116 | extern TraceEvent _TRACE_VFIO_PLATFORM_BASE_DEVICE_INIT_EVENT; |
117 | extern TraceEvent _TRACE_VFIO_PLATFORM_REALIZE_EVENT; |
118 | extern TraceEvent _TRACE_VFIO_PLATFORM_EOI_EVENT; |
119 | extern TraceEvent _TRACE_VFIO_PLATFORM_INTP_MMAP_ENABLE_EVENT; |
120 | extern TraceEvent _TRACE_VFIO_PLATFORM_INTP_INTERRUPT_EVENT; |
121 | extern TraceEvent _TRACE_VFIO_PLATFORM_INTP_INJECT_PENDING_LOCKHELD_EVENT; |
122 | extern TraceEvent _TRACE_VFIO_PLATFORM_POPULATE_INTERRUPTS_EVENT; |
123 | extern TraceEvent _TRACE_VFIO_INTP_INTERRUPT_SET_PENDING_EVENT; |
124 | extern TraceEvent _TRACE_VFIO_PLATFORM_START_LEVEL_IRQFD_INJECTION_EVENT; |
125 | extern TraceEvent _TRACE_VFIO_PLATFORM_START_EDGE_IRQFD_INJECTION_EVENT; |
126 | extern TraceEvent _TRACE_VFIO_PREREG_LISTENER_REGION_ADD_SKIP_EVENT; |
127 | extern TraceEvent _TRACE_VFIO_PREREG_LISTENER_REGION_DEL_SKIP_EVENT; |
128 | extern TraceEvent _TRACE_VFIO_PREREG_REGISTER_EVENT; |
129 | extern TraceEvent _TRACE_VFIO_PREREG_UNREGISTER_EVENT; |
130 | extern TraceEvent _TRACE_VFIO_SPAPR_CREATE_WINDOW_EVENT; |
131 | extern TraceEvent _TRACE_VFIO_SPAPR_REMOVE_WINDOW_EVENT; |
132 | extern TraceEvent _TRACE_VFIO_DISPLAY_EDID_AVAILABLE_EVENT; |
133 | extern TraceEvent _TRACE_VFIO_DISPLAY_EDID_LINK_UP_EVENT; |
134 | extern TraceEvent _TRACE_VFIO_DISPLAY_EDID_LINK_DOWN_EVENT; |
135 | extern TraceEvent _TRACE_VFIO_DISPLAY_EDID_UPDATE_EVENT; |
136 | extern TraceEvent _TRACE_VFIO_DISPLAY_EDID_WRITE_ERROR_EVENT; |
137 | extern uint16_t _TRACE_VFIO_INTX_INTERRUPT_DSTATE; |
138 | extern uint16_t _TRACE_VFIO_INTX_EOI_DSTATE; |
139 | extern uint16_t _TRACE_VFIO_INTX_ENABLE_KVM_DSTATE; |
140 | extern uint16_t _TRACE_VFIO_INTX_DISABLE_KVM_DSTATE; |
141 | extern uint16_t _TRACE_VFIO_INTX_UPDATE_DSTATE; |
142 | extern uint16_t _TRACE_VFIO_INTX_ENABLE_DSTATE; |
143 | extern uint16_t _TRACE_VFIO_INTX_DISABLE_DSTATE; |
144 | extern uint16_t _TRACE_VFIO_MSI_INTERRUPT_DSTATE; |
145 | extern uint16_t _TRACE_VFIO_MSIX_VECTOR_DO_USE_DSTATE; |
146 | extern uint16_t _TRACE_VFIO_MSIX_VECTOR_RELEASE_DSTATE; |
147 | extern uint16_t _TRACE_VFIO_MSIX_ENABLE_DSTATE; |
148 | extern uint16_t _TRACE_VFIO_MSIX_PBA_DISABLE_DSTATE; |
149 | extern uint16_t _TRACE_VFIO_MSIX_PBA_ENABLE_DSTATE; |
150 | extern uint16_t _TRACE_VFIO_MSIX_DISABLE_DSTATE; |
151 | extern uint16_t _TRACE_VFIO_MSIX_FIXUP_DSTATE; |
152 | extern uint16_t _TRACE_VFIO_MSIX_RELO_DSTATE; |
153 | extern uint16_t _TRACE_VFIO_MSI_ENABLE_DSTATE; |
154 | extern uint16_t _TRACE_VFIO_MSI_DISABLE_DSTATE; |
155 | extern uint16_t _TRACE_VFIO_PCI_LOAD_ROM_DSTATE; |
156 | extern uint16_t _TRACE_VFIO_ROM_READ_DSTATE; |
157 | extern uint16_t _TRACE_VFIO_PCI_SIZE_ROM_DSTATE; |
158 | extern uint16_t _TRACE_VFIO_VGA_WRITE_DSTATE; |
159 | extern uint16_t _TRACE_VFIO_VGA_READ_DSTATE; |
160 | extern uint16_t _TRACE_VFIO_PCI_READ_CONFIG_DSTATE; |
161 | extern uint16_t _TRACE_VFIO_PCI_WRITE_CONFIG_DSTATE; |
162 | extern uint16_t _TRACE_VFIO_MSI_SETUP_DSTATE; |
163 | extern uint16_t _TRACE_VFIO_MSIX_EARLY_SETUP_DSTATE; |
164 | extern uint16_t _TRACE_VFIO_CHECK_PCIE_FLR_DSTATE; |
165 | extern uint16_t _TRACE_VFIO_CHECK_PM_RESET_DSTATE; |
166 | extern uint16_t _TRACE_VFIO_CHECK_AF_FLR_DSTATE; |
167 | extern uint16_t _TRACE_VFIO_PCI_HOT_RESET_DSTATE; |
168 | extern uint16_t _TRACE_VFIO_PCI_HOT_RESET_HAS_DEP_DEVICES_DSTATE; |
169 | extern uint16_t _TRACE_VFIO_PCI_HOT_RESET_DEP_DEVICES_DSTATE; |
170 | extern uint16_t _TRACE_VFIO_PCI_HOT_RESET_RESULT_DSTATE; |
171 | extern uint16_t _TRACE_VFIO_POPULATE_DEVICE_CONFIG_DSTATE; |
172 | extern uint16_t _TRACE_VFIO_POPULATE_DEVICE_GET_IRQ_INFO_FAILURE_DSTATE; |
173 | extern uint16_t _TRACE_VFIO_REALIZE_DSTATE; |
174 | extern uint16_t _TRACE_VFIO_MDEV_DSTATE; |
175 | extern uint16_t _TRACE_VFIO_ADD_EXT_CAP_DROPPED_DSTATE; |
176 | extern uint16_t _TRACE_VFIO_PCI_RESET_DSTATE; |
177 | extern uint16_t _TRACE_VFIO_PCI_RESET_FLR_DSTATE; |
178 | extern uint16_t _TRACE_VFIO_PCI_RESET_PM_DSTATE; |
179 | extern uint16_t _TRACE_VFIO_PCI_EMULATED_VENDOR_ID_DSTATE; |
180 | extern uint16_t _TRACE_VFIO_PCI_EMULATED_DEVICE_ID_DSTATE; |
181 | extern uint16_t _TRACE_VFIO_PCI_EMULATED_SUB_VENDOR_ID_DSTATE; |
182 | extern uint16_t _TRACE_VFIO_PCI_EMULATED_SUB_DEVICE_ID_DSTATE; |
183 | extern uint16_t _TRACE_VFIO_QUIRK_ROM_BLACKLISTED_DSTATE; |
184 | extern uint16_t _TRACE_VFIO_QUIRK_GENERIC_WINDOW_ADDRESS_WRITE_DSTATE; |
185 | extern uint16_t _TRACE_VFIO_QUIRK_GENERIC_WINDOW_DATA_READ_DSTATE; |
186 | extern uint16_t _TRACE_VFIO_QUIRK_GENERIC_WINDOW_DATA_WRITE_DSTATE; |
187 | extern uint16_t _TRACE_VFIO_QUIRK_GENERIC_MIRROR_READ_DSTATE; |
188 | extern uint16_t _TRACE_VFIO_QUIRK_GENERIC_MIRROR_WRITE_DSTATE; |
189 | extern uint16_t _TRACE_VFIO_QUIRK_ATI_3C3_READ_DSTATE; |
190 | extern uint16_t _TRACE_VFIO_QUIRK_ATI_3C3_PROBE_DSTATE; |
191 | extern uint16_t _TRACE_VFIO_QUIRK_ATI_BAR4_PROBE_DSTATE; |
192 | extern uint16_t _TRACE_VFIO_QUIRK_ATI_BAR2_PROBE_DSTATE; |
193 | extern uint16_t _TRACE_VFIO_QUIRK_NVIDIA_3D0_STATE_DSTATE; |
194 | extern uint16_t _TRACE_VFIO_QUIRK_NVIDIA_3D0_READ_DSTATE; |
195 | extern uint16_t _TRACE_VFIO_QUIRK_NVIDIA_3D0_WRITE_DSTATE; |
196 | extern uint16_t _TRACE_VFIO_QUIRK_NVIDIA_3D0_PROBE_DSTATE; |
197 | extern uint16_t _TRACE_VFIO_QUIRK_NVIDIA_BAR5_STATE_DSTATE; |
198 | extern uint16_t _TRACE_VFIO_QUIRK_NVIDIA_BAR5_PROBE_DSTATE; |
199 | extern uint16_t _TRACE_VFIO_QUIRK_NVIDIA_BAR0_MSI_ACK_DSTATE; |
200 | extern uint16_t _TRACE_VFIO_QUIRK_NVIDIA_BAR0_PROBE_DSTATE; |
201 | extern uint16_t _TRACE_VFIO_QUIRK_RTL8168_FAKE_LATCH_DSTATE; |
202 | extern uint16_t _TRACE_VFIO_QUIRK_RTL8168_MSIX_WRITE_DSTATE; |
203 | extern uint16_t _TRACE_VFIO_QUIRK_RTL8168_MSIX_READ_DSTATE; |
204 | extern uint16_t _TRACE_VFIO_QUIRK_RTL8168_PROBE_DSTATE; |
205 | extern uint16_t _TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_SKIPPED_DSTATE; |
206 | extern uint16_t _TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_NO_SMC_DSTATE; |
207 | extern uint16_t _TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_TIMEOUT_DSTATE; |
208 | extern uint16_t _TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_DONE_DSTATE; |
209 | extern uint16_t _TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_DSTATE; |
210 | extern uint16_t _TRACE_VFIO_IOEVENTFD_EXIT_DSTATE; |
211 | extern uint16_t _TRACE_VFIO_IOEVENTFD_HANDLER_DSTATE; |
212 | extern uint16_t _TRACE_VFIO_IOEVENTFD_INIT_DSTATE; |
213 | extern uint16_t _TRACE_VFIO_PCI_IGD_BAR4_WRITE_DSTATE; |
214 | extern uint16_t _TRACE_VFIO_PCI_IGD_BDSM_ENABLED_DSTATE; |
215 | extern uint16_t _TRACE_VFIO_PCI_IGD_OPREGION_ENABLED_DSTATE; |
216 | extern uint16_t _TRACE_VFIO_PCI_IGD_HOST_BRIDGE_ENABLED_DSTATE; |
217 | extern uint16_t _TRACE_VFIO_PCI_IGD_LPC_BRIDGE_ENABLED_DSTATE; |
218 | extern uint16_t _TRACE_VFIO_PCI_NVIDIA_GPU_SETUP_QUIRK_DSTATE; |
219 | extern uint16_t _TRACE_VFIO_PCI_NVLINK2_SETUP_QUIRK_SSATGT_DSTATE; |
220 | extern uint16_t _TRACE_VFIO_PCI_NVLINK2_SETUP_QUIRK_LNKSPD_DSTATE; |
221 | extern uint16_t _TRACE_VFIO_REGION_WRITE_DSTATE; |
222 | extern uint16_t _TRACE_VFIO_REGION_READ_DSTATE; |
223 | extern uint16_t _TRACE_VFIO_IOMMU_MAP_NOTIFY_DSTATE; |
224 | extern uint16_t _TRACE_VFIO_LISTENER_REGION_ADD_SKIP_DSTATE; |
225 | extern uint16_t _TRACE_VFIO_SPAPR_GROUP_ATTACH_DSTATE; |
226 | extern uint16_t _TRACE_VFIO_LISTENER_REGION_ADD_IOMMU_DSTATE; |
227 | extern uint16_t _TRACE_VFIO_LISTENER_REGION_ADD_RAM_DSTATE; |
228 | extern uint16_t _TRACE_VFIO_LISTENER_REGION_ADD_NO_DMA_MAP_DSTATE; |
229 | extern uint16_t _TRACE_VFIO_LISTENER_REGION_DEL_SKIP_DSTATE; |
230 | extern uint16_t _TRACE_VFIO_LISTENER_REGION_DEL_DSTATE; |
231 | extern uint16_t _TRACE_VFIO_DISCONNECT_CONTAINER_DSTATE; |
232 | extern uint16_t _TRACE_VFIO_PUT_GROUP_DSTATE; |
233 | extern uint16_t _TRACE_VFIO_GET_DEVICE_DSTATE; |
234 | extern uint16_t _TRACE_VFIO_PUT_BASE_DEVICE_DSTATE; |
235 | extern uint16_t _TRACE_VFIO_REGION_SETUP_DSTATE; |
236 | extern uint16_t _TRACE_VFIO_REGION_MMAP_FAULT_DSTATE; |
237 | extern uint16_t _TRACE_VFIO_REGION_MMAP_DSTATE; |
238 | extern uint16_t _TRACE_VFIO_REGION_EXIT_DSTATE; |
239 | extern uint16_t _TRACE_VFIO_REGION_FINALIZE_DSTATE; |
240 | extern uint16_t _TRACE_VFIO_REGION_MMAPS_SET_ENABLED_DSTATE; |
241 | extern uint16_t ; |
242 | extern uint16_t _TRACE_VFIO_REGION_SPARSE_MMAP_ENTRY_DSTATE; |
243 | extern uint16_t _TRACE_VFIO_GET_DEV_REGION_DSTATE; |
244 | extern uint16_t _TRACE_VFIO_DMA_UNMAP_OVERFLOW_WORKAROUND_DSTATE; |
245 | extern uint16_t _TRACE_VFIO_PLATFORM_BASE_DEVICE_INIT_DSTATE; |
246 | extern uint16_t _TRACE_VFIO_PLATFORM_REALIZE_DSTATE; |
247 | extern uint16_t _TRACE_VFIO_PLATFORM_EOI_DSTATE; |
248 | extern uint16_t _TRACE_VFIO_PLATFORM_INTP_MMAP_ENABLE_DSTATE; |
249 | extern uint16_t _TRACE_VFIO_PLATFORM_INTP_INTERRUPT_DSTATE; |
250 | extern uint16_t _TRACE_VFIO_PLATFORM_INTP_INJECT_PENDING_LOCKHELD_DSTATE; |
251 | extern uint16_t _TRACE_VFIO_PLATFORM_POPULATE_INTERRUPTS_DSTATE; |
252 | extern uint16_t _TRACE_VFIO_INTP_INTERRUPT_SET_PENDING_DSTATE; |
253 | extern uint16_t _TRACE_VFIO_PLATFORM_START_LEVEL_IRQFD_INJECTION_DSTATE; |
254 | extern uint16_t _TRACE_VFIO_PLATFORM_START_EDGE_IRQFD_INJECTION_DSTATE; |
255 | extern uint16_t _TRACE_VFIO_PREREG_LISTENER_REGION_ADD_SKIP_DSTATE; |
256 | extern uint16_t _TRACE_VFIO_PREREG_LISTENER_REGION_DEL_SKIP_DSTATE; |
257 | extern uint16_t _TRACE_VFIO_PREREG_REGISTER_DSTATE; |
258 | extern uint16_t _TRACE_VFIO_PREREG_UNREGISTER_DSTATE; |
259 | extern uint16_t _TRACE_VFIO_SPAPR_CREATE_WINDOW_DSTATE; |
260 | extern uint16_t _TRACE_VFIO_SPAPR_REMOVE_WINDOW_DSTATE; |
261 | extern uint16_t _TRACE_VFIO_DISPLAY_EDID_AVAILABLE_DSTATE; |
262 | extern uint16_t _TRACE_VFIO_DISPLAY_EDID_LINK_UP_DSTATE; |
263 | extern uint16_t _TRACE_VFIO_DISPLAY_EDID_LINK_DOWN_DSTATE; |
264 | extern uint16_t _TRACE_VFIO_DISPLAY_EDID_UPDATE_DSTATE; |
265 | extern uint16_t _TRACE_VFIO_DISPLAY_EDID_WRITE_ERROR_DSTATE; |
266 | #define TRACE_VFIO_INTX_INTERRUPT_ENABLED 1 |
267 | #define TRACE_VFIO_INTX_EOI_ENABLED 1 |
268 | #define TRACE_VFIO_INTX_ENABLE_KVM_ENABLED 1 |
269 | #define TRACE_VFIO_INTX_DISABLE_KVM_ENABLED 1 |
270 | #define TRACE_VFIO_INTX_UPDATE_ENABLED 1 |
271 | #define TRACE_VFIO_INTX_ENABLE_ENABLED 1 |
272 | #define TRACE_VFIO_INTX_DISABLE_ENABLED 1 |
273 | #define TRACE_VFIO_MSI_INTERRUPT_ENABLED 1 |
274 | #define TRACE_VFIO_MSIX_VECTOR_DO_USE_ENABLED 1 |
275 | #define TRACE_VFIO_MSIX_VECTOR_RELEASE_ENABLED 1 |
276 | #define TRACE_VFIO_MSIX_ENABLE_ENABLED 1 |
277 | #define TRACE_VFIO_MSIX_PBA_DISABLE_ENABLED 1 |
278 | #define TRACE_VFIO_MSIX_PBA_ENABLE_ENABLED 1 |
279 | #define TRACE_VFIO_MSIX_DISABLE_ENABLED 1 |
280 | #define TRACE_VFIO_MSIX_FIXUP_ENABLED 1 |
281 | #define TRACE_VFIO_MSIX_RELO_ENABLED 1 |
282 | #define TRACE_VFIO_MSI_ENABLE_ENABLED 1 |
283 | #define TRACE_VFIO_MSI_DISABLE_ENABLED 1 |
284 | #define TRACE_VFIO_PCI_LOAD_ROM_ENABLED 1 |
285 | #define TRACE_VFIO_ROM_READ_ENABLED 1 |
286 | #define TRACE_VFIO_PCI_SIZE_ROM_ENABLED 1 |
287 | #define TRACE_VFIO_VGA_WRITE_ENABLED 1 |
288 | #define TRACE_VFIO_VGA_READ_ENABLED 1 |
289 | #define TRACE_VFIO_PCI_READ_CONFIG_ENABLED 1 |
290 | #define TRACE_VFIO_PCI_WRITE_CONFIG_ENABLED 1 |
291 | #define TRACE_VFIO_MSI_SETUP_ENABLED 1 |
292 | #define TRACE_VFIO_MSIX_EARLY_SETUP_ENABLED 1 |
293 | #define TRACE_VFIO_CHECK_PCIE_FLR_ENABLED 1 |
294 | #define TRACE_VFIO_CHECK_PM_RESET_ENABLED 1 |
295 | #define TRACE_VFIO_CHECK_AF_FLR_ENABLED 1 |
296 | #define TRACE_VFIO_PCI_HOT_RESET_ENABLED 1 |
297 | #define TRACE_VFIO_PCI_HOT_RESET_HAS_DEP_DEVICES_ENABLED 1 |
298 | #define TRACE_VFIO_PCI_HOT_RESET_DEP_DEVICES_ENABLED 1 |
299 | #define TRACE_VFIO_PCI_HOT_RESET_RESULT_ENABLED 1 |
300 | #define TRACE_VFIO_POPULATE_DEVICE_CONFIG_ENABLED 1 |
301 | #define TRACE_VFIO_POPULATE_DEVICE_GET_IRQ_INFO_FAILURE_ENABLED 1 |
302 | #define TRACE_VFIO_REALIZE_ENABLED 1 |
303 | #define TRACE_VFIO_MDEV_ENABLED 1 |
304 | #define TRACE_VFIO_ADD_EXT_CAP_DROPPED_ENABLED 1 |
305 | #define TRACE_VFIO_PCI_RESET_ENABLED 1 |
306 | #define TRACE_VFIO_PCI_RESET_FLR_ENABLED 1 |
307 | #define TRACE_VFIO_PCI_RESET_PM_ENABLED 1 |
308 | #define TRACE_VFIO_PCI_EMULATED_VENDOR_ID_ENABLED 1 |
309 | #define TRACE_VFIO_PCI_EMULATED_DEVICE_ID_ENABLED 1 |
310 | #define TRACE_VFIO_PCI_EMULATED_SUB_VENDOR_ID_ENABLED 1 |
311 | #define TRACE_VFIO_PCI_EMULATED_SUB_DEVICE_ID_ENABLED 1 |
312 | #define TRACE_VFIO_QUIRK_ROM_BLACKLISTED_ENABLED 1 |
313 | #define TRACE_VFIO_QUIRK_GENERIC_WINDOW_ADDRESS_WRITE_ENABLED 1 |
314 | #define TRACE_VFIO_QUIRK_GENERIC_WINDOW_DATA_READ_ENABLED 1 |
315 | #define TRACE_VFIO_QUIRK_GENERIC_WINDOW_DATA_WRITE_ENABLED 1 |
316 | #define TRACE_VFIO_QUIRK_GENERIC_MIRROR_READ_ENABLED 1 |
317 | #define TRACE_VFIO_QUIRK_GENERIC_MIRROR_WRITE_ENABLED 1 |
318 | #define TRACE_VFIO_QUIRK_ATI_3C3_READ_ENABLED 1 |
319 | #define TRACE_VFIO_QUIRK_ATI_3C3_PROBE_ENABLED 1 |
320 | #define TRACE_VFIO_QUIRK_ATI_BAR4_PROBE_ENABLED 1 |
321 | #define TRACE_VFIO_QUIRK_ATI_BAR2_PROBE_ENABLED 1 |
322 | #define TRACE_VFIO_QUIRK_NVIDIA_3D0_STATE_ENABLED 1 |
323 | #define TRACE_VFIO_QUIRK_NVIDIA_3D0_READ_ENABLED 1 |
324 | #define TRACE_VFIO_QUIRK_NVIDIA_3D0_WRITE_ENABLED 1 |
325 | #define TRACE_VFIO_QUIRK_NVIDIA_3D0_PROBE_ENABLED 1 |
326 | #define TRACE_VFIO_QUIRK_NVIDIA_BAR5_STATE_ENABLED 1 |
327 | #define TRACE_VFIO_QUIRK_NVIDIA_BAR5_PROBE_ENABLED 1 |
328 | #define TRACE_VFIO_QUIRK_NVIDIA_BAR0_MSI_ACK_ENABLED 1 |
329 | #define TRACE_VFIO_QUIRK_NVIDIA_BAR0_PROBE_ENABLED 1 |
330 | #define TRACE_VFIO_QUIRK_RTL8168_FAKE_LATCH_ENABLED 1 |
331 | #define TRACE_VFIO_QUIRK_RTL8168_MSIX_WRITE_ENABLED 1 |
332 | #define TRACE_VFIO_QUIRK_RTL8168_MSIX_READ_ENABLED 1 |
333 | #define TRACE_VFIO_QUIRK_RTL8168_PROBE_ENABLED 1 |
334 | #define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_SKIPPED_ENABLED 1 |
335 | #define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_NO_SMC_ENABLED 1 |
336 | #define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_TIMEOUT_ENABLED 1 |
337 | #define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_DONE_ENABLED 1 |
338 | #define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_ENABLED 1 |
339 | #define TRACE_VFIO_IOEVENTFD_EXIT_ENABLED 1 |
340 | #define TRACE_VFIO_IOEVENTFD_HANDLER_ENABLED 1 |
341 | #define TRACE_VFIO_IOEVENTFD_INIT_ENABLED 1 |
342 | #define TRACE_VFIO_PCI_IGD_BAR4_WRITE_ENABLED 1 |
343 | #define TRACE_VFIO_PCI_IGD_BDSM_ENABLED_ENABLED 1 |
344 | #define TRACE_VFIO_PCI_IGD_OPREGION_ENABLED_ENABLED 1 |
345 | #define TRACE_VFIO_PCI_IGD_HOST_BRIDGE_ENABLED_ENABLED 1 |
346 | #define TRACE_VFIO_PCI_IGD_LPC_BRIDGE_ENABLED_ENABLED 1 |
347 | #define TRACE_VFIO_PCI_NVIDIA_GPU_SETUP_QUIRK_ENABLED 1 |
348 | #define TRACE_VFIO_PCI_NVLINK2_SETUP_QUIRK_SSATGT_ENABLED 1 |
349 | #define TRACE_VFIO_PCI_NVLINK2_SETUP_QUIRK_LNKSPD_ENABLED 1 |
350 | #define TRACE_VFIO_REGION_WRITE_ENABLED 1 |
351 | #define TRACE_VFIO_REGION_READ_ENABLED 1 |
352 | #define TRACE_VFIO_IOMMU_MAP_NOTIFY_ENABLED 1 |
353 | #define TRACE_VFIO_LISTENER_REGION_ADD_SKIP_ENABLED 1 |
354 | #define TRACE_VFIO_SPAPR_GROUP_ATTACH_ENABLED 1 |
355 | #define TRACE_VFIO_LISTENER_REGION_ADD_IOMMU_ENABLED 1 |
356 | #define TRACE_VFIO_LISTENER_REGION_ADD_RAM_ENABLED 1 |
357 | #define TRACE_VFIO_LISTENER_REGION_ADD_NO_DMA_MAP_ENABLED 1 |
358 | #define TRACE_VFIO_LISTENER_REGION_DEL_SKIP_ENABLED 1 |
359 | #define TRACE_VFIO_LISTENER_REGION_DEL_ENABLED 1 |
360 | #define TRACE_VFIO_DISCONNECT_CONTAINER_ENABLED 1 |
361 | #define TRACE_VFIO_PUT_GROUP_ENABLED 1 |
362 | #define TRACE_VFIO_GET_DEVICE_ENABLED 1 |
363 | #define TRACE_VFIO_PUT_BASE_DEVICE_ENABLED 1 |
364 | #define TRACE_VFIO_REGION_SETUP_ENABLED 1 |
365 | #define TRACE_VFIO_REGION_MMAP_FAULT_ENABLED 1 |
366 | #define TRACE_VFIO_REGION_MMAP_ENABLED 1 |
367 | #define TRACE_VFIO_REGION_EXIT_ENABLED 1 |
368 | #define TRACE_VFIO_REGION_FINALIZE_ENABLED 1 |
369 | #define TRACE_VFIO_REGION_MMAPS_SET_ENABLED_ENABLED 1 |
370 | #define 1 |
371 | #define TRACE_VFIO_REGION_SPARSE_MMAP_ENTRY_ENABLED 1 |
372 | #define TRACE_VFIO_GET_DEV_REGION_ENABLED 1 |
373 | #define TRACE_VFIO_DMA_UNMAP_OVERFLOW_WORKAROUND_ENABLED 1 |
374 | #define TRACE_VFIO_PLATFORM_BASE_DEVICE_INIT_ENABLED 1 |
375 | #define TRACE_VFIO_PLATFORM_REALIZE_ENABLED 1 |
376 | #define TRACE_VFIO_PLATFORM_EOI_ENABLED 1 |
377 | #define TRACE_VFIO_PLATFORM_INTP_MMAP_ENABLE_ENABLED 1 |
378 | #define TRACE_VFIO_PLATFORM_INTP_INTERRUPT_ENABLED 1 |
379 | #define TRACE_VFIO_PLATFORM_INTP_INJECT_PENDING_LOCKHELD_ENABLED 1 |
380 | #define TRACE_VFIO_PLATFORM_POPULATE_INTERRUPTS_ENABLED 1 |
381 | #define TRACE_VFIO_INTP_INTERRUPT_SET_PENDING_ENABLED 1 |
382 | #define TRACE_VFIO_PLATFORM_START_LEVEL_IRQFD_INJECTION_ENABLED 1 |
383 | #define TRACE_VFIO_PLATFORM_START_EDGE_IRQFD_INJECTION_ENABLED 1 |
384 | #define TRACE_VFIO_PREREG_LISTENER_REGION_ADD_SKIP_ENABLED 1 |
385 | #define TRACE_VFIO_PREREG_LISTENER_REGION_DEL_SKIP_ENABLED 1 |
386 | #define TRACE_VFIO_PREREG_REGISTER_ENABLED 1 |
387 | #define TRACE_VFIO_PREREG_UNREGISTER_ENABLED 1 |
388 | #define TRACE_VFIO_SPAPR_CREATE_WINDOW_ENABLED 1 |
389 | #define TRACE_VFIO_SPAPR_REMOVE_WINDOW_ENABLED 1 |
390 | #define TRACE_VFIO_DISPLAY_EDID_AVAILABLE_ENABLED 1 |
391 | #define TRACE_VFIO_DISPLAY_EDID_LINK_UP_ENABLED 1 |
392 | #define TRACE_VFIO_DISPLAY_EDID_LINK_DOWN_ENABLED 1 |
393 | #define TRACE_VFIO_DISPLAY_EDID_UPDATE_ENABLED 1 |
394 | #define TRACE_VFIO_DISPLAY_EDID_WRITE_ERROR_ENABLED 1 |
395 | #include "qemu/log-for-trace.h" |
396 | |
397 | |
398 | #define TRACE_VFIO_INTX_INTERRUPT_BACKEND_DSTATE() ( \ |
399 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_INTX_INTERRUPT) || \ |
400 | false) |
401 | |
402 | static inline void _nocheck__trace_vfio_intx_interrupt(const char * name, char line) |
403 | { |
404 | if (trace_event_get_state(TRACE_VFIO_INTX_INTERRUPT) && qemu_loglevel_mask(LOG_TRACE)) { |
405 | struct timeval _now; |
406 | gettimeofday(&_now, NULL); |
407 | qemu_log("%d@%zu.%06zu:vfio_intx_interrupt " " (%s) Pin %c" "\n" , |
408 | qemu_get_thread_id(), |
409 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
410 | , name, line); |
411 | } |
412 | } |
413 | |
414 | static inline void trace_vfio_intx_interrupt(const char * name, char line) |
415 | { |
416 | if (true) { |
417 | _nocheck__trace_vfio_intx_interrupt(name, line); |
418 | } |
419 | } |
420 | |
421 | #define TRACE_VFIO_INTX_EOI_BACKEND_DSTATE() ( \ |
422 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_INTX_EOI) || \ |
423 | false) |
424 | |
425 | static inline void _nocheck__trace_vfio_intx_eoi(const char * name) |
426 | { |
427 | if (trace_event_get_state(TRACE_VFIO_INTX_EOI) && qemu_loglevel_mask(LOG_TRACE)) { |
428 | struct timeval _now; |
429 | gettimeofday(&_now, NULL); |
430 | qemu_log("%d@%zu.%06zu:vfio_intx_eoi " " (%s) EOI" "\n" , |
431 | qemu_get_thread_id(), |
432 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
433 | , name); |
434 | } |
435 | } |
436 | |
437 | static inline void trace_vfio_intx_eoi(const char * name) |
438 | { |
439 | if (true) { |
440 | _nocheck__trace_vfio_intx_eoi(name); |
441 | } |
442 | } |
443 | |
444 | #define TRACE_VFIO_INTX_ENABLE_KVM_BACKEND_DSTATE() ( \ |
445 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_INTX_ENABLE_KVM) || \ |
446 | false) |
447 | |
448 | static inline void _nocheck__trace_vfio_intx_enable_kvm(const char * name) |
449 | { |
450 | if (trace_event_get_state(TRACE_VFIO_INTX_ENABLE_KVM) && qemu_loglevel_mask(LOG_TRACE)) { |
451 | struct timeval _now; |
452 | gettimeofday(&_now, NULL); |
453 | qemu_log("%d@%zu.%06zu:vfio_intx_enable_kvm " " (%s) KVM INTx accel enabled" "\n" , |
454 | qemu_get_thread_id(), |
455 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
456 | , name); |
457 | } |
458 | } |
459 | |
460 | static inline void trace_vfio_intx_enable_kvm(const char * name) |
461 | { |
462 | if (true) { |
463 | _nocheck__trace_vfio_intx_enable_kvm(name); |
464 | } |
465 | } |
466 | |
467 | #define TRACE_VFIO_INTX_DISABLE_KVM_BACKEND_DSTATE() ( \ |
468 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_INTX_DISABLE_KVM) || \ |
469 | false) |
470 | |
471 | static inline void _nocheck__trace_vfio_intx_disable_kvm(const char * name) |
472 | { |
473 | if (trace_event_get_state(TRACE_VFIO_INTX_DISABLE_KVM) && qemu_loglevel_mask(LOG_TRACE)) { |
474 | struct timeval _now; |
475 | gettimeofday(&_now, NULL); |
476 | qemu_log("%d@%zu.%06zu:vfio_intx_disable_kvm " " (%s) KVM INTx accel disabled" "\n" , |
477 | qemu_get_thread_id(), |
478 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
479 | , name); |
480 | } |
481 | } |
482 | |
483 | static inline void trace_vfio_intx_disable_kvm(const char * name) |
484 | { |
485 | if (true) { |
486 | _nocheck__trace_vfio_intx_disable_kvm(name); |
487 | } |
488 | } |
489 | |
490 | #define TRACE_VFIO_INTX_UPDATE_BACKEND_DSTATE() ( \ |
491 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_INTX_UPDATE) || \ |
492 | false) |
493 | |
494 | static inline void _nocheck__trace_vfio_intx_update(const char * name, int new_irq, int target_irq) |
495 | { |
496 | if (trace_event_get_state(TRACE_VFIO_INTX_UPDATE) && qemu_loglevel_mask(LOG_TRACE)) { |
497 | struct timeval _now; |
498 | gettimeofday(&_now, NULL); |
499 | qemu_log("%d@%zu.%06zu:vfio_intx_update " " (%s) IRQ moved %d -> %d" "\n" , |
500 | qemu_get_thread_id(), |
501 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
502 | , name, new_irq, target_irq); |
503 | } |
504 | } |
505 | |
506 | static inline void trace_vfio_intx_update(const char * name, int new_irq, int target_irq) |
507 | { |
508 | if (true) { |
509 | _nocheck__trace_vfio_intx_update(name, new_irq, target_irq); |
510 | } |
511 | } |
512 | |
513 | #define TRACE_VFIO_INTX_ENABLE_BACKEND_DSTATE() ( \ |
514 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_INTX_ENABLE) || \ |
515 | false) |
516 | |
517 | static inline void _nocheck__trace_vfio_intx_enable(const char * name) |
518 | { |
519 | if (trace_event_get_state(TRACE_VFIO_INTX_ENABLE) && qemu_loglevel_mask(LOG_TRACE)) { |
520 | struct timeval _now; |
521 | gettimeofday(&_now, NULL); |
522 | qemu_log("%d@%zu.%06zu:vfio_intx_enable " " (%s)" "\n" , |
523 | qemu_get_thread_id(), |
524 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
525 | , name); |
526 | } |
527 | } |
528 | |
529 | static inline void trace_vfio_intx_enable(const char * name) |
530 | { |
531 | if (true) { |
532 | _nocheck__trace_vfio_intx_enable(name); |
533 | } |
534 | } |
535 | |
536 | #define TRACE_VFIO_INTX_DISABLE_BACKEND_DSTATE() ( \ |
537 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_INTX_DISABLE) || \ |
538 | false) |
539 | |
540 | static inline void _nocheck__trace_vfio_intx_disable(const char * name) |
541 | { |
542 | if (trace_event_get_state(TRACE_VFIO_INTX_DISABLE) && qemu_loglevel_mask(LOG_TRACE)) { |
543 | struct timeval _now; |
544 | gettimeofday(&_now, NULL); |
545 | qemu_log("%d@%zu.%06zu:vfio_intx_disable " " (%s)" "\n" , |
546 | qemu_get_thread_id(), |
547 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
548 | , name); |
549 | } |
550 | } |
551 | |
552 | static inline void trace_vfio_intx_disable(const char * name) |
553 | { |
554 | if (true) { |
555 | _nocheck__trace_vfio_intx_disable(name); |
556 | } |
557 | } |
558 | |
559 | #define TRACE_VFIO_MSI_INTERRUPT_BACKEND_DSTATE() ( \ |
560 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_MSI_INTERRUPT) || \ |
561 | false) |
562 | |
563 | static inline void _nocheck__trace_vfio_msi_interrupt(const char * name, int index, uint64_t addr, int data) |
564 | { |
565 | if (trace_event_get_state(TRACE_VFIO_MSI_INTERRUPT) && qemu_loglevel_mask(LOG_TRACE)) { |
566 | struct timeval _now; |
567 | gettimeofday(&_now, NULL); |
568 | qemu_log("%d@%zu.%06zu:vfio_msi_interrupt " " (%s) vector %d 0x%" PRIx64"/0x%x" "\n" , |
569 | qemu_get_thread_id(), |
570 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
571 | , name, index, addr, data); |
572 | } |
573 | } |
574 | |
575 | static inline void trace_vfio_msi_interrupt(const char * name, int index, uint64_t addr, int data) |
576 | { |
577 | if (true) { |
578 | _nocheck__trace_vfio_msi_interrupt(name, index, addr, data); |
579 | } |
580 | } |
581 | |
582 | #define TRACE_VFIO_MSIX_VECTOR_DO_USE_BACKEND_DSTATE() ( \ |
583 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_MSIX_VECTOR_DO_USE) || \ |
584 | false) |
585 | |
586 | static inline void _nocheck__trace_vfio_msix_vector_do_use(const char * name, int index) |
587 | { |
588 | if (trace_event_get_state(TRACE_VFIO_MSIX_VECTOR_DO_USE) && qemu_loglevel_mask(LOG_TRACE)) { |
589 | struct timeval _now; |
590 | gettimeofday(&_now, NULL); |
591 | qemu_log("%d@%zu.%06zu:vfio_msix_vector_do_use " " (%s) vector %d used" "\n" , |
592 | qemu_get_thread_id(), |
593 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
594 | , name, index); |
595 | } |
596 | } |
597 | |
598 | static inline void trace_vfio_msix_vector_do_use(const char * name, int index) |
599 | { |
600 | if (true) { |
601 | _nocheck__trace_vfio_msix_vector_do_use(name, index); |
602 | } |
603 | } |
604 | |
605 | #define TRACE_VFIO_MSIX_VECTOR_RELEASE_BACKEND_DSTATE() ( \ |
606 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_MSIX_VECTOR_RELEASE) || \ |
607 | false) |
608 | |
609 | static inline void _nocheck__trace_vfio_msix_vector_release(const char * name, int index) |
610 | { |
611 | if (trace_event_get_state(TRACE_VFIO_MSIX_VECTOR_RELEASE) && qemu_loglevel_mask(LOG_TRACE)) { |
612 | struct timeval _now; |
613 | gettimeofday(&_now, NULL); |
614 | qemu_log("%d@%zu.%06zu:vfio_msix_vector_release " " (%s) vector %d released" "\n" , |
615 | qemu_get_thread_id(), |
616 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
617 | , name, index); |
618 | } |
619 | } |
620 | |
621 | static inline void trace_vfio_msix_vector_release(const char * name, int index) |
622 | { |
623 | if (true) { |
624 | _nocheck__trace_vfio_msix_vector_release(name, index); |
625 | } |
626 | } |
627 | |
628 | #define TRACE_VFIO_MSIX_ENABLE_BACKEND_DSTATE() ( \ |
629 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_MSIX_ENABLE) || \ |
630 | false) |
631 | |
632 | static inline void _nocheck__trace_vfio_msix_enable(const char * name) |
633 | { |
634 | if (trace_event_get_state(TRACE_VFIO_MSIX_ENABLE) && qemu_loglevel_mask(LOG_TRACE)) { |
635 | struct timeval _now; |
636 | gettimeofday(&_now, NULL); |
637 | qemu_log("%d@%zu.%06zu:vfio_msix_enable " " (%s)" "\n" , |
638 | qemu_get_thread_id(), |
639 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
640 | , name); |
641 | } |
642 | } |
643 | |
644 | static inline void trace_vfio_msix_enable(const char * name) |
645 | { |
646 | if (true) { |
647 | _nocheck__trace_vfio_msix_enable(name); |
648 | } |
649 | } |
650 | |
651 | #define TRACE_VFIO_MSIX_PBA_DISABLE_BACKEND_DSTATE() ( \ |
652 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_MSIX_PBA_DISABLE) || \ |
653 | false) |
654 | |
655 | static inline void _nocheck__trace_vfio_msix_pba_disable(const char * name) |
656 | { |
657 | if (trace_event_get_state(TRACE_VFIO_MSIX_PBA_DISABLE) && qemu_loglevel_mask(LOG_TRACE)) { |
658 | struct timeval _now; |
659 | gettimeofday(&_now, NULL); |
660 | qemu_log("%d@%zu.%06zu:vfio_msix_pba_disable " " (%s)" "\n" , |
661 | qemu_get_thread_id(), |
662 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
663 | , name); |
664 | } |
665 | } |
666 | |
667 | static inline void trace_vfio_msix_pba_disable(const char * name) |
668 | { |
669 | if (true) { |
670 | _nocheck__trace_vfio_msix_pba_disable(name); |
671 | } |
672 | } |
673 | |
674 | #define TRACE_VFIO_MSIX_PBA_ENABLE_BACKEND_DSTATE() ( \ |
675 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_MSIX_PBA_ENABLE) || \ |
676 | false) |
677 | |
678 | static inline void _nocheck__trace_vfio_msix_pba_enable(const char * name) |
679 | { |
680 | if (trace_event_get_state(TRACE_VFIO_MSIX_PBA_ENABLE) && qemu_loglevel_mask(LOG_TRACE)) { |
681 | struct timeval _now; |
682 | gettimeofday(&_now, NULL); |
683 | qemu_log("%d@%zu.%06zu:vfio_msix_pba_enable " " (%s)" "\n" , |
684 | qemu_get_thread_id(), |
685 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
686 | , name); |
687 | } |
688 | } |
689 | |
690 | static inline void trace_vfio_msix_pba_enable(const char * name) |
691 | { |
692 | if (true) { |
693 | _nocheck__trace_vfio_msix_pba_enable(name); |
694 | } |
695 | } |
696 | |
697 | #define TRACE_VFIO_MSIX_DISABLE_BACKEND_DSTATE() ( \ |
698 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_MSIX_DISABLE) || \ |
699 | false) |
700 | |
701 | static inline void _nocheck__trace_vfio_msix_disable(const char * name) |
702 | { |
703 | if (trace_event_get_state(TRACE_VFIO_MSIX_DISABLE) && qemu_loglevel_mask(LOG_TRACE)) { |
704 | struct timeval _now; |
705 | gettimeofday(&_now, NULL); |
706 | qemu_log("%d@%zu.%06zu:vfio_msix_disable " " (%s)" "\n" , |
707 | qemu_get_thread_id(), |
708 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
709 | , name); |
710 | } |
711 | } |
712 | |
713 | static inline void trace_vfio_msix_disable(const char * name) |
714 | { |
715 | if (true) { |
716 | _nocheck__trace_vfio_msix_disable(name); |
717 | } |
718 | } |
719 | |
720 | #define TRACE_VFIO_MSIX_FIXUP_BACKEND_DSTATE() ( \ |
721 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_MSIX_FIXUP) || \ |
722 | false) |
723 | |
724 | static inline void _nocheck__trace_vfio_msix_fixup(const char * name, int bar, uint64_t start, uint64_t end) |
725 | { |
726 | if (trace_event_get_state(TRACE_VFIO_MSIX_FIXUP) && qemu_loglevel_mask(LOG_TRACE)) { |
727 | struct timeval _now; |
728 | gettimeofday(&_now, NULL); |
729 | qemu_log("%d@%zu.%06zu:vfio_msix_fixup " " (%s) MSI-X region %d mmap fixup [0x%" PRIx64" - 0x%" PRIx64"]" "\n" , |
730 | qemu_get_thread_id(), |
731 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
732 | , name, bar, start, end); |
733 | } |
734 | } |
735 | |
736 | static inline void trace_vfio_msix_fixup(const char * name, int bar, uint64_t start, uint64_t end) |
737 | { |
738 | if (true) { |
739 | _nocheck__trace_vfio_msix_fixup(name, bar, start, end); |
740 | } |
741 | } |
742 | |
743 | #define TRACE_VFIO_MSIX_RELO_BACKEND_DSTATE() ( \ |
744 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_MSIX_RELO) || \ |
745 | false) |
746 | |
747 | static inline void _nocheck__trace_vfio_msix_relo(const char * name, int bar, uint64_t offset) |
748 | { |
749 | if (trace_event_get_state(TRACE_VFIO_MSIX_RELO) && qemu_loglevel_mask(LOG_TRACE)) { |
750 | struct timeval _now; |
751 | gettimeofday(&_now, NULL); |
752 | qemu_log("%d@%zu.%06zu:vfio_msix_relo " " (%s) BAR %d offset 0x%" PRIx64"" "\n" , |
753 | qemu_get_thread_id(), |
754 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
755 | , name, bar, offset); |
756 | } |
757 | } |
758 | |
759 | static inline void trace_vfio_msix_relo(const char * name, int bar, uint64_t offset) |
760 | { |
761 | if (true) { |
762 | _nocheck__trace_vfio_msix_relo(name, bar, offset); |
763 | } |
764 | } |
765 | |
766 | #define TRACE_VFIO_MSI_ENABLE_BACKEND_DSTATE() ( \ |
767 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_MSI_ENABLE) || \ |
768 | false) |
769 | |
770 | static inline void _nocheck__trace_vfio_msi_enable(const char * name, int nr_vectors) |
771 | { |
772 | if (trace_event_get_state(TRACE_VFIO_MSI_ENABLE) && qemu_loglevel_mask(LOG_TRACE)) { |
773 | struct timeval _now; |
774 | gettimeofday(&_now, NULL); |
775 | qemu_log("%d@%zu.%06zu:vfio_msi_enable " " (%s) Enabled %d MSI vectors" "\n" , |
776 | qemu_get_thread_id(), |
777 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
778 | , name, nr_vectors); |
779 | } |
780 | } |
781 | |
782 | static inline void trace_vfio_msi_enable(const char * name, int nr_vectors) |
783 | { |
784 | if (true) { |
785 | _nocheck__trace_vfio_msi_enable(name, nr_vectors); |
786 | } |
787 | } |
788 | |
789 | #define TRACE_VFIO_MSI_DISABLE_BACKEND_DSTATE() ( \ |
790 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_MSI_DISABLE) || \ |
791 | false) |
792 | |
793 | static inline void _nocheck__trace_vfio_msi_disable(const char * name) |
794 | { |
795 | if (trace_event_get_state(TRACE_VFIO_MSI_DISABLE) && qemu_loglevel_mask(LOG_TRACE)) { |
796 | struct timeval _now; |
797 | gettimeofday(&_now, NULL); |
798 | qemu_log("%d@%zu.%06zu:vfio_msi_disable " " (%s)" "\n" , |
799 | qemu_get_thread_id(), |
800 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
801 | , name); |
802 | } |
803 | } |
804 | |
805 | static inline void trace_vfio_msi_disable(const char * name) |
806 | { |
807 | if (true) { |
808 | _nocheck__trace_vfio_msi_disable(name); |
809 | } |
810 | } |
811 | |
812 | #define TRACE_VFIO_PCI_LOAD_ROM_BACKEND_DSTATE() ( \ |
813 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_LOAD_ROM) || \ |
814 | false) |
815 | |
816 | static inline void _nocheck__trace_vfio_pci_load_rom(const char * name, unsigned long size, unsigned long offset, unsigned long flags) |
817 | { |
818 | if (trace_event_get_state(TRACE_VFIO_PCI_LOAD_ROM) && qemu_loglevel_mask(LOG_TRACE)) { |
819 | struct timeval _now; |
820 | gettimeofday(&_now, NULL); |
821 | qemu_log("%d@%zu.%06zu:vfio_pci_load_rom " "Device %s ROM:\n size: 0x%lx, offset: 0x%lx, flags: 0x%lx" "\n" , |
822 | qemu_get_thread_id(), |
823 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
824 | , name, size, offset, flags); |
825 | } |
826 | } |
827 | |
828 | static inline void trace_vfio_pci_load_rom(const char * name, unsigned long size, unsigned long offset, unsigned long flags) |
829 | { |
830 | if (true) { |
831 | _nocheck__trace_vfio_pci_load_rom(name, size, offset, flags); |
832 | } |
833 | } |
834 | |
835 | #define TRACE_VFIO_ROM_READ_BACKEND_DSTATE() ( \ |
836 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_ROM_READ) || \ |
837 | false) |
838 | |
839 | static inline void _nocheck__trace_vfio_rom_read(const char * name, uint64_t addr, int size, uint64_t data) |
840 | { |
841 | if (trace_event_get_state(TRACE_VFIO_ROM_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
842 | struct timeval _now; |
843 | gettimeofday(&_now, NULL); |
844 | qemu_log("%d@%zu.%06zu:vfio_rom_read " " (%s, 0x%" PRIx64", 0x%x) = 0x%" PRIx64 "\n" , |
845 | qemu_get_thread_id(), |
846 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
847 | , name, addr, size, data); |
848 | } |
849 | } |
850 | |
851 | static inline void trace_vfio_rom_read(const char * name, uint64_t addr, int size, uint64_t data) |
852 | { |
853 | if (true) { |
854 | _nocheck__trace_vfio_rom_read(name, addr, size, data); |
855 | } |
856 | } |
857 | |
858 | #define TRACE_VFIO_PCI_SIZE_ROM_BACKEND_DSTATE() ( \ |
859 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_SIZE_ROM) || \ |
860 | false) |
861 | |
862 | static inline void _nocheck__trace_vfio_pci_size_rom(const char * name, int size) |
863 | { |
864 | if (trace_event_get_state(TRACE_VFIO_PCI_SIZE_ROM) && qemu_loglevel_mask(LOG_TRACE)) { |
865 | struct timeval _now; |
866 | gettimeofday(&_now, NULL); |
867 | qemu_log("%d@%zu.%06zu:vfio_pci_size_rom " "%s ROM size 0x%x" "\n" , |
868 | qemu_get_thread_id(), |
869 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
870 | , name, size); |
871 | } |
872 | } |
873 | |
874 | static inline void trace_vfio_pci_size_rom(const char * name, int size) |
875 | { |
876 | if (true) { |
877 | _nocheck__trace_vfio_pci_size_rom(name, size); |
878 | } |
879 | } |
880 | |
881 | #define TRACE_VFIO_VGA_WRITE_BACKEND_DSTATE() ( \ |
882 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_VGA_WRITE) || \ |
883 | false) |
884 | |
885 | static inline void _nocheck__trace_vfio_vga_write(uint64_t addr, uint64_t data, int size) |
886 | { |
887 | if (trace_event_get_state(TRACE_VFIO_VGA_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
888 | struct timeval _now; |
889 | gettimeofday(&_now, NULL); |
890 | qemu_log("%d@%zu.%06zu:vfio_vga_write " " (0x%" PRIx64", 0x%" PRIx64", %d)" "\n" , |
891 | qemu_get_thread_id(), |
892 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
893 | , addr, data, size); |
894 | } |
895 | } |
896 | |
897 | static inline void trace_vfio_vga_write(uint64_t addr, uint64_t data, int size) |
898 | { |
899 | if (true) { |
900 | _nocheck__trace_vfio_vga_write(addr, data, size); |
901 | } |
902 | } |
903 | |
904 | #define TRACE_VFIO_VGA_READ_BACKEND_DSTATE() ( \ |
905 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_VGA_READ) || \ |
906 | false) |
907 | |
908 | static inline void _nocheck__trace_vfio_vga_read(uint64_t addr, int size, uint64_t data) |
909 | { |
910 | if (trace_event_get_state(TRACE_VFIO_VGA_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
911 | struct timeval _now; |
912 | gettimeofday(&_now, NULL); |
913 | qemu_log("%d@%zu.%06zu:vfio_vga_read " " (0x%" PRIx64", %d) = 0x%" PRIx64 "\n" , |
914 | qemu_get_thread_id(), |
915 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
916 | , addr, size, data); |
917 | } |
918 | } |
919 | |
920 | static inline void trace_vfio_vga_read(uint64_t addr, int size, uint64_t data) |
921 | { |
922 | if (true) { |
923 | _nocheck__trace_vfio_vga_read(addr, size, data); |
924 | } |
925 | } |
926 | |
927 | #define TRACE_VFIO_PCI_READ_CONFIG_BACKEND_DSTATE() ( \ |
928 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_READ_CONFIG) || \ |
929 | false) |
930 | |
931 | static inline void _nocheck__trace_vfio_pci_read_config(const char * name, int addr, int len, int val) |
932 | { |
933 | if (trace_event_get_state(TRACE_VFIO_PCI_READ_CONFIG) && qemu_loglevel_mask(LOG_TRACE)) { |
934 | struct timeval _now; |
935 | gettimeofday(&_now, NULL); |
936 | qemu_log("%d@%zu.%06zu:vfio_pci_read_config " " (%s, @0x%x, len=0x%x) 0x%x" "\n" , |
937 | qemu_get_thread_id(), |
938 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
939 | , name, addr, len, val); |
940 | } |
941 | } |
942 | |
943 | static inline void trace_vfio_pci_read_config(const char * name, int addr, int len, int val) |
944 | { |
945 | if (true) { |
946 | _nocheck__trace_vfio_pci_read_config(name, addr, len, val); |
947 | } |
948 | } |
949 | |
950 | #define TRACE_VFIO_PCI_WRITE_CONFIG_BACKEND_DSTATE() ( \ |
951 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_WRITE_CONFIG) || \ |
952 | false) |
953 | |
954 | static inline void _nocheck__trace_vfio_pci_write_config(const char * name, int addr, int val, int len) |
955 | { |
956 | if (trace_event_get_state(TRACE_VFIO_PCI_WRITE_CONFIG) && qemu_loglevel_mask(LOG_TRACE)) { |
957 | struct timeval _now; |
958 | gettimeofday(&_now, NULL); |
959 | qemu_log("%d@%zu.%06zu:vfio_pci_write_config " " (%s, @0x%x, 0x%x, len=0x%x)" "\n" , |
960 | qemu_get_thread_id(), |
961 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
962 | , name, addr, val, len); |
963 | } |
964 | } |
965 | |
966 | static inline void trace_vfio_pci_write_config(const char * name, int addr, int val, int len) |
967 | { |
968 | if (true) { |
969 | _nocheck__trace_vfio_pci_write_config(name, addr, val, len); |
970 | } |
971 | } |
972 | |
973 | #define TRACE_VFIO_MSI_SETUP_BACKEND_DSTATE() ( \ |
974 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_MSI_SETUP) || \ |
975 | false) |
976 | |
977 | static inline void _nocheck__trace_vfio_msi_setup(const char * name, int pos) |
978 | { |
979 | if (trace_event_get_state(TRACE_VFIO_MSI_SETUP) && qemu_loglevel_mask(LOG_TRACE)) { |
980 | struct timeval _now; |
981 | gettimeofday(&_now, NULL); |
982 | qemu_log("%d@%zu.%06zu:vfio_msi_setup " "%s PCI MSI CAP @0x%x" "\n" , |
983 | qemu_get_thread_id(), |
984 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
985 | , name, pos); |
986 | } |
987 | } |
988 | |
989 | static inline void trace_vfio_msi_setup(const char * name, int pos) |
990 | { |
991 | if (true) { |
992 | _nocheck__trace_vfio_msi_setup(name, pos); |
993 | } |
994 | } |
995 | |
996 | #define TRACE_VFIO_MSIX_EARLY_SETUP_BACKEND_DSTATE() ( \ |
997 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_MSIX_EARLY_SETUP) || \ |
998 | false) |
999 | |
1000 | static inline void _nocheck__trace_vfio_msix_early_setup(const char * name, int pos, int table_bar, int offset, int entries) |
1001 | { |
1002 | if (trace_event_get_state(TRACE_VFIO_MSIX_EARLY_SETUP) && qemu_loglevel_mask(LOG_TRACE)) { |
1003 | struct timeval _now; |
1004 | gettimeofday(&_now, NULL); |
1005 | qemu_log("%d@%zu.%06zu:vfio_msix_early_setup " "%s PCI MSI-X CAP @0x%x, BAR %d, offset 0x%x, entries %d" "\n" , |
1006 | qemu_get_thread_id(), |
1007 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1008 | , name, pos, table_bar, offset, entries); |
1009 | } |
1010 | } |
1011 | |
1012 | static inline void trace_vfio_msix_early_setup(const char * name, int pos, int table_bar, int offset, int entries) |
1013 | { |
1014 | if (true) { |
1015 | _nocheck__trace_vfio_msix_early_setup(name, pos, table_bar, offset, entries); |
1016 | } |
1017 | } |
1018 | |
1019 | #define TRACE_VFIO_CHECK_PCIE_FLR_BACKEND_DSTATE() ( \ |
1020 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_CHECK_PCIE_FLR) || \ |
1021 | false) |
1022 | |
1023 | static inline void _nocheck__trace_vfio_check_pcie_flr(const char * name) |
1024 | { |
1025 | if (trace_event_get_state(TRACE_VFIO_CHECK_PCIE_FLR) && qemu_loglevel_mask(LOG_TRACE)) { |
1026 | struct timeval _now; |
1027 | gettimeofday(&_now, NULL); |
1028 | qemu_log("%d@%zu.%06zu:vfio_check_pcie_flr " "%s Supports FLR via PCIe cap" "\n" , |
1029 | qemu_get_thread_id(), |
1030 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1031 | , name); |
1032 | } |
1033 | } |
1034 | |
1035 | static inline void trace_vfio_check_pcie_flr(const char * name) |
1036 | { |
1037 | if (true) { |
1038 | _nocheck__trace_vfio_check_pcie_flr(name); |
1039 | } |
1040 | } |
1041 | |
1042 | #define TRACE_VFIO_CHECK_PM_RESET_BACKEND_DSTATE() ( \ |
1043 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_CHECK_PM_RESET) || \ |
1044 | false) |
1045 | |
1046 | static inline void _nocheck__trace_vfio_check_pm_reset(const char * name) |
1047 | { |
1048 | if (trace_event_get_state(TRACE_VFIO_CHECK_PM_RESET) && qemu_loglevel_mask(LOG_TRACE)) { |
1049 | struct timeval _now; |
1050 | gettimeofday(&_now, NULL); |
1051 | qemu_log("%d@%zu.%06zu:vfio_check_pm_reset " "%s Supports PM reset" "\n" , |
1052 | qemu_get_thread_id(), |
1053 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1054 | , name); |
1055 | } |
1056 | } |
1057 | |
1058 | static inline void trace_vfio_check_pm_reset(const char * name) |
1059 | { |
1060 | if (true) { |
1061 | _nocheck__trace_vfio_check_pm_reset(name); |
1062 | } |
1063 | } |
1064 | |
1065 | #define TRACE_VFIO_CHECK_AF_FLR_BACKEND_DSTATE() ( \ |
1066 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_CHECK_AF_FLR) || \ |
1067 | false) |
1068 | |
1069 | static inline void _nocheck__trace_vfio_check_af_flr(const char * name) |
1070 | { |
1071 | if (trace_event_get_state(TRACE_VFIO_CHECK_AF_FLR) && qemu_loglevel_mask(LOG_TRACE)) { |
1072 | struct timeval _now; |
1073 | gettimeofday(&_now, NULL); |
1074 | qemu_log("%d@%zu.%06zu:vfio_check_af_flr " "%s Supports FLR via AF cap" "\n" , |
1075 | qemu_get_thread_id(), |
1076 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1077 | , name); |
1078 | } |
1079 | } |
1080 | |
1081 | static inline void trace_vfio_check_af_flr(const char * name) |
1082 | { |
1083 | if (true) { |
1084 | _nocheck__trace_vfio_check_af_flr(name); |
1085 | } |
1086 | } |
1087 | |
1088 | #define TRACE_VFIO_PCI_HOT_RESET_BACKEND_DSTATE() ( \ |
1089 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_HOT_RESET) || \ |
1090 | false) |
1091 | |
1092 | static inline void _nocheck__trace_vfio_pci_hot_reset(const char * name, const char * type) |
1093 | { |
1094 | if (trace_event_get_state(TRACE_VFIO_PCI_HOT_RESET) && qemu_loglevel_mask(LOG_TRACE)) { |
1095 | struct timeval _now; |
1096 | gettimeofday(&_now, NULL); |
1097 | qemu_log("%d@%zu.%06zu:vfio_pci_hot_reset " " (%s) %s" "\n" , |
1098 | qemu_get_thread_id(), |
1099 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1100 | , name, type); |
1101 | } |
1102 | } |
1103 | |
1104 | static inline void trace_vfio_pci_hot_reset(const char * name, const char * type) |
1105 | { |
1106 | if (true) { |
1107 | _nocheck__trace_vfio_pci_hot_reset(name, type); |
1108 | } |
1109 | } |
1110 | |
1111 | #define TRACE_VFIO_PCI_HOT_RESET_HAS_DEP_DEVICES_BACKEND_DSTATE() ( \ |
1112 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_HOT_RESET_HAS_DEP_DEVICES) || \ |
1113 | false) |
1114 | |
1115 | static inline void _nocheck__trace_vfio_pci_hot_reset_has_dep_devices(const char * name) |
1116 | { |
1117 | if (trace_event_get_state(TRACE_VFIO_PCI_HOT_RESET_HAS_DEP_DEVICES) && qemu_loglevel_mask(LOG_TRACE)) { |
1118 | struct timeval _now; |
1119 | gettimeofday(&_now, NULL); |
1120 | qemu_log("%d@%zu.%06zu:vfio_pci_hot_reset_has_dep_devices " "%s: hot reset dependent devices:" "\n" , |
1121 | qemu_get_thread_id(), |
1122 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1123 | , name); |
1124 | } |
1125 | } |
1126 | |
1127 | static inline void trace_vfio_pci_hot_reset_has_dep_devices(const char * name) |
1128 | { |
1129 | if (true) { |
1130 | _nocheck__trace_vfio_pci_hot_reset_has_dep_devices(name); |
1131 | } |
1132 | } |
1133 | |
1134 | #define TRACE_VFIO_PCI_HOT_RESET_DEP_DEVICES_BACKEND_DSTATE() ( \ |
1135 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_HOT_RESET_DEP_DEVICES) || \ |
1136 | false) |
1137 | |
1138 | static inline void _nocheck__trace_vfio_pci_hot_reset_dep_devices(int domain, int bus, int slot, int function, int group_id) |
1139 | { |
1140 | if (trace_event_get_state(TRACE_VFIO_PCI_HOT_RESET_DEP_DEVICES) && qemu_loglevel_mask(LOG_TRACE)) { |
1141 | struct timeval _now; |
1142 | gettimeofday(&_now, NULL); |
1143 | qemu_log("%d@%zu.%06zu:vfio_pci_hot_reset_dep_devices " "\t%04x:%02x:%02x.%x group %d" "\n" , |
1144 | qemu_get_thread_id(), |
1145 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1146 | , domain, bus, slot, function, group_id); |
1147 | } |
1148 | } |
1149 | |
1150 | static inline void trace_vfio_pci_hot_reset_dep_devices(int domain, int bus, int slot, int function, int group_id) |
1151 | { |
1152 | if (true) { |
1153 | _nocheck__trace_vfio_pci_hot_reset_dep_devices(domain, bus, slot, function, group_id); |
1154 | } |
1155 | } |
1156 | |
1157 | #define TRACE_VFIO_PCI_HOT_RESET_RESULT_BACKEND_DSTATE() ( \ |
1158 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_HOT_RESET_RESULT) || \ |
1159 | false) |
1160 | |
1161 | static inline void _nocheck__trace_vfio_pci_hot_reset_result(const char * name, const char * result) |
1162 | { |
1163 | if (trace_event_get_state(TRACE_VFIO_PCI_HOT_RESET_RESULT) && qemu_loglevel_mask(LOG_TRACE)) { |
1164 | struct timeval _now; |
1165 | gettimeofday(&_now, NULL); |
1166 | qemu_log("%d@%zu.%06zu:vfio_pci_hot_reset_result " "%s hot reset: %s" "\n" , |
1167 | qemu_get_thread_id(), |
1168 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1169 | , name, result); |
1170 | } |
1171 | } |
1172 | |
1173 | static inline void trace_vfio_pci_hot_reset_result(const char * name, const char * result) |
1174 | { |
1175 | if (true) { |
1176 | _nocheck__trace_vfio_pci_hot_reset_result(name, result); |
1177 | } |
1178 | } |
1179 | |
1180 | #define TRACE_VFIO_POPULATE_DEVICE_CONFIG_BACKEND_DSTATE() ( \ |
1181 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_POPULATE_DEVICE_CONFIG) || \ |
1182 | false) |
1183 | |
1184 | static inline void _nocheck__trace_vfio_populate_device_config(const char * name, unsigned long size, unsigned long offset, unsigned long flags) |
1185 | { |
1186 | if (trace_event_get_state(TRACE_VFIO_POPULATE_DEVICE_CONFIG) && qemu_loglevel_mask(LOG_TRACE)) { |
1187 | struct timeval _now; |
1188 | gettimeofday(&_now, NULL); |
1189 | qemu_log("%d@%zu.%06zu:vfio_populate_device_config " "Device %s config:\n size: 0x%lx, offset: 0x%lx, flags: 0x%lx" "\n" , |
1190 | qemu_get_thread_id(), |
1191 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1192 | , name, size, offset, flags); |
1193 | } |
1194 | } |
1195 | |
1196 | static inline void trace_vfio_populate_device_config(const char * name, unsigned long size, unsigned long offset, unsigned long flags) |
1197 | { |
1198 | if (true) { |
1199 | _nocheck__trace_vfio_populate_device_config(name, size, offset, flags); |
1200 | } |
1201 | } |
1202 | |
1203 | #define TRACE_VFIO_POPULATE_DEVICE_GET_IRQ_INFO_FAILURE_BACKEND_DSTATE() ( \ |
1204 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_POPULATE_DEVICE_GET_IRQ_INFO_FAILURE) || \ |
1205 | false) |
1206 | |
1207 | static inline void _nocheck__trace_vfio_populate_device_get_irq_info_failure(const char * errstr) |
1208 | { |
1209 | if (trace_event_get_state(TRACE_VFIO_POPULATE_DEVICE_GET_IRQ_INFO_FAILURE) && qemu_loglevel_mask(LOG_TRACE)) { |
1210 | struct timeval _now; |
1211 | gettimeofday(&_now, NULL); |
1212 | qemu_log("%d@%zu.%06zu:vfio_populate_device_get_irq_info_failure " "VFIO_DEVICE_GET_IRQ_INFO failure: %s" "\n" , |
1213 | qemu_get_thread_id(), |
1214 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1215 | , errstr); |
1216 | } |
1217 | } |
1218 | |
1219 | static inline void trace_vfio_populate_device_get_irq_info_failure(const char * errstr) |
1220 | { |
1221 | if (true) { |
1222 | _nocheck__trace_vfio_populate_device_get_irq_info_failure(errstr); |
1223 | } |
1224 | } |
1225 | |
1226 | #define TRACE_VFIO_REALIZE_BACKEND_DSTATE() ( \ |
1227 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_REALIZE) || \ |
1228 | false) |
1229 | |
1230 | static inline void _nocheck__trace_vfio_realize(const char * name, int group_id) |
1231 | { |
1232 | if (trace_event_get_state(TRACE_VFIO_REALIZE) && qemu_loglevel_mask(LOG_TRACE)) { |
1233 | struct timeval _now; |
1234 | gettimeofday(&_now, NULL); |
1235 | qemu_log("%d@%zu.%06zu:vfio_realize " " (%s) group %d" "\n" , |
1236 | qemu_get_thread_id(), |
1237 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1238 | , name, group_id); |
1239 | } |
1240 | } |
1241 | |
1242 | static inline void trace_vfio_realize(const char * name, int group_id) |
1243 | { |
1244 | if (true) { |
1245 | _nocheck__trace_vfio_realize(name, group_id); |
1246 | } |
1247 | } |
1248 | |
1249 | #define TRACE_VFIO_MDEV_BACKEND_DSTATE() ( \ |
1250 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_MDEV) || \ |
1251 | false) |
1252 | |
1253 | static inline void _nocheck__trace_vfio_mdev(const char * name, bool is_mdev) |
1254 | { |
1255 | if (trace_event_get_state(TRACE_VFIO_MDEV) && qemu_loglevel_mask(LOG_TRACE)) { |
1256 | struct timeval _now; |
1257 | gettimeofday(&_now, NULL); |
1258 | qemu_log("%d@%zu.%06zu:vfio_mdev " " (%s) is_mdev %d" "\n" , |
1259 | qemu_get_thread_id(), |
1260 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1261 | , name, is_mdev); |
1262 | } |
1263 | } |
1264 | |
1265 | static inline void trace_vfio_mdev(const char * name, bool is_mdev) |
1266 | { |
1267 | if (true) { |
1268 | _nocheck__trace_vfio_mdev(name, is_mdev); |
1269 | } |
1270 | } |
1271 | |
1272 | #define TRACE_VFIO_ADD_EXT_CAP_DROPPED_BACKEND_DSTATE() ( \ |
1273 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_ADD_EXT_CAP_DROPPED) || \ |
1274 | false) |
1275 | |
1276 | static inline void _nocheck__trace_vfio_add_ext_cap_dropped(const char * name, uint16_t cap, uint16_t offset) |
1277 | { |
1278 | if (trace_event_get_state(TRACE_VFIO_ADD_EXT_CAP_DROPPED) && qemu_loglevel_mask(LOG_TRACE)) { |
1279 | struct timeval _now; |
1280 | gettimeofday(&_now, NULL); |
1281 | qemu_log("%d@%zu.%06zu:vfio_add_ext_cap_dropped " "%s 0x%x@0x%x" "\n" , |
1282 | qemu_get_thread_id(), |
1283 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1284 | , name, cap, offset); |
1285 | } |
1286 | } |
1287 | |
1288 | static inline void trace_vfio_add_ext_cap_dropped(const char * name, uint16_t cap, uint16_t offset) |
1289 | { |
1290 | if (true) { |
1291 | _nocheck__trace_vfio_add_ext_cap_dropped(name, cap, offset); |
1292 | } |
1293 | } |
1294 | |
1295 | #define TRACE_VFIO_PCI_RESET_BACKEND_DSTATE() ( \ |
1296 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_RESET) || \ |
1297 | false) |
1298 | |
1299 | static inline void _nocheck__trace_vfio_pci_reset(const char * name) |
1300 | { |
1301 | if (trace_event_get_state(TRACE_VFIO_PCI_RESET) && qemu_loglevel_mask(LOG_TRACE)) { |
1302 | struct timeval _now; |
1303 | gettimeofday(&_now, NULL); |
1304 | qemu_log("%d@%zu.%06zu:vfio_pci_reset " " (%s)" "\n" , |
1305 | qemu_get_thread_id(), |
1306 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1307 | , name); |
1308 | } |
1309 | } |
1310 | |
1311 | static inline void trace_vfio_pci_reset(const char * name) |
1312 | { |
1313 | if (true) { |
1314 | _nocheck__trace_vfio_pci_reset(name); |
1315 | } |
1316 | } |
1317 | |
1318 | #define TRACE_VFIO_PCI_RESET_FLR_BACKEND_DSTATE() ( \ |
1319 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_RESET_FLR) || \ |
1320 | false) |
1321 | |
1322 | static inline void _nocheck__trace_vfio_pci_reset_flr(const char * name) |
1323 | { |
1324 | if (trace_event_get_state(TRACE_VFIO_PCI_RESET_FLR) && qemu_loglevel_mask(LOG_TRACE)) { |
1325 | struct timeval _now; |
1326 | gettimeofday(&_now, NULL); |
1327 | qemu_log("%d@%zu.%06zu:vfio_pci_reset_flr " "%s FLR/VFIO_DEVICE_RESET" "\n" , |
1328 | qemu_get_thread_id(), |
1329 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1330 | , name); |
1331 | } |
1332 | } |
1333 | |
1334 | static inline void trace_vfio_pci_reset_flr(const char * name) |
1335 | { |
1336 | if (true) { |
1337 | _nocheck__trace_vfio_pci_reset_flr(name); |
1338 | } |
1339 | } |
1340 | |
1341 | #define TRACE_VFIO_PCI_RESET_PM_BACKEND_DSTATE() ( \ |
1342 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_RESET_PM) || \ |
1343 | false) |
1344 | |
1345 | static inline void _nocheck__trace_vfio_pci_reset_pm(const char * name) |
1346 | { |
1347 | if (trace_event_get_state(TRACE_VFIO_PCI_RESET_PM) && qemu_loglevel_mask(LOG_TRACE)) { |
1348 | struct timeval _now; |
1349 | gettimeofday(&_now, NULL); |
1350 | qemu_log("%d@%zu.%06zu:vfio_pci_reset_pm " "%s PCI PM Reset" "\n" , |
1351 | qemu_get_thread_id(), |
1352 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1353 | , name); |
1354 | } |
1355 | } |
1356 | |
1357 | static inline void trace_vfio_pci_reset_pm(const char * name) |
1358 | { |
1359 | if (true) { |
1360 | _nocheck__trace_vfio_pci_reset_pm(name); |
1361 | } |
1362 | } |
1363 | |
1364 | #define TRACE_VFIO_PCI_EMULATED_VENDOR_ID_BACKEND_DSTATE() ( \ |
1365 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_EMULATED_VENDOR_ID) || \ |
1366 | false) |
1367 | |
1368 | static inline void _nocheck__trace_vfio_pci_emulated_vendor_id(const char * name, uint16_t val) |
1369 | { |
1370 | if (trace_event_get_state(TRACE_VFIO_PCI_EMULATED_VENDOR_ID) && qemu_loglevel_mask(LOG_TRACE)) { |
1371 | struct timeval _now; |
1372 | gettimeofday(&_now, NULL); |
1373 | qemu_log("%d@%zu.%06zu:vfio_pci_emulated_vendor_id " "%s 0x%04x" "\n" , |
1374 | qemu_get_thread_id(), |
1375 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1376 | , name, val); |
1377 | } |
1378 | } |
1379 | |
1380 | static inline void trace_vfio_pci_emulated_vendor_id(const char * name, uint16_t val) |
1381 | { |
1382 | if (true) { |
1383 | _nocheck__trace_vfio_pci_emulated_vendor_id(name, val); |
1384 | } |
1385 | } |
1386 | |
1387 | #define TRACE_VFIO_PCI_EMULATED_DEVICE_ID_BACKEND_DSTATE() ( \ |
1388 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_EMULATED_DEVICE_ID) || \ |
1389 | false) |
1390 | |
1391 | static inline void _nocheck__trace_vfio_pci_emulated_device_id(const char * name, uint16_t val) |
1392 | { |
1393 | if (trace_event_get_state(TRACE_VFIO_PCI_EMULATED_DEVICE_ID) && qemu_loglevel_mask(LOG_TRACE)) { |
1394 | struct timeval _now; |
1395 | gettimeofday(&_now, NULL); |
1396 | qemu_log("%d@%zu.%06zu:vfio_pci_emulated_device_id " "%s 0x%04x" "\n" , |
1397 | qemu_get_thread_id(), |
1398 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1399 | , name, val); |
1400 | } |
1401 | } |
1402 | |
1403 | static inline void trace_vfio_pci_emulated_device_id(const char * name, uint16_t val) |
1404 | { |
1405 | if (true) { |
1406 | _nocheck__trace_vfio_pci_emulated_device_id(name, val); |
1407 | } |
1408 | } |
1409 | |
1410 | #define TRACE_VFIO_PCI_EMULATED_SUB_VENDOR_ID_BACKEND_DSTATE() ( \ |
1411 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_EMULATED_SUB_VENDOR_ID) || \ |
1412 | false) |
1413 | |
1414 | static inline void _nocheck__trace_vfio_pci_emulated_sub_vendor_id(const char * name, uint16_t val) |
1415 | { |
1416 | if (trace_event_get_state(TRACE_VFIO_PCI_EMULATED_SUB_VENDOR_ID) && qemu_loglevel_mask(LOG_TRACE)) { |
1417 | struct timeval _now; |
1418 | gettimeofday(&_now, NULL); |
1419 | qemu_log("%d@%zu.%06zu:vfio_pci_emulated_sub_vendor_id " "%s 0x%04x" "\n" , |
1420 | qemu_get_thread_id(), |
1421 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1422 | , name, val); |
1423 | } |
1424 | } |
1425 | |
1426 | static inline void trace_vfio_pci_emulated_sub_vendor_id(const char * name, uint16_t val) |
1427 | { |
1428 | if (true) { |
1429 | _nocheck__trace_vfio_pci_emulated_sub_vendor_id(name, val); |
1430 | } |
1431 | } |
1432 | |
1433 | #define TRACE_VFIO_PCI_EMULATED_SUB_DEVICE_ID_BACKEND_DSTATE() ( \ |
1434 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_EMULATED_SUB_DEVICE_ID) || \ |
1435 | false) |
1436 | |
1437 | static inline void _nocheck__trace_vfio_pci_emulated_sub_device_id(const char * name, uint16_t val) |
1438 | { |
1439 | if (trace_event_get_state(TRACE_VFIO_PCI_EMULATED_SUB_DEVICE_ID) && qemu_loglevel_mask(LOG_TRACE)) { |
1440 | struct timeval _now; |
1441 | gettimeofday(&_now, NULL); |
1442 | qemu_log("%d@%zu.%06zu:vfio_pci_emulated_sub_device_id " "%s 0x%04x" "\n" , |
1443 | qemu_get_thread_id(), |
1444 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1445 | , name, val); |
1446 | } |
1447 | } |
1448 | |
1449 | static inline void trace_vfio_pci_emulated_sub_device_id(const char * name, uint16_t val) |
1450 | { |
1451 | if (true) { |
1452 | _nocheck__trace_vfio_pci_emulated_sub_device_id(name, val); |
1453 | } |
1454 | } |
1455 | |
1456 | #define TRACE_VFIO_QUIRK_ROM_BLACKLISTED_BACKEND_DSTATE() ( \ |
1457 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_ROM_BLACKLISTED) || \ |
1458 | false) |
1459 | |
1460 | static inline void _nocheck__trace_vfio_quirk_rom_blacklisted(const char * name, uint16_t vid, uint16_t did) |
1461 | { |
1462 | if (trace_event_get_state(TRACE_VFIO_QUIRK_ROM_BLACKLISTED) && qemu_loglevel_mask(LOG_TRACE)) { |
1463 | struct timeval _now; |
1464 | gettimeofday(&_now, NULL); |
1465 | qemu_log("%d@%zu.%06zu:vfio_quirk_rom_blacklisted " "%s %04x:%04x" "\n" , |
1466 | qemu_get_thread_id(), |
1467 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1468 | , name, vid, did); |
1469 | } |
1470 | } |
1471 | |
1472 | static inline void trace_vfio_quirk_rom_blacklisted(const char * name, uint16_t vid, uint16_t did) |
1473 | { |
1474 | if (true) { |
1475 | _nocheck__trace_vfio_quirk_rom_blacklisted(name, vid, did); |
1476 | } |
1477 | } |
1478 | |
1479 | #define TRACE_VFIO_QUIRK_GENERIC_WINDOW_ADDRESS_WRITE_BACKEND_DSTATE() ( \ |
1480 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_GENERIC_WINDOW_ADDRESS_WRITE) || \ |
1481 | false) |
1482 | |
1483 | static inline void _nocheck__trace_vfio_quirk_generic_window_address_write(const char * name, const char * region_name, uint64_t data) |
1484 | { |
1485 | if (trace_event_get_state(TRACE_VFIO_QUIRK_GENERIC_WINDOW_ADDRESS_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
1486 | struct timeval _now; |
1487 | gettimeofday(&_now, NULL); |
1488 | qemu_log("%d@%zu.%06zu:vfio_quirk_generic_window_address_write " "%s %s 0x%" PRIx64 "\n" , |
1489 | qemu_get_thread_id(), |
1490 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1491 | , name, region_name, data); |
1492 | } |
1493 | } |
1494 | |
1495 | static inline void trace_vfio_quirk_generic_window_address_write(const char * name, const char * region_name, uint64_t data) |
1496 | { |
1497 | if (true) { |
1498 | _nocheck__trace_vfio_quirk_generic_window_address_write(name, region_name, data); |
1499 | } |
1500 | } |
1501 | |
1502 | #define TRACE_VFIO_QUIRK_GENERIC_WINDOW_DATA_READ_BACKEND_DSTATE() ( \ |
1503 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_GENERIC_WINDOW_DATA_READ) || \ |
1504 | false) |
1505 | |
1506 | static inline void _nocheck__trace_vfio_quirk_generic_window_data_read(const char * name, const char * region_name, uint64_t data) |
1507 | { |
1508 | if (trace_event_get_state(TRACE_VFIO_QUIRK_GENERIC_WINDOW_DATA_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
1509 | struct timeval _now; |
1510 | gettimeofday(&_now, NULL); |
1511 | qemu_log("%d@%zu.%06zu:vfio_quirk_generic_window_data_read " "%s %s 0x%" PRIx64 "\n" , |
1512 | qemu_get_thread_id(), |
1513 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1514 | , name, region_name, data); |
1515 | } |
1516 | } |
1517 | |
1518 | static inline void trace_vfio_quirk_generic_window_data_read(const char * name, const char * region_name, uint64_t data) |
1519 | { |
1520 | if (true) { |
1521 | _nocheck__trace_vfio_quirk_generic_window_data_read(name, region_name, data); |
1522 | } |
1523 | } |
1524 | |
1525 | #define TRACE_VFIO_QUIRK_GENERIC_WINDOW_DATA_WRITE_BACKEND_DSTATE() ( \ |
1526 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_GENERIC_WINDOW_DATA_WRITE) || \ |
1527 | false) |
1528 | |
1529 | static inline void _nocheck__trace_vfio_quirk_generic_window_data_write(const char * name, const char * region_name, uint64_t data) |
1530 | { |
1531 | if (trace_event_get_state(TRACE_VFIO_QUIRK_GENERIC_WINDOW_DATA_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
1532 | struct timeval _now; |
1533 | gettimeofday(&_now, NULL); |
1534 | qemu_log("%d@%zu.%06zu:vfio_quirk_generic_window_data_write " "%s %s 0x%" PRIx64 "\n" , |
1535 | qemu_get_thread_id(), |
1536 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1537 | , name, region_name, data); |
1538 | } |
1539 | } |
1540 | |
1541 | static inline void trace_vfio_quirk_generic_window_data_write(const char * name, const char * region_name, uint64_t data) |
1542 | { |
1543 | if (true) { |
1544 | _nocheck__trace_vfio_quirk_generic_window_data_write(name, region_name, data); |
1545 | } |
1546 | } |
1547 | |
1548 | #define TRACE_VFIO_QUIRK_GENERIC_MIRROR_READ_BACKEND_DSTATE() ( \ |
1549 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_GENERIC_MIRROR_READ) || \ |
1550 | false) |
1551 | |
1552 | static inline void _nocheck__trace_vfio_quirk_generic_mirror_read(const char * name, const char * region_name, uint64_t addr, uint64_t data) |
1553 | { |
1554 | if (trace_event_get_state(TRACE_VFIO_QUIRK_GENERIC_MIRROR_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
1555 | struct timeval _now; |
1556 | gettimeofday(&_now, NULL); |
1557 | qemu_log("%d@%zu.%06zu:vfio_quirk_generic_mirror_read " "%s %s 0x%" PRIx64": 0x%" PRIx64 "\n" , |
1558 | qemu_get_thread_id(), |
1559 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1560 | , name, region_name, addr, data); |
1561 | } |
1562 | } |
1563 | |
1564 | static inline void trace_vfio_quirk_generic_mirror_read(const char * name, const char * region_name, uint64_t addr, uint64_t data) |
1565 | { |
1566 | if (true) { |
1567 | _nocheck__trace_vfio_quirk_generic_mirror_read(name, region_name, addr, data); |
1568 | } |
1569 | } |
1570 | |
1571 | #define TRACE_VFIO_QUIRK_GENERIC_MIRROR_WRITE_BACKEND_DSTATE() ( \ |
1572 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_GENERIC_MIRROR_WRITE) || \ |
1573 | false) |
1574 | |
1575 | static inline void _nocheck__trace_vfio_quirk_generic_mirror_write(const char * name, const char * region_name, uint64_t addr, uint64_t data) |
1576 | { |
1577 | if (trace_event_get_state(TRACE_VFIO_QUIRK_GENERIC_MIRROR_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
1578 | struct timeval _now; |
1579 | gettimeofday(&_now, NULL); |
1580 | qemu_log("%d@%zu.%06zu:vfio_quirk_generic_mirror_write " "%s %s 0x%" PRIx64": 0x%" PRIx64 "\n" , |
1581 | qemu_get_thread_id(), |
1582 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1583 | , name, region_name, addr, data); |
1584 | } |
1585 | } |
1586 | |
1587 | static inline void trace_vfio_quirk_generic_mirror_write(const char * name, const char * region_name, uint64_t addr, uint64_t data) |
1588 | { |
1589 | if (true) { |
1590 | _nocheck__trace_vfio_quirk_generic_mirror_write(name, region_name, addr, data); |
1591 | } |
1592 | } |
1593 | |
1594 | #define TRACE_VFIO_QUIRK_ATI_3C3_READ_BACKEND_DSTATE() ( \ |
1595 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_ATI_3C3_READ) || \ |
1596 | false) |
1597 | |
1598 | static inline void _nocheck__trace_vfio_quirk_ati_3c3_read(const char * name, uint64_t data) |
1599 | { |
1600 | if (trace_event_get_state(TRACE_VFIO_QUIRK_ATI_3C3_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
1601 | struct timeval _now; |
1602 | gettimeofday(&_now, NULL); |
1603 | qemu_log("%d@%zu.%06zu:vfio_quirk_ati_3c3_read " "%s 0x%" PRIx64 "\n" , |
1604 | qemu_get_thread_id(), |
1605 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1606 | , name, data); |
1607 | } |
1608 | } |
1609 | |
1610 | static inline void trace_vfio_quirk_ati_3c3_read(const char * name, uint64_t data) |
1611 | { |
1612 | if (true) { |
1613 | _nocheck__trace_vfio_quirk_ati_3c3_read(name, data); |
1614 | } |
1615 | } |
1616 | |
1617 | #define TRACE_VFIO_QUIRK_ATI_3C3_PROBE_BACKEND_DSTATE() ( \ |
1618 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_ATI_3C3_PROBE) || \ |
1619 | false) |
1620 | |
1621 | static inline void _nocheck__trace_vfio_quirk_ati_3c3_probe(const char * name) |
1622 | { |
1623 | if (trace_event_get_state(TRACE_VFIO_QUIRK_ATI_3C3_PROBE) && qemu_loglevel_mask(LOG_TRACE)) { |
1624 | struct timeval _now; |
1625 | gettimeofday(&_now, NULL); |
1626 | qemu_log("%d@%zu.%06zu:vfio_quirk_ati_3c3_probe " "%s" "\n" , |
1627 | qemu_get_thread_id(), |
1628 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1629 | , name); |
1630 | } |
1631 | } |
1632 | |
1633 | static inline void trace_vfio_quirk_ati_3c3_probe(const char * name) |
1634 | { |
1635 | if (true) { |
1636 | _nocheck__trace_vfio_quirk_ati_3c3_probe(name); |
1637 | } |
1638 | } |
1639 | |
1640 | #define TRACE_VFIO_QUIRK_ATI_BAR4_PROBE_BACKEND_DSTATE() ( \ |
1641 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_ATI_BAR4_PROBE) || \ |
1642 | false) |
1643 | |
1644 | static inline void _nocheck__trace_vfio_quirk_ati_bar4_probe(const char * name) |
1645 | { |
1646 | if (trace_event_get_state(TRACE_VFIO_QUIRK_ATI_BAR4_PROBE) && qemu_loglevel_mask(LOG_TRACE)) { |
1647 | struct timeval _now; |
1648 | gettimeofday(&_now, NULL); |
1649 | qemu_log("%d@%zu.%06zu:vfio_quirk_ati_bar4_probe " "%s" "\n" , |
1650 | qemu_get_thread_id(), |
1651 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1652 | , name); |
1653 | } |
1654 | } |
1655 | |
1656 | static inline void trace_vfio_quirk_ati_bar4_probe(const char * name) |
1657 | { |
1658 | if (true) { |
1659 | _nocheck__trace_vfio_quirk_ati_bar4_probe(name); |
1660 | } |
1661 | } |
1662 | |
1663 | #define TRACE_VFIO_QUIRK_ATI_BAR2_PROBE_BACKEND_DSTATE() ( \ |
1664 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_ATI_BAR2_PROBE) || \ |
1665 | false) |
1666 | |
1667 | static inline void _nocheck__trace_vfio_quirk_ati_bar2_probe(const char * name) |
1668 | { |
1669 | if (trace_event_get_state(TRACE_VFIO_QUIRK_ATI_BAR2_PROBE) && qemu_loglevel_mask(LOG_TRACE)) { |
1670 | struct timeval _now; |
1671 | gettimeofday(&_now, NULL); |
1672 | qemu_log("%d@%zu.%06zu:vfio_quirk_ati_bar2_probe " "%s" "\n" , |
1673 | qemu_get_thread_id(), |
1674 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1675 | , name); |
1676 | } |
1677 | } |
1678 | |
1679 | static inline void trace_vfio_quirk_ati_bar2_probe(const char * name) |
1680 | { |
1681 | if (true) { |
1682 | _nocheck__trace_vfio_quirk_ati_bar2_probe(name); |
1683 | } |
1684 | } |
1685 | |
1686 | #define TRACE_VFIO_QUIRK_NVIDIA_3D0_STATE_BACKEND_DSTATE() ( \ |
1687 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_NVIDIA_3D0_STATE) || \ |
1688 | false) |
1689 | |
1690 | static inline void _nocheck__trace_vfio_quirk_nvidia_3d0_state(const char * name, const char * state) |
1691 | { |
1692 | if (trace_event_get_state(TRACE_VFIO_QUIRK_NVIDIA_3D0_STATE) && qemu_loglevel_mask(LOG_TRACE)) { |
1693 | struct timeval _now; |
1694 | gettimeofday(&_now, NULL); |
1695 | qemu_log("%d@%zu.%06zu:vfio_quirk_nvidia_3d0_state " "%s %s" "\n" , |
1696 | qemu_get_thread_id(), |
1697 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1698 | , name, state); |
1699 | } |
1700 | } |
1701 | |
1702 | static inline void trace_vfio_quirk_nvidia_3d0_state(const char * name, const char * state) |
1703 | { |
1704 | if (true) { |
1705 | _nocheck__trace_vfio_quirk_nvidia_3d0_state(name, state); |
1706 | } |
1707 | } |
1708 | |
1709 | #define TRACE_VFIO_QUIRK_NVIDIA_3D0_READ_BACKEND_DSTATE() ( \ |
1710 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_NVIDIA_3D0_READ) || \ |
1711 | false) |
1712 | |
1713 | static inline void _nocheck__trace_vfio_quirk_nvidia_3d0_read(const char * name, uint8_t offset, unsigned size, uint64_t val) |
1714 | { |
1715 | if (trace_event_get_state(TRACE_VFIO_QUIRK_NVIDIA_3D0_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
1716 | struct timeval _now; |
1717 | gettimeofday(&_now, NULL); |
1718 | qemu_log("%d@%zu.%06zu:vfio_quirk_nvidia_3d0_read " " (%s, @0x%x, len=0x%x) 0x%" PRIx64 "\n" , |
1719 | qemu_get_thread_id(), |
1720 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1721 | , name, offset, size, val); |
1722 | } |
1723 | } |
1724 | |
1725 | static inline void trace_vfio_quirk_nvidia_3d0_read(const char * name, uint8_t offset, unsigned size, uint64_t val) |
1726 | { |
1727 | if (true) { |
1728 | _nocheck__trace_vfio_quirk_nvidia_3d0_read(name, offset, size, val); |
1729 | } |
1730 | } |
1731 | |
1732 | #define TRACE_VFIO_QUIRK_NVIDIA_3D0_WRITE_BACKEND_DSTATE() ( \ |
1733 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_NVIDIA_3D0_WRITE) || \ |
1734 | false) |
1735 | |
1736 | static inline void _nocheck__trace_vfio_quirk_nvidia_3d0_write(const char * name, uint8_t offset, uint64_t data, unsigned size) |
1737 | { |
1738 | if (trace_event_get_state(TRACE_VFIO_QUIRK_NVIDIA_3D0_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
1739 | struct timeval _now; |
1740 | gettimeofday(&_now, NULL); |
1741 | qemu_log("%d@%zu.%06zu:vfio_quirk_nvidia_3d0_write " "(%s, @0x%x, 0x%" PRIx64", len=0x%x)" "\n" , |
1742 | qemu_get_thread_id(), |
1743 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1744 | , name, offset, data, size); |
1745 | } |
1746 | } |
1747 | |
1748 | static inline void trace_vfio_quirk_nvidia_3d0_write(const char * name, uint8_t offset, uint64_t data, unsigned size) |
1749 | { |
1750 | if (true) { |
1751 | _nocheck__trace_vfio_quirk_nvidia_3d0_write(name, offset, data, size); |
1752 | } |
1753 | } |
1754 | |
1755 | #define TRACE_VFIO_QUIRK_NVIDIA_3D0_PROBE_BACKEND_DSTATE() ( \ |
1756 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_NVIDIA_3D0_PROBE) || \ |
1757 | false) |
1758 | |
1759 | static inline void _nocheck__trace_vfio_quirk_nvidia_3d0_probe(const char * name) |
1760 | { |
1761 | if (trace_event_get_state(TRACE_VFIO_QUIRK_NVIDIA_3D0_PROBE) && qemu_loglevel_mask(LOG_TRACE)) { |
1762 | struct timeval _now; |
1763 | gettimeofday(&_now, NULL); |
1764 | qemu_log("%d@%zu.%06zu:vfio_quirk_nvidia_3d0_probe " "%s" "\n" , |
1765 | qemu_get_thread_id(), |
1766 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1767 | , name); |
1768 | } |
1769 | } |
1770 | |
1771 | static inline void trace_vfio_quirk_nvidia_3d0_probe(const char * name) |
1772 | { |
1773 | if (true) { |
1774 | _nocheck__trace_vfio_quirk_nvidia_3d0_probe(name); |
1775 | } |
1776 | } |
1777 | |
1778 | #define TRACE_VFIO_QUIRK_NVIDIA_BAR5_STATE_BACKEND_DSTATE() ( \ |
1779 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_NVIDIA_BAR5_STATE) || \ |
1780 | false) |
1781 | |
1782 | static inline void _nocheck__trace_vfio_quirk_nvidia_bar5_state(const char * name, const char * state) |
1783 | { |
1784 | if (trace_event_get_state(TRACE_VFIO_QUIRK_NVIDIA_BAR5_STATE) && qemu_loglevel_mask(LOG_TRACE)) { |
1785 | struct timeval _now; |
1786 | gettimeofday(&_now, NULL); |
1787 | qemu_log("%d@%zu.%06zu:vfio_quirk_nvidia_bar5_state " "%s %s" "\n" , |
1788 | qemu_get_thread_id(), |
1789 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1790 | , name, state); |
1791 | } |
1792 | } |
1793 | |
1794 | static inline void trace_vfio_quirk_nvidia_bar5_state(const char * name, const char * state) |
1795 | { |
1796 | if (true) { |
1797 | _nocheck__trace_vfio_quirk_nvidia_bar5_state(name, state); |
1798 | } |
1799 | } |
1800 | |
1801 | #define TRACE_VFIO_QUIRK_NVIDIA_BAR5_PROBE_BACKEND_DSTATE() ( \ |
1802 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_NVIDIA_BAR5_PROBE) || \ |
1803 | false) |
1804 | |
1805 | static inline void _nocheck__trace_vfio_quirk_nvidia_bar5_probe(const char * name) |
1806 | { |
1807 | if (trace_event_get_state(TRACE_VFIO_QUIRK_NVIDIA_BAR5_PROBE) && qemu_loglevel_mask(LOG_TRACE)) { |
1808 | struct timeval _now; |
1809 | gettimeofday(&_now, NULL); |
1810 | qemu_log("%d@%zu.%06zu:vfio_quirk_nvidia_bar5_probe " "%s" "\n" , |
1811 | qemu_get_thread_id(), |
1812 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1813 | , name); |
1814 | } |
1815 | } |
1816 | |
1817 | static inline void trace_vfio_quirk_nvidia_bar5_probe(const char * name) |
1818 | { |
1819 | if (true) { |
1820 | _nocheck__trace_vfio_quirk_nvidia_bar5_probe(name); |
1821 | } |
1822 | } |
1823 | |
1824 | #define TRACE_VFIO_QUIRK_NVIDIA_BAR0_MSI_ACK_BACKEND_DSTATE() ( \ |
1825 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_NVIDIA_BAR0_MSI_ACK) || \ |
1826 | false) |
1827 | |
1828 | static inline void _nocheck__trace_vfio_quirk_nvidia_bar0_msi_ack(const char * name) |
1829 | { |
1830 | if (trace_event_get_state(TRACE_VFIO_QUIRK_NVIDIA_BAR0_MSI_ACK) && qemu_loglevel_mask(LOG_TRACE)) { |
1831 | struct timeval _now; |
1832 | gettimeofday(&_now, NULL); |
1833 | qemu_log("%d@%zu.%06zu:vfio_quirk_nvidia_bar0_msi_ack " "%s" "\n" , |
1834 | qemu_get_thread_id(), |
1835 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1836 | , name); |
1837 | } |
1838 | } |
1839 | |
1840 | static inline void trace_vfio_quirk_nvidia_bar0_msi_ack(const char * name) |
1841 | { |
1842 | if (true) { |
1843 | _nocheck__trace_vfio_quirk_nvidia_bar0_msi_ack(name); |
1844 | } |
1845 | } |
1846 | |
1847 | #define TRACE_VFIO_QUIRK_NVIDIA_BAR0_PROBE_BACKEND_DSTATE() ( \ |
1848 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_NVIDIA_BAR0_PROBE) || \ |
1849 | false) |
1850 | |
1851 | static inline void _nocheck__trace_vfio_quirk_nvidia_bar0_probe(const char * name) |
1852 | { |
1853 | if (trace_event_get_state(TRACE_VFIO_QUIRK_NVIDIA_BAR0_PROBE) && qemu_loglevel_mask(LOG_TRACE)) { |
1854 | struct timeval _now; |
1855 | gettimeofday(&_now, NULL); |
1856 | qemu_log("%d@%zu.%06zu:vfio_quirk_nvidia_bar0_probe " "%s" "\n" , |
1857 | qemu_get_thread_id(), |
1858 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1859 | , name); |
1860 | } |
1861 | } |
1862 | |
1863 | static inline void trace_vfio_quirk_nvidia_bar0_probe(const char * name) |
1864 | { |
1865 | if (true) { |
1866 | _nocheck__trace_vfio_quirk_nvidia_bar0_probe(name); |
1867 | } |
1868 | } |
1869 | |
1870 | #define TRACE_VFIO_QUIRK_RTL8168_FAKE_LATCH_BACKEND_DSTATE() ( \ |
1871 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_RTL8168_FAKE_LATCH) || \ |
1872 | false) |
1873 | |
1874 | static inline void _nocheck__trace_vfio_quirk_rtl8168_fake_latch(const char * name, uint64_t val) |
1875 | { |
1876 | if (trace_event_get_state(TRACE_VFIO_QUIRK_RTL8168_FAKE_LATCH) && qemu_loglevel_mask(LOG_TRACE)) { |
1877 | struct timeval _now; |
1878 | gettimeofday(&_now, NULL); |
1879 | qemu_log("%d@%zu.%06zu:vfio_quirk_rtl8168_fake_latch " "%s 0x%" PRIx64 "\n" , |
1880 | qemu_get_thread_id(), |
1881 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1882 | , name, val); |
1883 | } |
1884 | } |
1885 | |
1886 | static inline void trace_vfio_quirk_rtl8168_fake_latch(const char * name, uint64_t val) |
1887 | { |
1888 | if (true) { |
1889 | _nocheck__trace_vfio_quirk_rtl8168_fake_latch(name, val); |
1890 | } |
1891 | } |
1892 | |
1893 | #define TRACE_VFIO_QUIRK_RTL8168_MSIX_WRITE_BACKEND_DSTATE() ( \ |
1894 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_RTL8168_MSIX_WRITE) || \ |
1895 | false) |
1896 | |
1897 | static inline void _nocheck__trace_vfio_quirk_rtl8168_msix_write(const char * name, uint16_t offset, uint64_t val) |
1898 | { |
1899 | if (trace_event_get_state(TRACE_VFIO_QUIRK_RTL8168_MSIX_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
1900 | struct timeval _now; |
1901 | gettimeofday(&_now, NULL); |
1902 | qemu_log("%d@%zu.%06zu:vfio_quirk_rtl8168_msix_write " "%s MSI-X table write[0x%x]: 0x%" PRIx64 "\n" , |
1903 | qemu_get_thread_id(), |
1904 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1905 | , name, offset, val); |
1906 | } |
1907 | } |
1908 | |
1909 | static inline void trace_vfio_quirk_rtl8168_msix_write(const char * name, uint16_t offset, uint64_t val) |
1910 | { |
1911 | if (true) { |
1912 | _nocheck__trace_vfio_quirk_rtl8168_msix_write(name, offset, val); |
1913 | } |
1914 | } |
1915 | |
1916 | #define TRACE_VFIO_QUIRK_RTL8168_MSIX_READ_BACKEND_DSTATE() ( \ |
1917 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_RTL8168_MSIX_READ) || \ |
1918 | false) |
1919 | |
1920 | static inline void _nocheck__trace_vfio_quirk_rtl8168_msix_read(const char * name, uint16_t offset, uint64_t val) |
1921 | { |
1922 | if (trace_event_get_state(TRACE_VFIO_QUIRK_RTL8168_MSIX_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
1923 | struct timeval _now; |
1924 | gettimeofday(&_now, NULL); |
1925 | qemu_log("%d@%zu.%06zu:vfio_quirk_rtl8168_msix_read " "%s MSI-X table read[0x%x]: 0x%" PRIx64 "\n" , |
1926 | qemu_get_thread_id(), |
1927 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1928 | , name, offset, val); |
1929 | } |
1930 | } |
1931 | |
1932 | static inline void trace_vfio_quirk_rtl8168_msix_read(const char * name, uint16_t offset, uint64_t val) |
1933 | { |
1934 | if (true) { |
1935 | _nocheck__trace_vfio_quirk_rtl8168_msix_read(name, offset, val); |
1936 | } |
1937 | } |
1938 | |
1939 | #define TRACE_VFIO_QUIRK_RTL8168_PROBE_BACKEND_DSTATE() ( \ |
1940 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_RTL8168_PROBE) || \ |
1941 | false) |
1942 | |
1943 | static inline void _nocheck__trace_vfio_quirk_rtl8168_probe(const char * name) |
1944 | { |
1945 | if (trace_event_get_state(TRACE_VFIO_QUIRK_RTL8168_PROBE) && qemu_loglevel_mask(LOG_TRACE)) { |
1946 | struct timeval _now; |
1947 | gettimeofday(&_now, NULL); |
1948 | qemu_log("%d@%zu.%06zu:vfio_quirk_rtl8168_probe " "%s" "\n" , |
1949 | qemu_get_thread_id(), |
1950 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1951 | , name); |
1952 | } |
1953 | } |
1954 | |
1955 | static inline void trace_vfio_quirk_rtl8168_probe(const char * name) |
1956 | { |
1957 | if (true) { |
1958 | _nocheck__trace_vfio_quirk_rtl8168_probe(name); |
1959 | } |
1960 | } |
1961 | |
1962 | #define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_SKIPPED_BACKEND_DSTATE() ( \ |
1963 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_SKIPPED) || \ |
1964 | false) |
1965 | |
1966 | static inline void _nocheck__trace_vfio_quirk_ati_bonaire_reset_skipped(const char * name) |
1967 | { |
1968 | if (trace_event_get_state(TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_SKIPPED) && qemu_loglevel_mask(LOG_TRACE)) { |
1969 | struct timeval _now; |
1970 | gettimeofday(&_now, NULL); |
1971 | qemu_log("%d@%zu.%06zu:vfio_quirk_ati_bonaire_reset_skipped " "%s" "\n" , |
1972 | qemu_get_thread_id(), |
1973 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1974 | , name); |
1975 | } |
1976 | } |
1977 | |
1978 | static inline void trace_vfio_quirk_ati_bonaire_reset_skipped(const char * name) |
1979 | { |
1980 | if (true) { |
1981 | _nocheck__trace_vfio_quirk_ati_bonaire_reset_skipped(name); |
1982 | } |
1983 | } |
1984 | |
1985 | #define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_NO_SMC_BACKEND_DSTATE() ( \ |
1986 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_NO_SMC) || \ |
1987 | false) |
1988 | |
1989 | static inline void _nocheck__trace_vfio_quirk_ati_bonaire_reset_no_smc(const char * name) |
1990 | { |
1991 | if (trace_event_get_state(TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_NO_SMC) && qemu_loglevel_mask(LOG_TRACE)) { |
1992 | struct timeval _now; |
1993 | gettimeofday(&_now, NULL); |
1994 | qemu_log("%d@%zu.%06zu:vfio_quirk_ati_bonaire_reset_no_smc " "%s" "\n" , |
1995 | qemu_get_thread_id(), |
1996 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
1997 | , name); |
1998 | } |
1999 | } |
2000 | |
2001 | static inline void trace_vfio_quirk_ati_bonaire_reset_no_smc(const char * name) |
2002 | { |
2003 | if (true) { |
2004 | _nocheck__trace_vfio_quirk_ati_bonaire_reset_no_smc(name); |
2005 | } |
2006 | } |
2007 | |
2008 | #define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_TIMEOUT_BACKEND_DSTATE() ( \ |
2009 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_TIMEOUT) || \ |
2010 | false) |
2011 | |
2012 | static inline void _nocheck__trace_vfio_quirk_ati_bonaire_reset_timeout(const char * name) |
2013 | { |
2014 | if (trace_event_get_state(TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_TIMEOUT) && qemu_loglevel_mask(LOG_TRACE)) { |
2015 | struct timeval _now; |
2016 | gettimeofday(&_now, NULL); |
2017 | qemu_log("%d@%zu.%06zu:vfio_quirk_ati_bonaire_reset_timeout " "%s" "\n" , |
2018 | qemu_get_thread_id(), |
2019 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2020 | , name); |
2021 | } |
2022 | } |
2023 | |
2024 | static inline void trace_vfio_quirk_ati_bonaire_reset_timeout(const char * name) |
2025 | { |
2026 | if (true) { |
2027 | _nocheck__trace_vfio_quirk_ati_bonaire_reset_timeout(name); |
2028 | } |
2029 | } |
2030 | |
2031 | #define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_DONE_BACKEND_DSTATE() ( \ |
2032 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_DONE) || \ |
2033 | false) |
2034 | |
2035 | static inline void _nocheck__trace_vfio_quirk_ati_bonaire_reset_done(const char * name) |
2036 | { |
2037 | if (trace_event_get_state(TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_DONE) && qemu_loglevel_mask(LOG_TRACE)) { |
2038 | struct timeval _now; |
2039 | gettimeofday(&_now, NULL); |
2040 | qemu_log("%d@%zu.%06zu:vfio_quirk_ati_bonaire_reset_done " "%s" "\n" , |
2041 | qemu_get_thread_id(), |
2042 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2043 | , name); |
2044 | } |
2045 | } |
2046 | |
2047 | static inline void trace_vfio_quirk_ati_bonaire_reset_done(const char * name) |
2048 | { |
2049 | if (true) { |
2050 | _nocheck__trace_vfio_quirk_ati_bonaire_reset_done(name); |
2051 | } |
2052 | } |
2053 | |
2054 | #define TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET_BACKEND_DSTATE() ( \ |
2055 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET) || \ |
2056 | false) |
2057 | |
2058 | static inline void _nocheck__trace_vfio_quirk_ati_bonaire_reset(const char * name) |
2059 | { |
2060 | if (trace_event_get_state(TRACE_VFIO_QUIRK_ATI_BONAIRE_RESET) && qemu_loglevel_mask(LOG_TRACE)) { |
2061 | struct timeval _now; |
2062 | gettimeofday(&_now, NULL); |
2063 | qemu_log("%d@%zu.%06zu:vfio_quirk_ati_bonaire_reset " "%s" "\n" , |
2064 | qemu_get_thread_id(), |
2065 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2066 | , name); |
2067 | } |
2068 | } |
2069 | |
2070 | static inline void trace_vfio_quirk_ati_bonaire_reset(const char * name) |
2071 | { |
2072 | if (true) { |
2073 | _nocheck__trace_vfio_quirk_ati_bonaire_reset(name); |
2074 | } |
2075 | } |
2076 | |
2077 | #define TRACE_VFIO_IOEVENTFD_EXIT_BACKEND_DSTATE() ( \ |
2078 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_IOEVENTFD_EXIT) || \ |
2079 | false) |
2080 | |
2081 | static inline void _nocheck__trace_vfio_ioeventfd_exit(const char * name, uint64_t addr, unsigned size, uint64_t data) |
2082 | { |
2083 | if (trace_event_get_state(TRACE_VFIO_IOEVENTFD_EXIT) && qemu_loglevel_mask(LOG_TRACE)) { |
2084 | struct timeval _now; |
2085 | gettimeofday(&_now, NULL); |
2086 | qemu_log("%d@%zu.%06zu:vfio_ioeventfd_exit " "%s+0x%" PRIx64"[%d]:0x%" PRIx64 "\n" , |
2087 | qemu_get_thread_id(), |
2088 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2089 | , name, addr, size, data); |
2090 | } |
2091 | } |
2092 | |
2093 | static inline void trace_vfio_ioeventfd_exit(const char * name, uint64_t addr, unsigned size, uint64_t data) |
2094 | { |
2095 | if (true) { |
2096 | _nocheck__trace_vfio_ioeventfd_exit(name, addr, size, data); |
2097 | } |
2098 | } |
2099 | |
2100 | #define TRACE_VFIO_IOEVENTFD_HANDLER_BACKEND_DSTATE() ( \ |
2101 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_IOEVENTFD_HANDLER) || \ |
2102 | false) |
2103 | |
2104 | static inline void _nocheck__trace_vfio_ioeventfd_handler(const char * name, uint64_t addr, unsigned size, uint64_t data) |
2105 | { |
2106 | if (trace_event_get_state(TRACE_VFIO_IOEVENTFD_HANDLER) && qemu_loglevel_mask(LOG_TRACE)) { |
2107 | struct timeval _now; |
2108 | gettimeofday(&_now, NULL); |
2109 | qemu_log("%d@%zu.%06zu:vfio_ioeventfd_handler " "%s+0x%" PRIx64"[%d] -> 0x%" PRIx64 "\n" , |
2110 | qemu_get_thread_id(), |
2111 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2112 | , name, addr, size, data); |
2113 | } |
2114 | } |
2115 | |
2116 | static inline void trace_vfio_ioeventfd_handler(const char * name, uint64_t addr, unsigned size, uint64_t data) |
2117 | { |
2118 | if (true) { |
2119 | _nocheck__trace_vfio_ioeventfd_handler(name, addr, size, data); |
2120 | } |
2121 | } |
2122 | |
2123 | #define TRACE_VFIO_IOEVENTFD_INIT_BACKEND_DSTATE() ( \ |
2124 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_IOEVENTFD_INIT) || \ |
2125 | false) |
2126 | |
2127 | static inline void _nocheck__trace_vfio_ioeventfd_init(const char * name, uint64_t addr, unsigned size, uint64_t data, bool vfio) |
2128 | { |
2129 | if (trace_event_get_state(TRACE_VFIO_IOEVENTFD_INIT) && qemu_loglevel_mask(LOG_TRACE)) { |
2130 | struct timeval _now; |
2131 | gettimeofday(&_now, NULL); |
2132 | qemu_log("%d@%zu.%06zu:vfio_ioeventfd_init " "%s+0x%" PRIx64"[%d]:0x%" PRIx64" vfio:%d" "\n" , |
2133 | qemu_get_thread_id(), |
2134 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2135 | , name, addr, size, data, vfio); |
2136 | } |
2137 | } |
2138 | |
2139 | static inline void trace_vfio_ioeventfd_init(const char * name, uint64_t addr, unsigned size, uint64_t data, bool vfio) |
2140 | { |
2141 | if (true) { |
2142 | _nocheck__trace_vfio_ioeventfd_init(name, addr, size, data, vfio); |
2143 | } |
2144 | } |
2145 | |
2146 | #define TRACE_VFIO_PCI_IGD_BAR4_WRITE_BACKEND_DSTATE() ( \ |
2147 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_IGD_BAR4_WRITE) || \ |
2148 | false) |
2149 | |
2150 | static inline void _nocheck__trace_vfio_pci_igd_bar4_write(const char * name, uint32_t index, uint32_t data, uint32_t base) |
2151 | { |
2152 | if (trace_event_get_state(TRACE_VFIO_PCI_IGD_BAR4_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
2153 | struct timeval _now; |
2154 | gettimeofday(&_now, NULL); |
2155 | qemu_log("%d@%zu.%06zu:vfio_pci_igd_bar4_write " "%s [0x%03x] 0x%08x -> 0x%08x" "\n" , |
2156 | qemu_get_thread_id(), |
2157 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2158 | , name, index, data, base); |
2159 | } |
2160 | } |
2161 | |
2162 | static inline void trace_vfio_pci_igd_bar4_write(const char * name, uint32_t index, uint32_t data, uint32_t base) |
2163 | { |
2164 | if (true) { |
2165 | _nocheck__trace_vfio_pci_igd_bar4_write(name, index, data, base); |
2166 | } |
2167 | } |
2168 | |
2169 | #define TRACE_VFIO_PCI_IGD_BDSM_ENABLED_BACKEND_DSTATE() ( \ |
2170 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_IGD_BDSM_ENABLED) || \ |
2171 | false) |
2172 | |
2173 | static inline void _nocheck__trace_vfio_pci_igd_bdsm_enabled(const char * name, int size) |
2174 | { |
2175 | if (trace_event_get_state(TRACE_VFIO_PCI_IGD_BDSM_ENABLED) && qemu_loglevel_mask(LOG_TRACE)) { |
2176 | struct timeval _now; |
2177 | gettimeofday(&_now, NULL); |
2178 | qemu_log("%d@%zu.%06zu:vfio_pci_igd_bdsm_enabled " "%s %dMB" "\n" , |
2179 | qemu_get_thread_id(), |
2180 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2181 | , name, size); |
2182 | } |
2183 | } |
2184 | |
2185 | static inline void trace_vfio_pci_igd_bdsm_enabled(const char * name, int size) |
2186 | { |
2187 | if (true) { |
2188 | _nocheck__trace_vfio_pci_igd_bdsm_enabled(name, size); |
2189 | } |
2190 | } |
2191 | |
2192 | #define TRACE_VFIO_PCI_IGD_OPREGION_ENABLED_BACKEND_DSTATE() ( \ |
2193 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_IGD_OPREGION_ENABLED) || \ |
2194 | false) |
2195 | |
2196 | static inline void _nocheck__trace_vfio_pci_igd_opregion_enabled(const char * name) |
2197 | { |
2198 | if (trace_event_get_state(TRACE_VFIO_PCI_IGD_OPREGION_ENABLED) && qemu_loglevel_mask(LOG_TRACE)) { |
2199 | struct timeval _now; |
2200 | gettimeofday(&_now, NULL); |
2201 | qemu_log("%d@%zu.%06zu:vfio_pci_igd_opregion_enabled " "%s" "\n" , |
2202 | qemu_get_thread_id(), |
2203 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2204 | , name); |
2205 | } |
2206 | } |
2207 | |
2208 | static inline void trace_vfio_pci_igd_opregion_enabled(const char * name) |
2209 | { |
2210 | if (true) { |
2211 | _nocheck__trace_vfio_pci_igd_opregion_enabled(name); |
2212 | } |
2213 | } |
2214 | |
2215 | #define TRACE_VFIO_PCI_IGD_HOST_BRIDGE_ENABLED_BACKEND_DSTATE() ( \ |
2216 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_IGD_HOST_BRIDGE_ENABLED) || \ |
2217 | false) |
2218 | |
2219 | static inline void _nocheck__trace_vfio_pci_igd_host_bridge_enabled(const char * name) |
2220 | { |
2221 | if (trace_event_get_state(TRACE_VFIO_PCI_IGD_HOST_BRIDGE_ENABLED) && qemu_loglevel_mask(LOG_TRACE)) { |
2222 | struct timeval _now; |
2223 | gettimeofday(&_now, NULL); |
2224 | qemu_log("%d@%zu.%06zu:vfio_pci_igd_host_bridge_enabled " "%s" "\n" , |
2225 | qemu_get_thread_id(), |
2226 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2227 | , name); |
2228 | } |
2229 | } |
2230 | |
2231 | static inline void trace_vfio_pci_igd_host_bridge_enabled(const char * name) |
2232 | { |
2233 | if (true) { |
2234 | _nocheck__trace_vfio_pci_igd_host_bridge_enabled(name); |
2235 | } |
2236 | } |
2237 | |
2238 | #define TRACE_VFIO_PCI_IGD_LPC_BRIDGE_ENABLED_BACKEND_DSTATE() ( \ |
2239 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_IGD_LPC_BRIDGE_ENABLED) || \ |
2240 | false) |
2241 | |
2242 | static inline void _nocheck__trace_vfio_pci_igd_lpc_bridge_enabled(const char * name) |
2243 | { |
2244 | if (trace_event_get_state(TRACE_VFIO_PCI_IGD_LPC_BRIDGE_ENABLED) && qemu_loglevel_mask(LOG_TRACE)) { |
2245 | struct timeval _now; |
2246 | gettimeofday(&_now, NULL); |
2247 | qemu_log("%d@%zu.%06zu:vfio_pci_igd_lpc_bridge_enabled " "%s" "\n" , |
2248 | qemu_get_thread_id(), |
2249 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2250 | , name); |
2251 | } |
2252 | } |
2253 | |
2254 | static inline void trace_vfio_pci_igd_lpc_bridge_enabled(const char * name) |
2255 | { |
2256 | if (true) { |
2257 | _nocheck__trace_vfio_pci_igd_lpc_bridge_enabled(name); |
2258 | } |
2259 | } |
2260 | |
2261 | #define TRACE_VFIO_PCI_NVIDIA_GPU_SETUP_QUIRK_BACKEND_DSTATE() ( \ |
2262 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_NVIDIA_GPU_SETUP_QUIRK) || \ |
2263 | false) |
2264 | |
2265 | static inline void _nocheck__trace_vfio_pci_nvidia_gpu_setup_quirk(const char * name, uint64_t tgt, uint64_t size) |
2266 | { |
2267 | if (trace_event_get_state(TRACE_VFIO_PCI_NVIDIA_GPU_SETUP_QUIRK) && qemu_loglevel_mask(LOG_TRACE)) { |
2268 | struct timeval _now; |
2269 | gettimeofday(&_now, NULL); |
2270 | qemu_log("%d@%zu.%06zu:vfio_pci_nvidia_gpu_setup_quirk " "%s tgt=0x%" PRIx64" size=0x%" PRIx64 "\n" , |
2271 | qemu_get_thread_id(), |
2272 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2273 | , name, tgt, size); |
2274 | } |
2275 | } |
2276 | |
2277 | static inline void trace_vfio_pci_nvidia_gpu_setup_quirk(const char * name, uint64_t tgt, uint64_t size) |
2278 | { |
2279 | if (true) { |
2280 | _nocheck__trace_vfio_pci_nvidia_gpu_setup_quirk(name, tgt, size); |
2281 | } |
2282 | } |
2283 | |
2284 | #define TRACE_VFIO_PCI_NVLINK2_SETUP_QUIRK_SSATGT_BACKEND_DSTATE() ( \ |
2285 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_NVLINK2_SETUP_QUIRK_SSATGT) || \ |
2286 | false) |
2287 | |
2288 | static inline void _nocheck__trace_vfio_pci_nvlink2_setup_quirk_ssatgt(const char * name, uint64_t tgt, uint64_t size) |
2289 | { |
2290 | if (trace_event_get_state(TRACE_VFIO_PCI_NVLINK2_SETUP_QUIRK_SSATGT) && qemu_loglevel_mask(LOG_TRACE)) { |
2291 | struct timeval _now; |
2292 | gettimeofday(&_now, NULL); |
2293 | qemu_log("%d@%zu.%06zu:vfio_pci_nvlink2_setup_quirk_ssatgt " "%s tgt=0x%" PRIx64" size=0x%" PRIx64 "\n" , |
2294 | qemu_get_thread_id(), |
2295 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2296 | , name, tgt, size); |
2297 | } |
2298 | } |
2299 | |
2300 | static inline void trace_vfio_pci_nvlink2_setup_quirk_ssatgt(const char * name, uint64_t tgt, uint64_t size) |
2301 | { |
2302 | if (true) { |
2303 | _nocheck__trace_vfio_pci_nvlink2_setup_quirk_ssatgt(name, tgt, size); |
2304 | } |
2305 | } |
2306 | |
2307 | #define TRACE_VFIO_PCI_NVLINK2_SETUP_QUIRK_LNKSPD_BACKEND_DSTATE() ( \ |
2308 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PCI_NVLINK2_SETUP_QUIRK_LNKSPD) || \ |
2309 | false) |
2310 | |
2311 | static inline void _nocheck__trace_vfio_pci_nvlink2_setup_quirk_lnkspd(const char * name, uint32_t link_speed) |
2312 | { |
2313 | if (trace_event_get_state(TRACE_VFIO_PCI_NVLINK2_SETUP_QUIRK_LNKSPD) && qemu_loglevel_mask(LOG_TRACE)) { |
2314 | struct timeval _now; |
2315 | gettimeofday(&_now, NULL); |
2316 | qemu_log("%d@%zu.%06zu:vfio_pci_nvlink2_setup_quirk_lnkspd " "%s link_speed=0x%x" "\n" , |
2317 | qemu_get_thread_id(), |
2318 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2319 | , name, link_speed); |
2320 | } |
2321 | } |
2322 | |
2323 | static inline void trace_vfio_pci_nvlink2_setup_quirk_lnkspd(const char * name, uint32_t link_speed) |
2324 | { |
2325 | if (true) { |
2326 | _nocheck__trace_vfio_pci_nvlink2_setup_quirk_lnkspd(name, link_speed); |
2327 | } |
2328 | } |
2329 | |
2330 | #define TRACE_VFIO_REGION_WRITE_BACKEND_DSTATE() ( \ |
2331 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_REGION_WRITE) || \ |
2332 | false) |
2333 | |
2334 | static inline void _nocheck__trace_vfio_region_write(const char * name, int index, uint64_t addr, uint64_t data, unsigned size) |
2335 | { |
2336 | if (trace_event_get_state(TRACE_VFIO_REGION_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { |
2337 | struct timeval _now; |
2338 | gettimeofday(&_now, NULL); |
2339 | qemu_log("%d@%zu.%06zu:vfio_region_write " " (%s:region%d+0x%" PRIx64", 0x%" PRIx64 ", %d)" "\n" , |
2340 | qemu_get_thread_id(), |
2341 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2342 | , name, index, addr, data, size); |
2343 | } |
2344 | } |
2345 | |
2346 | static inline void trace_vfio_region_write(const char * name, int index, uint64_t addr, uint64_t data, unsigned size) |
2347 | { |
2348 | if (true) { |
2349 | _nocheck__trace_vfio_region_write(name, index, addr, data, size); |
2350 | } |
2351 | } |
2352 | |
2353 | #define TRACE_VFIO_REGION_READ_BACKEND_DSTATE() ( \ |
2354 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_REGION_READ) || \ |
2355 | false) |
2356 | |
2357 | static inline void _nocheck__trace_vfio_region_read(char * name, int index, uint64_t addr, unsigned size, uint64_t data) |
2358 | { |
2359 | if (trace_event_get_state(TRACE_VFIO_REGION_READ) && qemu_loglevel_mask(LOG_TRACE)) { |
2360 | struct timeval _now; |
2361 | gettimeofday(&_now, NULL); |
2362 | qemu_log("%d@%zu.%06zu:vfio_region_read " " (%s:region%d+0x%" PRIx64", %d) = 0x%" PRIx64 "\n" , |
2363 | qemu_get_thread_id(), |
2364 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2365 | , name, index, addr, size, data); |
2366 | } |
2367 | } |
2368 | |
2369 | static inline void trace_vfio_region_read(char * name, int index, uint64_t addr, unsigned size, uint64_t data) |
2370 | { |
2371 | if (true) { |
2372 | _nocheck__trace_vfio_region_read(name, index, addr, size, data); |
2373 | } |
2374 | } |
2375 | |
2376 | #define TRACE_VFIO_IOMMU_MAP_NOTIFY_BACKEND_DSTATE() ( \ |
2377 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_IOMMU_MAP_NOTIFY) || \ |
2378 | false) |
2379 | |
2380 | static inline void _nocheck__trace_vfio_iommu_map_notify(const char * op, uint64_t iova_start, uint64_t iova_end) |
2381 | { |
2382 | if (trace_event_get_state(TRACE_VFIO_IOMMU_MAP_NOTIFY) && qemu_loglevel_mask(LOG_TRACE)) { |
2383 | struct timeval _now; |
2384 | gettimeofday(&_now, NULL); |
2385 | qemu_log("%d@%zu.%06zu:vfio_iommu_map_notify " "iommu %s @ 0x%" PRIx64" - 0x%" PRIx64 "\n" , |
2386 | qemu_get_thread_id(), |
2387 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2388 | , op, iova_start, iova_end); |
2389 | } |
2390 | } |
2391 | |
2392 | static inline void trace_vfio_iommu_map_notify(const char * op, uint64_t iova_start, uint64_t iova_end) |
2393 | { |
2394 | if (true) { |
2395 | _nocheck__trace_vfio_iommu_map_notify(op, iova_start, iova_end); |
2396 | } |
2397 | } |
2398 | |
2399 | #define TRACE_VFIO_LISTENER_REGION_ADD_SKIP_BACKEND_DSTATE() ( \ |
2400 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_LISTENER_REGION_ADD_SKIP) || \ |
2401 | false) |
2402 | |
2403 | static inline void _nocheck__trace_vfio_listener_region_add_skip(uint64_t start, uint64_t end) |
2404 | { |
2405 | if (trace_event_get_state(TRACE_VFIO_LISTENER_REGION_ADD_SKIP) && qemu_loglevel_mask(LOG_TRACE)) { |
2406 | struct timeval _now; |
2407 | gettimeofday(&_now, NULL); |
2408 | qemu_log("%d@%zu.%06zu:vfio_listener_region_add_skip " "SKIPPING region_add 0x%" PRIx64" - 0x%" PRIx64 "\n" , |
2409 | qemu_get_thread_id(), |
2410 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2411 | , start, end); |
2412 | } |
2413 | } |
2414 | |
2415 | static inline void trace_vfio_listener_region_add_skip(uint64_t start, uint64_t end) |
2416 | { |
2417 | if (true) { |
2418 | _nocheck__trace_vfio_listener_region_add_skip(start, end); |
2419 | } |
2420 | } |
2421 | |
2422 | #define TRACE_VFIO_SPAPR_GROUP_ATTACH_BACKEND_DSTATE() ( \ |
2423 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_SPAPR_GROUP_ATTACH) || \ |
2424 | false) |
2425 | |
2426 | static inline void _nocheck__trace_vfio_spapr_group_attach(int groupfd, int tablefd) |
2427 | { |
2428 | if (trace_event_get_state(TRACE_VFIO_SPAPR_GROUP_ATTACH) && qemu_loglevel_mask(LOG_TRACE)) { |
2429 | struct timeval _now; |
2430 | gettimeofday(&_now, NULL); |
2431 | qemu_log("%d@%zu.%06zu:vfio_spapr_group_attach " "Attached groupfd %d to liobn fd %d" "\n" , |
2432 | qemu_get_thread_id(), |
2433 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2434 | , groupfd, tablefd); |
2435 | } |
2436 | } |
2437 | |
2438 | static inline void trace_vfio_spapr_group_attach(int groupfd, int tablefd) |
2439 | { |
2440 | if (true) { |
2441 | _nocheck__trace_vfio_spapr_group_attach(groupfd, tablefd); |
2442 | } |
2443 | } |
2444 | |
2445 | #define TRACE_VFIO_LISTENER_REGION_ADD_IOMMU_BACKEND_DSTATE() ( \ |
2446 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_LISTENER_REGION_ADD_IOMMU) || \ |
2447 | false) |
2448 | |
2449 | static inline void _nocheck__trace_vfio_listener_region_add_iommu(uint64_t start, uint64_t end) |
2450 | { |
2451 | if (trace_event_get_state(TRACE_VFIO_LISTENER_REGION_ADD_IOMMU) && qemu_loglevel_mask(LOG_TRACE)) { |
2452 | struct timeval _now; |
2453 | gettimeofday(&_now, NULL); |
2454 | qemu_log("%d@%zu.%06zu:vfio_listener_region_add_iommu " "region_add [iommu] 0x%" PRIx64" - 0x%" PRIx64 "\n" , |
2455 | qemu_get_thread_id(), |
2456 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2457 | , start, end); |
2458 | } |
2459 | } |
2460 | |
2461 | static inline void trace_vfio_listener_region_add_iommu(uint64_t start, uint64_t end) |
2462 | { |
2463 | if (true) { |
2464 | _nocheck__trace_vfio_listener_region_add_iommu(start, end); |
2465 | } |
2466 | } |
2467 | |
2468 | #define TRACE_VFIO_LISTENER_REGION_ADD_RAM_BACKEND_DSTATE() ( \ |
2469 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_LISTENER_REGION_ADD_RAM) || \ |
2470 | false) |
2471 | |
2472 | static inline void _nocheck__trace_vfio_listener_region_add_ram(uint64_t iova_start, uint64_t iova_end, void * vaddr) |
2473 | { |
2474 | if (trace_event_get_state(TRACE_VFIO_LISTENER_REGION_ADD_RAM) && qemu_loglevel_mask(LOG_TRACE)) { |
2475 | struct timeval _now; |
2476 | gettimeofday(&_now, NULL); |
2477 | qemu_log("%d@%zu.%06zu:vfio_listener_region_add_ram " "region_add [ram] 0x%" PRIx64" - 0x%" PRIx64" [%p]" "\n" , |
2478 | qemu_get_thread_id(), |
2479 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2480 | , iova_start, iova_end, vaddr); |
2481 | } |
2482 | } |
2483 | |
2484 | static inline void trace_vfio_listener_region_add_ram(uint64_t iova_start, uint64_t iova_end, void * vaddr) |
2485 | { |
2486 | if (true) { |
2487 | _nocheck__trace_vfio_listener_region_add_ram(iova_start, iova_end, vaddr); |
2488 | } |
2489 | } |
2490 | |
2491 | #define TRACE_VFIO_LISTENER_REGION_ADD_NO_DMA_MAP_BACKEND_DSTATE() ( \ |
2492 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_LISTENER_REGION_ADD_NO_DMA_MAP) || \ |
2493 | false) |
2494 | |
2495 | static inline void _nocheck__trace_vfio_listener_region_add_no_dma_map(const char * name, uint64_t iova, uint64_t size, uint64_t page_size) |
2496 | { |
2497 | if (trace_event_get_state(TRACE_VFIO_LISTENER_REGION_ADD_NO_DMA_MAP) && qemu_loglevel_mask(LOG_TRACE)) { |
2498 | struct timeval _now; |
2499 | gettimeofday(&_now, NULL); |
2500 | qemu_log("%d@%zu.%06zu:vfio_listener_region_add_no_dma_map " "Region \"%s\" 0x%" PRIx64" size=0x%" PRIx64" is not aligned to 0x%" PRIx64" and cannot be mapped for DMA" "\n" , |
2501 | qemu_get_thread_id(), |
2502 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2503 | , name, iova, size, page_size); |
2504 | } |
2505 | } |
2506 | |
2507 | static inline void trace_vfio_listener_region_add_no_dma_map(const char * name, uint64_t iova, uint64_t size, uint64_t page_size) |
2508 | { |
2509 | if (true) { |
2510 | _nocheck__trace_vfio_listener_region_add_no_dma_map(name, iova, size, page_size); |
2511 | } |
2512 | } |
2513 | |
2514 | #define TRACE_VFIO_LISTENER_REGION_DEL_SKIP_BACKEND_DSTATE() ( \ |
2515 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_LISTENER_REGION_DEL_SKIP) || \ |
2516 | false) |
2517 | |
2518 | static inline void _nocheck__trace_vfio_listener_region_del_skip(uint64_t start, uint64_t end) |
2519 | { |
2520 | if (trace_event_get_state(TRACE_VFIO_LISTENER_REGION_DEL_SKIP) && qemu_loglevel_mask(LOG_TRACE)) { |
2521 | struct timeval _now; |
2522 | gettimeofday(&_now, NULL); |
2523 | qemu_log("%d@%zu.%06zu:vfio_listener_region_del_skip " "SKIPPING region_del 0x%" PRIx64" - 0x%" PRIx64 "\n" , |
2524 | qemu_get_thread_id(), |
2525 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2526 | , start, end); |
2527 | } |
2528 | } |
2529 | |
2530 | static inline void trace_vfio_listener_region_del_skip(uint64_t start, uint64_t end) |
2531 | { |
2532 | if (true) { |
2533 | _nocheck__trace_vfio_listener_region_del_skip(start, end); |
2534 | } |
2535 | } |
2536 | |
2537 | #define TRACE_VFIO_LISTENER_REGION_DEL_BACKEND_DSTATE() ( \ |
2538 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_LISTENER_REGION_DEL) || \ |
2539 | false) |
2540 | |
2541 | static inline void _nocheck__trace_vfio_listener_region_del(uint64_t start, uint64_t end) |
2542 | { |
2543 | if (trace_event_get_state(TRACE_VFIO_LISTENER_REGION_DEL) && qemu_loglevel_mask(LOG_TRACE)) { |
2544 | struct timeval _now; |
2545 | gettimeofday(&_now, NULL); |
2546 | qemu_log("%d@%zu.%06zu:vfio_listener_region_del " "region_del 0x%" PRIx64" - 0x%" PRIx64 "\n" , |
2547 | qemu_get_thread_id(), |
2548 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2549 | , start, end); |
2550 | } |
2551 | } |
2552 | |
2553 | static inline void trace_vfio_listener_region_del(uint64_t start, uint64_t end) |
2554 | { |
2555 | if (true) { |
2556 | _nocheck__trace_vfio_listener_region_del(start, end); |
2557 | } |
2558 | } |
2559 | |
2560 | #define TRACE_VFIO_DISCONNECT_CONTAINER_BACKEND_DSTATE() ( \ |
2561 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_DISCONNECT_CONTAINER) || \ |
2562 | false) |
2563 | |
2564 | static inline void _nocheck__trace_vfio_disconnect_container(int fd) |
2565 | { |
2566 | if (trace_event_get_state(TRACE_VFIO_DISCONNECT_CONTAINER) && qemu_loglevel_mask(LOG_TRACE)) { |
2567 | struct timeval _now; |
2568 | gettimeofday(&_now, NULL); |
2569 | qemu_log("%d@%zu.%06zu:vfio_disconnect_container " "close container->fd=%d" "\n" , |
2570 | qemu_get_thread_id(), |
2571 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2572 | , fd); |
2573 | } |
2574 | } |
2575 | |
2576 | static inline void trace_vfio_disconnect_container(int fd) |
2577 | { |
2578 | if (true) { |
2579 | _nocheck__trace_vfio_disconnect_container(fd); |
2580 | } |
2581 | } |
2582 | |
2583 | #define TRACE_VFIO_PUT_GROUP_BACKEND_DSTATE() ( \ |
2584 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PUT_GROUP) || \ |
2585 | false) |
2586 | |
2587 | static inline void _nocheck__trace_vfio_put_group(int fd) |
2588 | { |
2589 | if (trace_event_get_state(TRACE_VFIO_PUT_GROUP) && qemu_loglevel_mask(LOG_TRACE)) { |
2590 | struct timeval _now; |
2591 | gettimeofday(&_now, NULL); |
2592 | qemu_log("%d@%zu.%06zu:vfio_put_group " "close group->fd=%d" "\n" , |
2593 | qemu_get_thread_id(), |
2594 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2595 | , fd); |
2596 | } |
2597 | } |
2598 | |
2599 | static inline void trace_vfio_put_group(int fd) |
2600 | { |
2601 | if (true) { |
2602 | _nocheck__trace_vfio_put_group(fd); |
2603 | } |
2604 | } |
2605 | |
2606 | #define TRACE_VFIO_GET_DEVICE_BACKEND_DSTATE() ( \ |
2607 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_GET_DEVICE) || \ |
2608 | false) |
2609 | |
2610 | static inline void _nocheck__trace_vfio_get_device(const char * name, unsigned int flags, unsigned int num_regions, unsigned int num_irqs) |
2611 | { |
2612 | if (trace_event_get_state(TRACE_VFIO_GET_DEVICE) && qemu_loglevel_mask(LOG_TRACE)) { |
2613 | struct timeval _now; |
2614 | gettimeofday(&_now, NULL); |
2615 | qemu_log("%d@%zu.%06zu:vfio_get_device " "Device %s flags: %u, regions: %u, irqs: %u" "\n" , |
2616 | qemu_get_thread_id(), |
2617 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2618 | , name, flags, num_regions, num_irqs); |
2619 | } |
2620 | } |
2621 | |
2622 | static inline void trace_vfio_get_device(const char * name, unsigned int flags, unsigned int num_regions, unsigned int num_irqs) |
2623 | { |
2624 | if (true) { |
2625 | _nocheck__trace_vfio_get_device(name, flags, num_regions, num_irqs); |
2626 | } |
2627 | } |
2628 | |
2629 | #define TRACE_VFIO_PUT_BASE_DEVICE_BACKEND_DSTATE() ( \ |
2630 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PUT_BASE_DEVICE) || \ |
2631 | false) |
2632 | |
2633 | static inline void _nocheck__trace_vfio_put_base_device(int fd) |
2634 | { |
2635 | if (trace_event_get_state(TRACE_VFIO_PUT_BASE_DEVICE) && qemu_loglevel_mask(LOG_TRACE)) { |
2636 | struct timeval _now; |
2637 | gettimeofday(&_now, NULL); |
2638 | qemu_log("%d@%zu.%06zu:vfio_put_base_device " "close vdev->fd=%d" "\n" , |
2639 | qemu_get_thread_id(), |
2640 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2641 | , fd); |
2642 | } |
2643 | } |
2644 | |
2645 | static inline void trace_vfio_put_base_device(int fd) |
2646 | { |
2647 | if (true) { |
2648 | _nocheck__trace_vfio_put_base_device(fd); |
2649 | } |
2650 | } |
2651 | |
2652 | #define TRACE_VFIO_REGION_SETUP_BACKEND_DSTATE() ( \ |
2653 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_REGION_SETUP) || \ |
2654 | false) |
2655 | |
2656 | static inline void _nocheck__trace_vfio_region_setup(const char * dev, int index, const char * name, unsigned long flags, unsigned long offset, unsigned long size) |
2657 | { |
2658 | if (trace_event_get_state(TRACE_VFIO_REGION_SETUP) && qemu_loglevel_mask(LOG_TRACE)) { |
2659 | struct timeval _now; |
2660 | gettimeofday(&_now, NULL); |
2661 | qemu_log("%d@%zu.%06zu:vfio_region_setup " "Device %s, region %d \"%s\", flags: 0x%lx, offset: 0x%lx, size: 0x%lx" "\n" , |
2662 | qemu_get_thread_id(), |
2663 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2664 | , dev, index, name, flags, offset, size); |
2665 | } |
2666 | } |
2667 | |
2668 | static inline void trace_vfio_region_setup(const char * dev, int index, const char * name, unsigned long flags, unsigned long offset, unsigned long size) |
2669 | { |
2670 | if (true) { |
2671 | _nocheck__trace_vfio_region_setup(dev, index, name, flags, offset, size); |
2672 | } |
2673 | } |
2674 | |
2675 | #define TRACE_VFIO_REGION_MMAP_FAULT_BACKEND_DSTATE() ( \ |
2676 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_REGION_MMAP_FAULT) || \ |
2677 | false) |
2678 | |
2679 | static inline void _nocheck__trace_vfio_region_mmap_fault(const char * name, int index, unsigned long offset, unsigned long size, int fault) |
2680 | { |
2681 | if (trace_event_get_state(TRACE_VFIO_REGION_MMAP_FAULT) && qemu_loglevel_mask(LOG_TRACE)) { |
2682 | struct timeval _now; |
2683 | gettimeofday(&_now, NULL); |
2684 | qemu_log("%d@%zu.%06zu:vfio_region_mmap_fault " "Region %s mmaps[%d], [0x%lx - 0x%lx], fault: %d" "\n" , |
2685 | qemu_get_thread_id(), |
2686 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2687 | , name, index, offset, size, fault); |
2688 | } |
2689 | } |
2690 | |
2691 | static inline void trace_vfio_region_mmap_fault(const char * name, int index, unsigned long offset, unsigned long size, int fault) |
2692 | { |
2693 | if (true) { |
2694 | _nocheck__trace_vfio_region_mmap_fault(name, index, offset, size, fault); |
2695 | } |
2696 | } |
2697 | |
2698 | #define TRACE_VFIO_REGION_MMAP_BACKEND_DSTATE() ( \ |
2699 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_REGION_MMAP) || \ |
2700 | false) |
2701 | |
2702 | static inline void _nocheck__trace_vfio_region_mmap(const char * name, unsigned long offset, unsigned long end) |
2703 | { |
2704 | if (trace_event_get_state(TRACE_VFIO_REGION_MMAP) && qemu_loglevel_mask(LOG_TRACE)) { |
2705 | struct timeval _now; |
2706 | gettimeofday(&_now, NULL); |
2707 | qemu_log("%d@%zu.%06zu:vfio_region_mmap " "Region %s [0x%lx - 0x%lx]" "\n" , |
2708 | qemu_get_thread_id(), |
2709 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2710 | , name, offset, end); |
2711 | } |
2712 | } |
2713 | |
2714 | static inline void trace_vfio_region_mmap(const char * name, unsigned long offset, unsigned long end) |
2715 | { |
2716 | if (true) { |
2717 | _nocheck__trace_vfio_region_mmap(name, offset, end); |
2718 | } |
2719 | } |
2720 | |
2721 | #define TRACE_VFIO_REGION_EXIT_BACKEND_DSTATE() ( \ |
2722 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_REGION_EXIT) || \ |
2723 | false) |
2724 | |
2725 | static inline void _nocheck__trace_vfio_region_exit(const char * name, int index) |
2726 | { |
2727 | if (trace_event_get_state(TRACE_VFIO_REGION_EXIT) && qemu_loglevel_mask(LOG_TRACE)) { |
2728 | struct timeval _now; |
2729 | gettimeofday(&_now, NULL); |
2730 | qemu_log("%d@%zu.%06zu:vfio_region_exit " "Device %s, region %d" "\n" , |
2731 | qemu_get_thread_id(), |
2732 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2733 | , name, index); |
2734 | } |
2735 | } |
2736 | |
2737 | static inline void trace_vfio_region_exit(const char * name, int index) |
2738 | { |
2739 | if (true) { |
2740 | _nocheck__trace_vfio_region_exit(name, index); |
2741 | } |
2742 | } |
2743 | |
2744 | #define TRACE_VFIO_REGION_FINALIZE_BACKEND_DSTATE() ( \ |
2745 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_REGION_FINALIZE) || \ |
2746 | false) |
2747 | |
2748 | static inline void _nocheck__trace_vfio_region_finalize(const char * name, int index) |
2749 | { |
2750 | if (trace_event_get_state(TRACE_VFIO_REGION_FINALIZE) && qemu_loglevel_mask(LOG_TRACE)) { |
2751 | struct timeval _now; |
2752 | gettimeofday(&_now, NULL); |
2753 | qemu_log("%d@%zu.%06zu:vfio_region_finalize " "Device %s, region %d" "\n" , |
2754 | qemu_get_thread_id(), |
2755 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2756 | , name, index); |
2757 | } |
2758 | } |
2759 | |
2760 | static inline void trace_vfio_region_finalize(const char * name, int index) |
2761 | { |
2762 | if (true) { |
2763 | _nocheck__trace_vfio_region_finalize(name, index); |
2764 | } |
2765 | } |
2766 | |
2767 | #define TRACE_VFIO_REGION_MMAPS_SET_ENABLED_BACKEND_DSTATE() ( \ |
2768 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_REGION_MMAPS_SET_ENABLED) || \ |
2769 | false) |
2770 | |
2771 | static inline void _nocheck__trace_vfio_region_mmaps_set_enabled(const char * name, bool enabled) |
2772 | { |
2773 | if (trace_event_get_state(TRACE_VFIO_REGION_MMAPS_SET_ENABLED) && qemu_loglevel_mask(LOG_TRACE)) { |
2774 | struct timeval _now; |
2775 | gettimeofday(&_now, NULL); |
2776 | qemu_log("%d@%zu.%06zu:vfio_region_mmaps_set_enabled " "Region %s mmaps enabled: %d" "\n" , |
2777 | qemu_get_thread_id(), |
2778 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2779 | , name, enabled); |
2780 | } |
2781 | } |
2782 | |
2783 | static inline void trace_vfio_region_mmaps_set_enabled(const char * name, bool enabled) |
2784 | { |
2785 | if (true) { |
2786 | _nocheck__trace_vfio_region_mmaps_set_enabled(name, enabled); |
2787 | } |
2788 | } |
2789 | |
2790 | #define () ( \ |
2791 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_REGION_SPARSE_MMAP_HEADER) || \ |
2792 | false) |
2793 | |
2794 | static inline void (const char * name, int index, int nr_areas) |
2795 | { |
2796 | if (trace_event_get_state(TRACE_VFIO_REGION_SPARSE_MMAP_HEADER) && qemu_loglevel_mask(LOG_TRACE)) { |
2797 | struct timeval _now; |
2798 | gettimeofday(&_now, NULL); |
2799 | qemu_log("%d@%zu.%06zu:vfio_region_sparse_mmap_header " "Device %s region %d: %d sparse mmap entries" "\n" , |
2800 | qemu_get_thread_id(), |
2801 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2802 | , name, index, nr_areas); |
2803 | } |
2804 | } |
2805 | |
2806 | static inline void (const char * name, int index, int nr_areas) |
2807 | { |
2808 | if (true) { |
2809 | _nocheck__trace_vfio_region_sparse_mmap_header(name, index, nr_areas); |
2810 | } |
2811 | } |
2812 | |
2813 | #define TRACE_VFIO_REGION_SPARSE_MMAP_ENTRY_BACKEND_DSTATE() ( \ |
2814 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_REGION_SPARSE_MMAP_ENTRY) || \ |
2815 | false) |
2816 | |
2817 | static inline void _nocheck__trace_vfio_region_sparse_mmap_entry(int i, unsigned long start, unsigned long end) |
2818 | { |
2819 | if (trace_event_get_state(TRACE_VFIO_REGION_SPARSE_MMAP_ENTRY) && qemu_loglevel_mask(LOG_TRACE)) { |
2820 | struct timeval _now; |
2821 | gettimeofday(&_now, NULL); |
2822 | qemu_log("%d@%zu.%06zu:vfio_region_sparse_mmap_entry " "sparse entry %d [0x%lx - 0x%lx]" "\n" , |
2823 | qemu_get_thread_id(), |
2824 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2825 | , i, start, end); |
2826 | } |
2827 | } |
2828 | |
2829 | static inline void trace_vfio_region_sparse_mmap_entry(int i, unsigned long start, unsigned long end) |
2830 | { |
2831 | if (true) { |
2832 | _nocheck__trace_vfio_region_sparse_mmap_entry(i, start, end); |
2833 | } |
2834 | } |
2835 | |
2836 | #define TRACE_VFIO_GET_DEV_REGION_BACKEND_DSTATE() ( \ |
2837 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_GET_DEV_REGION) || \ |
2838 | false) |
2839 | |
2840 | static inline void _nocheck__trace_vfio_get_dev_region(const char * name, int index, uint32_t type, uint32_t subtype) |
2841 | { |
2842 | if (trace_event_get_state(TRACE_VFIO_GET_DEV_REGION) && qemu_loglevel_mask(LOG_TRACE)) { |
2843 | struct timeval _now; |
2844 | gettimeofday(&_now, NULL); |
2845 | qemu_log("%d@%zu.%06zu:vfio_get_dev_region " "%s index %d, %08x/%0x8" "\n" , |
2846 | qemu_get_thread_id(), |
2847 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2848 | , name, index, type, subtype); |
2849 | } |
2850 | } |
2851 | |
2852 | static inline void trace_vfio_get_dev_region(const char * name, int index, uint32_t type, uint32_t subtype) |
2853 | { |
2854 | if (true) { |
2855 | _nocheck__trace_vfio_get_dev_region(name, index, type, subtype); |
2856 | } |
2857 | } |
2858 | |
2859 | #define TRACE_VFIO_DMA_UNMAP_OVERFLOW_WORKAROUND_BACKEND_DSTATE() ( \ |
2860 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_DMA_UNMAP_OVERFLOW_WORKAROUND) || \ |
2861 | false) |
2862 | |
2863 | static inline void _nocheck__trace_vfio_dma_unmap_overflow_workaround(void) |
2864 | { |
2865 | if (trace_event_get_state(TRACE_VFIO_DMA_UNMAP_OVERFLOW_WORKAROUND) && qemu_loglevel_mask(LOG_TRACE)) { |
2866 | struct timeval _now; |
2867 | gettimeofday(&_now, NULL); |
2868 | qemu_log("%d@%zu.%06zu:vfio_dma_unmap_overflow_workaround " "" "\n" , |
2869 | qemu_get_thread_id(), |
2870 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2871 | ); |
2872 | } |
2873 | } |
2874 | |
2875 | static inline void trace_vfio_dma_unmap_overflow_workaround(void) |
2876 | { |
2877 | if (true) { |
2878 | _nocheck__trace_vfio_dma_unmap_overflow_workaround(); |
2879 | } |
2880 | } |
2881 | |
2882 | #define TRACE_VFIO_PLATFORM_BASE_DEVICE_INIT_BACKEND_DSTATE() ( \ |
2883 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PLATFORM_BASE_DEVICE_INIT) || \ |
2884 | false) |
2885 | |
2886 | static inline void _nocheck__trace_vfio_platform_base_device_init(char * name, int groupid) |
2887 | { |
2888 | if (trace_event_get_state(TRACE_VFIO_PLATFORM_BASE_DEVICE_INIT) && qemu_loglevel_mask(LOG_TRACE)) { |
2889 | struct timeval _now; |
2890 | gettimeofday(&_now, NULL); |
2891 | qemu_log("%d@%zu.%06zu:vfio_platform_base_device_init " "%s belongs to group #%d" "\n" , |
2892 | qemu_get_thread_id(), |
2893 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2894 | , name, groupid); |
2895 | } |
2896 | } |
2897 | |
2898 | static inline void trace_vfio_platform_base_device_init(char * name, int groupid) |
2899 | { |
2900 | if (true) { |
2901 | _nocheck__trace_vfio_platform_base_device_init(name, groupid); |
2902 | } |
2903 | } |
2904 | |
2905 | #define TRACE_VFIO_PLATFORM_REALIZE_BACKEND_DSTATE() ( \ |
2906 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PLATFORM_REALIZE) || \ |
2907 | false) |
2908 | |
2909 | static inline void _nocheck__trace_vfio_platform_realize(char * name, char * compat) |
2910 | { |
2911 | if (trace_event_get_state(TRACE_VFIO_PLATFORM_REALIZE) && qemu_loglevel_mask(LOG_TRACE)) { |
2912 | struct timeval _now; |
2913 | gettimeofday(&_now, NULL); |
2914 | qemu_log("%d@%zu.%06zu:vfio_platform_realize " "vfio device %s, compat = %s" "\n" , |
2915 | qemu_get_thread_id(), |
2916 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2917 | , name, compat); |
2918 | } |
2919 | } |
2920 | |
2921 | static inline void trace_vfio_platform_realize(char * name, char * compat) |
2922 | { |
2923 | if (true) { |
2924 | _nocheck__trace_vfio_platform_realize(name, compat); |
2925 | } |
2926 | } |
2927 | |
2928 | #define TRACE_VFIO_PLATFORM_EOI_BACKEND_DSTATE() ( \ |
2929 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PLATFORM_EOI) || \ |
2930 | false) |
2931 | |
2932 | static inline void _nocheck__trace_vfio_platform_eoi(int pin, int fd) |
2933 | { |
2934 | if (trace_event_get_state(TRACE_VFIO_PLATFORM_EOI) && qemu_loglevel_mask(LOG_TRACE)) { |
2935 | struct timeval _now; |
2936 | gettimeofday(&_now, NULL); |
2937 | qemu_log("%d@%zu.%06zu:vfio_platform_eoi " "EOI IRQ pin %d (fd=%d)" "\n" , |
2938 | qemu_get_thread_id(), |
2939 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2940 | , pin, fd); |
2941 | } |
2942 | } |
2943 | |
2944 | static inline void trace_vfio_platform_eoi(int pin, int fd) |
2945 | { |
2946 | if (true) { |
2947 | _nocheck__trace_vfio_platform_eoi(pin, fd); |
2948 | } |
2949 | } |
2950 | |
2951 | #define TRACE_VFIO_PLATFORM_INTP_MMAP_ENABLE_BACKEND_DSTATE() ( \ |
2952 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PLATFORM_INTP_MMAP_ENABLE) || \ |
2953 | false) |
2954 | |
2955 | static inline void _nocheck__trace_vfio_platform_intp_mmap_enable(int pin) |
2956 | { |
2957 | if (trace_event_get_state(TRACE_VFIO_PLATFORM_INTP_MMAP_ENABLE) && qemu_loglevel_mask(LOG_TRACE)) { |
2958 | struct timeval _now; |
2959 | gettimeofday(&_now, NULL); |
2960 | qemu_log("%d@%zu.%06zu:vfio_platform_intp_mmap_enable " "IRQ #%d still active, stay in slow path" "\n" , |
2961 | qemu_get_thread_id(), |
2962 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2963 | , pin); |
2964 | } |
2965 | } |
2966 | |
2967 | static inline void trace_vfio_platform_intp_mmap_enable(int pin) |
2968 | { |
2969 | if (true) { |
2970 | _nocheck__trace_vfio_platform_intp_mmap_enable(pin); |
2971 | } |
2972 | } |
2973 | |
2974 | #define TRACE_VFIO_PLATFORM_INTP_INTERRUPT_BACKEND_DSTATE() ( \ |
2975 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PLATFORM_INTP_INTERRUPT) || \ |
2976 | false) |
2977 | |
2978 | static inline void _nocheck__trace_vfio_platform_intp_interrupt(int pin, int fd) |
2979 | { |
2980 | if (trace_event_get_state(TRACE_VFIO_PLATFORM_INTP_INTERRUPT) && qemu_loglevel_mask(LOG_TRACE)) { |
2981 | struct timeval _now; |
2982 | gettimeofday(&_now, NULL); |
2983 | qemu_log("%d@%zu.%06zu:vfio_platform_intp_interrupt " "Inject IRQ #%d (fd = %d)" "\n" , |
2984 | qemu_get_thread_id(), |
2985 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
2986 | , pin, fd); |
2987 | } |
2988 | } |
2989 | |
2990 | static inline void trace_vfio_platform_intp_interrupt(int pin, int fd) |
2991 | { |
2992 | if (true) { |
2993 | _nocheck__trace_vfio_platform_intp_interrupt(pin, fd); |
2994 | } |
2995 | } |
2996 | |
2997 | #define TRACE_VFIO_PLATFORM_INTP_INJECT_PENDING_LOCKHELD_BACKEND_DSTATE() ( \ |
2998 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PLATFORM_INTP_INJECT_PENDING_LOCKHELD) || \ |
2999 | false) |
3000 | |
3001 | static inline void _nocheck__trace_vfio_platform_intp_inject_pending_lockheld(int pin, int fd) |
3002 | { |
3003 | if (trace_event_get_state(TRACE_VFIO_PLATFORM_INTP_INJECT_PENDING_LOCKHELD) && qemu_loglevel_mask(LOG_TRACE)) { |
3004 | struct timeval _now; |
3005 | gettimeofday(&_now, NULL); |
3006 | qemu_log("%d@%zu.%06zu:vfio_platform_intp_inject_pending_lockheld " "Inject pending IRQ #%d (fd = %d)" "\n" , |
3007 | qemu_get_thread_id(), |
3008 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3009 | , pin, fd); |
3010 | } |
3011 | } |
3012 | |
3013 | static inline void trace_vfio_platform_intp_inject_pending_lockheld(int pin, int fd) |
3014 | { |
3015 | if (true) { |
3016 | _nocheck__trace_vfio_platform_intp_inject_pending_lockheld(pin, fd); |
3017 | } |
3018 | } |
3019 | |
3020 | #define TRACE_VFIO_PLATFORM_POPULATE_INTERRUPTS_BACKEND_DSTATE() ( \ |
3021 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PLATFORM_POPULATE_INTERRUPTS) || \ |
3022 | false) |
3023 | |
3024 | static inline void _nocheck__trace_vfio_platform_populate_interrupts(int pin, int count, int flags) |
3025 | { |
3026 | if (trace_event_get_state(TRACE_VFIO_PLATFORM_POPULATE_INTERRUPTS) && qemu_loglevel_mask(LOG_TRACE)) { |
3027 | struct timeval _now; |
3028 | gettimeofday(&_now, NULL); |
3029 | qemu_log("%d@%zu.%06zu:vfio_platform_populate_interrupts " "- IRQ index %d: count %d, flags=0x%x" "\n" , |
3030 | qemu_get_thread_id(), |
3031 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3032 | , pin, count, flags); |
3033 | } |
3034 | } |
3035 | |
3036 | static inline void trace_vfio_platform_populate_interrupts(int pin, int count, int flags) |
3037 | { |
3038 | if (true) { |
3039 | _nocheck__trace_vfio_platform_populate_interrupts(pin, count, flags); |
3040 | } |
3041 | } |
3042 | |
3043 | #define TRACE_VFIO_INTP_INTERRUPT_SET_PENDING_BACKEND_DSTATE() ( \ |
3044 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_INTP_INTERRUPT_SET_PENDING) || \ |
3045 | false) |
3046 | |
3047 | static inline void _nocheck__trace_vfio_intp_interrupt_set_pending(int index) |
3048 | { |
3049 | if (trace_event_get_state(TRACE_VFIO_INTP_INTERRUPT_SET_PENDING) && qemu_loglevel_mask(LOG_TRACE)) { |
3050 | struct timeval _now; |
3051 | gettimeofday(&_now, NULL); |
3052 | qemu_log("%d@%zu.%06zu:vfio_intp_interrupt_set_pending " "irq %d is set PENDING" "\n" , |
3053 | qemu_get_thread_id(), |
3054 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3055 | , index); |
3056 | } |
3057 | } |
3058 | |
3059 | static inline void trace_vfio_intp_interrupt_set_pending(int index) |
3060 | { |
3061 | if (true) { |
3062 | _nocheck__trace_vfio_intp_interrupt_set_pending(index); |
3063 | } |
3064 | } |
3065 | |
3066 | #define TRACE_VFIO_PLATFORM_START_LEVEL_IRQFD_INJECTION_BACKEND_DSTATE() ( \ |
3067 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PLATFORM_START_LEVEL_IRQFD_INJECTION) || \ |
3068 | false) |
3069 | |
3070 | static inline void _nocheck__trace_vfio_platform_start_level_irqfd_injection(int index, int fd, int resamplefd) |
3071 | { |
3072 | if (trace_event_get_state(TRACE_VFIO_PLATFORM_START_LEVEL_IRQFD_INJECTION) && qemu_loglevel_mask(LOG_TRACE)) { |
3073 | struct timeval _now; |
3074 | gettimeofday(&_now, NULL); |
3075 | qemu_log("%d@%zu.%06zu:vfio_platform_start_level_irqfd_injection " "IRQ index=%d, fd = %d, resamplefd = %d" "\n" , |
3076 | qemu_get_thread_id(), |
3077 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3078 | , index, fd, resamplefd); |
3079 | } |
3080 | } |
3081 | |
3082 | static inline void trace_vfio_platform_start_level_irqfd_injection(int index, int fd, int resamplefd) |
3083 | { |
3084 | if (true) { |
3085 | _nocheck__trace_vfio_platform_start_level_irqfd_injection(index, fd, resamplefd); |
3086 | } |
3087 | } |
3088 | |
3089 | #define TRACE_VFIO_PLATFORM_START_EDGE_IRQFD_INJECTION_BACKEND_DSTATE() ( \ |
3090 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PLATFORM_START_EDGE_IRQFD_INJECTION) || \ |
3091 | false) |
3092 | |
3093 | static inline void _nocheck__trace_vfio_platform_start_edge_irqfd_injection(int index, int fd) |
3094 | { |
3095 | if (trace_event_get_state(TRACE_VFIO_PLATFORM_START_EDGE_IRQFD_INJECTION) && qemu_loglevel_mask(LOG_TRACE)) { |
3096 | struct timeval _now; |
3097 | gettimeofday(&_now, NULL); |
3098 | qemu_log("%d@%zu.%06zu:vfio_platform_start_edge_irqfd_injection " "IRQ index=%d, fd = %d" "\n" , |
3099 | qemu_get_thread_id(), |
3100 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3101 | , index, fd); |
3102 | } |
3103 | } |
3104 | |
3105 | static inline void trace_vfio_platform_start_edge_irqfd_injection(int index, int fd) |
3106 | { |
3107 | if (true) { |
3108 | _nocheck__trace_vfio_platform_start_edge_irqfd_injection(index, fd); |
3109 | } |
3110 | } |
3111 | |
3112 | #define TRACE_VFIO_PREREG_LISTENER_REGION_ADD_SKIP_BACKEND_DSTATE() ( \ |
3113 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PREREG_LISTENER_REGION_ADD_SKIP) || \ |
3114 | false) |
3115 | |
3116 | static inline void _nocheck__trace_vfio_prereg_listener_region_add_skip(uint64_t start, uint64_t end) |
3117 | { |
3118 | if (trace_event_get_state(TRACE_VFIO_PREREG_LISTENER_REGION_ADD_SKIP) && qemu_loglevel_mask(LOG_TRACE)) { |
3119 | struct timeval _now; |
3120 | gettimeofday(&_now, NULL); |
3121 | qemu_log("%d@%zu.%06zu:vfio_prereg_listener_region_add_skip " "0x%" PRIx64" - 0x%" PRIx64 "\n" , |
3122 | qemu_get_thread_id(), |
3123 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3124 | , start, end); |
3125 | } |
3126 | } |
3127 | |
3128 | static inline void trace_vfio_prereg_listener_region_add_skip(uint64_t start, uint64_t end) |
3129 | { |
3130 | if (true) { |
3131 | _nocheck__trace_vfio_prereg_listener_region_add_skip(start, end); |
3132 | } |
3133 | } |
3134 | |
3135 | #define TRACE_VFIO_PREREG_LISTENER_REGION_DEL_SKIP_BACKEND_DSTATE() ( \ |
3136 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PREREG_LISTENER_REGION_DEL_SKIP) || \ |
3137 | false) |
3138 | |
3139 | static inline void _nocheck__trace_vfio_prereg_listener_region_del_skip(uint64_t start, uint64_t end) |
3140 | { |
3141 | if (trace_event_get_state(TRACE_VFIO_PREREG_LISTENER_REGION_DEL_SKIP) && qemu_loglevel_mask(LOG_TRACE)) { |
3142 | struct timeval _now; |
3143 | gettimeofday(&_now, NULL); |
3144 | qemu_log("%d@%zu.%06zu:vfio_prereg_listener_region_del_skip " "0x%" PRIx64" - 0x%" PRIx64 "\n" , |
3145 | qemu_get_thread_id(), |
3146 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3147 | , start, end); |
3148 | } |
3149 | } |
3150 | |
3151 | static inline void trace_vfio_prereg_listener_region_del_skip(uint64_t start, uint64_t end) |
3152 | { |
3153 | if (true) { |
3154 | _nocheck__trace_vfio_prereg_listener_region_del_skip(start, end); |
3155 | } |
3156 | } |
3157 | |
3158 | #define TRACE_VFIO_PREREG_REGISTER_BACKEND_DSTATE() ( \ |
3159 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PREREG_REGISTER) || \ |
3160 | false) |
3161 | |
3162 | static inline void _nocheck__trace_vfio_prereg_register(uint64_t va, uint64_t size, int ret) |
3163 | { |
3164 | if (trace_event_get_state(TRACE_VFIO_PREREG_REGISTER) && qemu_loglevel_mask(LOG_TRACE)) { |
3165 | struct timeval _now; |
3166 | gettimeofday(&_now, NULL); |
3167 | qemu_log("%d@%zu.%06zu:vfio_prereg_register " "va=0x%" PRIx64" size=0x%" PRIx64" ret=%d" "\n" , |
3168 | qemu_get_thread_id(), |
3169 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3170 | , va, size, ret); |
3171 | } |
3172 | } |
3173 | |
3174 | static inline void trace_vfio_prereg_register(uint64_t va, uint64_t size, int ret) |
3175 | { |
3176 | if (true) { |
3177 | _nocheck__trace_vfio_prereg_register(va, size, ret); |
3178 | } |
3179 | } |
3180 | |
3181 | #define TRACE_VFIO_PREREG_UNREGISTER_BACKEND_DSTATE() ( \ |
3182 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_PREREG_UNREGISTER) || \ |
3183 | false) |
3184 | |
3185 | static inline void _nocheck__trace_vfio_prereg_unregister(uint64_t va, uint64_t size, int ret) |
3186 | { |
3187 | if (trace_event_get_state(TRACE_VFIO_PREREG_UNREGISTER) && qemu_loglevel_mask(LOG_TRACE)) { |
3188 | struct timeval _now; |
3189 | gettimeofday(&_now, NULL); |
3190 | qemu_log("%d@%zu.%06zu:vfio_prereg_unregister " "va=0x%" PRIx64" size=0x%" PRIx64" ret=%d" "\n" , |
3191 | qemu_get_thread_id(), |
3192 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3193 | , va, size, ret); |
3194 | } |
3195 | } |
3196 | |
3197 | static inline void trace_vfio_prereg_unregister(uint64_t va, uint64_t size, int ret) |
3198 | { |
3199 | if (true) { |
3200 | _nocheck__trace_vfio_prereg_unregister(va, size, ret); |
3201 | } |
3202 | } |
3203 | |
3204 | #define TRACE_VFIO_SPAPR_CREATE_WINDOW_BACKEND_DSTATE() ( \ |
3205 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_SPAPR_CREATE_WINDOW) || \ |
3206 | false) |
3207 | |
3208 | static inline void _nocheck__trace_vfio_spapr_create_window(int ps, unsigned int levels, uint64_t ws, uint64_t off) |
3209 | { |
3210 | if (trace_event_get_state(TRACE_VFIO_SPAPR_CREATE_WINDOW) && qemu_loglevel_mask(LOG_TRACE)) { |
3211 | struct timeval _now; |
3212 | gettimeofday(&_now, NULL); |
3213 | qemu_log("%d@%zu.%06zu:vfio_spapr_create_window " "pageshift=0x%x levels=%u winsize=0x%" PRIx64" offset=0x%" PRIx64 "\n" , |
3214 | qemu_get_thread_id(), |
3215 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3216 | , ps, levels, ws, off); |
3217 | } |
3218 | } |
3219 | |
3220 | static inline void trace_vfio_spapr_create_window(int ps, unsigned int levels, uint64_t ws, uint64_t off) |
3221 | { |
3222 | if (true) { |
3223 | _nocheck__trace_vfio_spapr_create_window(ps, levels, ws, off); |
3224 | } |
3225 | } |
3226 | |
3227 | #define TRACE_VFIO_SPAPR_REMOVE_WINDOW_BACKEND_DSTATE() ( \ |
3228 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_SPAPR_REMOVE_WINDOW) || \ |
3229 | false) |
3230 | |
3231 | static inline void _nocheck__trace_vfio_spapr_remove_window(uint64_t off) |
3232 | { |
3233 | if (trace_event_get_state(TRACE_VFIO_SPAPR_REMOVE_WINDOW) && qemu_loglevel_mask(LOG_TRACE)) { |
3234 | struct timeval _now; |
3235 | gettimeofday(&_now, NULL); |
3236 | qemu_log("%d@%zu.%06zu:vfio_spapr_remove_window " "offset=0x%" PRIx64 "\n" , |
3237 | qemu_get_thread_id(), |
3238 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3239 | , off); |
3240 | } |
3241 | } |
3242 | |
3243 | static inline void trace_vfio_spapr_remove_window(uint64_t off) |
3244 | { |
3245 | if (true) { |
3246 | _nocheck__trace_vfio_spapr_remove_window(off); |
3247 | } |
3248 | } |
3249 | |
3250 | #define TRACE_VFIO_DISPLAY_EDID_AVAILABLE_BACKEND_DSTATE() ( \ |
3251 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_DISPLAY_EDID_AVAILABLE) || \ |
3252 | false) |
3253 | |
3254 | static inline void _nocheck__trace_vfio_display_edid_available(void) |
3255 | { |
3256 | if (trace_event_get_state(TRACE_VFIO_DISPLAY_EDID_AVAILABLE) && qemu_loglevel_mask(LOG_TRACE)) { |
3257 | struct timeval _now; |
3258 | gettimeofday(&_now, NULL); |
3259 | qemu_log("%d@%zu.%06zu:vfio_display_edid_available " "" "\n" , |
3260 | qemu_get_thread_id(), |
3261 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3262 | ); |
3263 | } |
3264 | } |
3265 | |
3266 | static inline void trace_vfio_display_edid_available(void) |
3267 | { |
3268 | if (true) { |
3269 | _nocheck__trace_vfio_display_edid_available(); |
3270 | } |
3271 | } |
3272 | |
3273 | #define TRACE_VFIO_DISPLAY_EDID_LINK_UP_BACKEND_DSTATE() ( \ |
3274 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_DISPLAY_EDID_LINK_UP) || \ |
3275 | false) |
3276 | |
3277 | static inline void _nocheck__trace_vfio_display_edid_link_up(void) |
3278 | { |
3279 | if (trace_event_get_state(TRACE_VFIO_DISPLAY_EDID_LINK_UP) && qemu_loglevel_mask(LOG_TRACE)) { |
3280 | struct timeval _now; |
3281 | gettimeofday(&_now, NULL); |
3282 | qemu_log("%d@%zu.%06zu:vfio_display_edid_link_up " "" "\n" , |
3283 | qemu_get_thread_id(), |
3284 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3285 | ); |
3286 | } |
3287 | } |
3288 | |
3289 | static inline void trace_vfio_display_edid_link_up(void) |
3290 | { |
3291 | if (true) { |
3292 | _nocheck__trace_vfio_display_edid_link_up(); |
3293 | } |
3294 | } |
3295 | |
3296 | #define TRACE_VFIO_DISPLAY_EDID_LINK_DOWN_BACKEND_DSTATE() ( \ |
3297 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_DISPLAY_EDID_LINK_DOWN) || \ |
3298 | false) |
3299 | |
3300 | static inline void _nocheck__trace_vfio_display_edid_link_down(void) |
3301 | { |
3302 | if (trace_event_get_state(TRACE_VFIO_DISPLAY_EDID_LINK_DOWN) && qemu_loglevel_mask(LOG_TRACE)) { |
3303 | struct timeval _now; |
3304 | gettimeofday(&_now, NULL); |
3305 | qemu_log("%d@%zu.%06zu:vfio_display_edid_link_down " "" "\n" , |
3306 | qemu_get_thread_id(), |
3307 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3308 | ); |
3309 | } |
3310 | } |
3311 | |
3312 | static inline void trace_vfio_display_edid_link_down(void) |
3313 | { |
3314 | if (true) { |
3315 | _nocheck__trace_vfio_display_edid_link_down(); |
3316 | } |
3317 | } |
3318 | |
3319 | #define TRACE_VFIO_DISPLAY_EDID_UPDATE_BACKEND_DSTATE() ( \ |
3320 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_DISPLAY_EDID_UPDATE) || \ |
3321 | false) |
3322 | |
3323 | static inline void _nocheck__trace_vfio_display_edid_update(uint32_t prefx, uint32_t prefy) |
3324 | { |
3325 | if (trace_event_get_state(TRACE_VFIO_DISPLAY_EDID_UPDATE) && qemu_loglevel_mask(LOG_TRACE)) { |
3326 | struct timeval _now; |
3327 | gettimeofday(&_now, NULL); |
3328 | qemu_log("%d@%zu.%06zu:vfio_display_edid_update " "%ux%u" "\n" , |
3329 | qemu_get_thread_id(), |
3330 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3331 | , prefx, prefy); |
3332 | } |
3333 | } |
3334 | |
3335 | static inline void trace_vfio_display_edid_update(uint32_t prefx, uint32_t prefy) |
3336 | { |
3337 | if (true) { |
3338 | _nocheck__trace_vfio_display_edid_update(prefx, prefy); |
3339 | } |
3340 | } |
3341 | |
3342 | #define TRACE_VFIO_DISPLAY_EDID_WRITE_ERROR_BACKEND_DSTATE() ( \ |
3343 | trace_event_get_state_dynamic_by_id(TRACE_VFIO_DISPLAY_EDID_WRITE_ERROR) || \ |
3344 | false) |
3345 | |
3346 | static inline void _nocheck__trace_vfio_display_edid_write_error(void) |
3347 | { |
3348 | if (trace_event_get_state(TRACE_VFIO_DISPLAY_EDID_WRITE_ERROR) && qemu_loglevel_mask(LOG_TRACE)) { |
3349 | struct timeval _now; |
3350 | gettimeofday(&_now, NULL); |
3351 | qemu_log("%d@%zu.%06zu:vfio_display_edid_write_error " "" "\n" , |
3352 | qemu_get_thread_id(), |
3353 | (size_t)_now.tv_sec, (size_t)_now.tv_usec |
3354 | ); |
3355 | } |
3356 | } |
3357 | |
3358 | static inline void trace_vfio_display_edid_write_error(void) |
3359 | { |
3360 | if (true) { |
3361 | _nocheck__trace_vfio_display_edid_write_error(); |
3362 | } |
3363 | } |
3364 | #endif /* TRACE_HW_VFIO_GENERATED_TRACERS_H */ |
3365 | |