1 | /* HPPA cores and system support chips. */ |
2 | |
3 | #ifndef HW_HPPA_HPPA_HARDWARE_H |
4 | #define HW_HPPA_HPPA_HARDWARE_H |
5 | |
6 | #define FIRMWARE_START 0xf0000000 |
7 | #define FIRMWARE_END 0xf0800000 |
8 | |
9 | #define DEVICE_HPA_LEN 0x00100000 |
10 | |
11 | #define GSC_HPA 0xffc00000 |
12 | #define DINO_HPA 0xfff80000 |
13 | #define DINO_UART_HPA 0xfff83000 |
14 | #define DINO_UART_BASE 0xfff83800 |
15 | #define DINO_SCSI_HPA 0xfff8c000 |
16 | #define LASI_HPA 0xffd00000 |
17 | #define LASI_UART_HPA 0xffd05000 |
18 | #define LASI_SCSI_HPA 0xffd06000 |
19 | #define LASI_LAN_HPA 0xffd07000 |
20 | #define LASI_LPT_HPA 0xffd02000 |
21 | #define LASI_AUDIO_HPA 0xffd04000 |
22 | #define LASI_PS2KBD_HPA 0xffd08000 |
23 | #define LASI_PS2MOU_HPA 0xffd08100 |
24 | #define LASI_GFX_HPA 0xf8000000 |
25 | #define CPU_HPA 0xfffb0000 |
26 | #define MEMORY_HPA 0xfffbf000 |
27 | |
28 | #define PCI_HPA DINO_HPA /* PCI bus */ |
29 | #define IDE_HPA 0xf9000000 /* Boot disc controller */ |
30 | |
31 | /* offsets to DINO HPA: */ |
32 | #define DINO_PCI_ADDR 0x064 |
33 | #define DINO_CONFIG_DATA 0x068 |
34 | #define DINO_IO_DATA 0x06c |
35 | |
36 | #define PORT_PCI_CMD (PCI_HPA + DINO_PCI_ADDR) |
37 | #define PORT_PCI_DATA (PCI_HPA + DINO_CONFIG_DATA) |
38 | |
39 | #define PORT_SERIAL1 (DINO_UART_HPA + 0x800) |
40 | #define PORT_SERIAL2 (LASI_UART_HPA + 0x800) |
41 | |
42 | #define HPPA_MAX_CPUS 8 /* max. number of SMP CPUs */ |
43 | #define CPU_CLOCK_MHZ 250 /* emulate a 250 MHz CPU */ |
44 | |
45 | #endif |
46 | |