1 | /* |
2 | * National Semiconductor LM8322/8323 GPIO keyboard & PWM chips. |
3 | * |
4 | * Copyright (C) 2008 Nokia Corporation |
5 | * Written by Andrzej Zaborowski <andrew@openedhand.com> |
6 | * |
7 | * This program is free software; you can redistribute it and/or |
8 | * modify it under the terms of the GNU General Public License as |
9 | * published by the Free Software Foundation; either version 2 or |
10 | * (at your option) version 3 of the License. |
11 | * |
12 | * This program is distributed in the hope that it will be useful, |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
15 | * GNU General Public License for more details. |
16 | * |
17 | * You should have received a copy of the GNU General Public License along |
18 | * with this program; if not, see <http://www.gnu.org/licenses/>. |
19 | */ |
20 | |
21 | #include "qemu/osdep.h" |
22 | #include "hw/i2c/i2c.h" |
23 | #include "hw/irq.h" |
24 | #include "migration/vmstate.h" |
25 | #include "qemu/module.h" |
26 | #include "qemu/timer.h" |
27 | #include "sysemu/reset.h" |
28 | #include "ui/console.h" |
29 | |
30 | #define TYPE_LM8323 "lm8323" |
31 | #define LM8323(obj) OBJECT_CHECK(LM823KbdState, (obj), TYPE_LM8323) |
32 | |
33 | typedef struct { |
34 | I2CSlave parent_obj; |
35 | |
36 | uint8_t i2c_dir; |
37 | uint8_t i2c_cycle; |
38 | uint8_t reg; |
39 | |
40 | qemu_irq nirq; |
41 | uint16_t model; |
42 | |
43 | struct { |
44 | qemu_irq out[2]; |
45 | int in[2][2]; |
46 | } mux; |
47 | |
48 | uint8_t config; |
49 | uint8_t status; |
50 | uint8_t acttime; |
51 | uint8_t error; |
52 | uint8_t clock; |
53 | |
54 | struct { |
55 | uint16_t pull; |
56 | uint16_t mask; |
57 | uint16_t dir; |
58 | uint16_t level; |
59 | qemu_irq out[16]; |
60 | } gpio; |
61 | |
62 | struct { |
63 | uint8_t dbnctime; |
64 | uint8_t size; |
65 | uint8_t start; |
66 | uint8_t len; |
67 | uint8_t fifo[16]; |
68 | } kbd; |
69 | |
70 | struct { |
71 | uint16_t file[256]; |
72 | uint8_t faddr; |
73 | uint8_t addr[3]; |
74 | QEMUTimer *tm[3]; |
75 | } pwm; |
76 | } LM823KbdState; |
77 | |
78 | #define INT_KEYPAD (1 << 0) |
79 | #define INT_ERROR (1 << 3) |
80 | #define INT_NOINIT (1 << 4) |
81 | #define INT_PWMEND(n) (1 << (5 + n)) |
82 | |
83 | #define ERR_BADPAR (1 << 0) |
84 | #define ERR_CMDUNK (1 << 1) |
85 | #define ERR_KEYOVR (1 << 2) |
86 | #define ERR_FIFOOVR (1 << 6) |
87 | |
88 | static void lm_kbd_irq_update(LM823KbdState *s) |
89 | { |
90 | qemu_set_irq(s->nirq, !s->status); |
91 | } |
92 | |
93 | static void lm_kbd_gpio_update(LM823KbdState *s) |
94 | { |
95 | } |
96 | |
97 | static void lm_kbd_reset(LM823KbdState *s) |
98 | { |
99 | s->config = 0x80; |
100 | s->status = INT_NOINIT; |
101 | s->acttime = 125; |
102 | s->kbd.dbnctime = 3; |
103 | s->kbd.size = 0x33; |
104 | s->clock = 0x08; |
105 | |
106 | lm_kbd_irq_update(s); |
107 | lm_kbd_gpio_update(s); |
108 | } |
109 | |
110 | static void lm_kbd_error(LM823KbdState *s, int err) |
111 | { |
112 | s->error |= err; |
113 | s->status |= INT_ERROR; |
114 | lm_kbd_irq_update(s); |
115 | } |
116 | |
117 | static void lm_kbd_pwm_tick(LM823KbdState *s, int line) |
118 | { |
119 | } |
120 | |
121 | static void lm_kbd_pwm_start(LM823KbdState *s, int line) |
122 | { |
123 | lm_kbd_pwm_tick(s, line); |
124 | } |
125 | |
126 | static void lm_kbd_pwm0_tick(void *opaque) |
127 | { |
128 | lm_kbd_pwm_tick(opaque, 0); |
129 | } |
130 | static void lm_kbd_pwm1_tick(void *opaque) |
131 | { |
132 | lm_kbd_pwm_tick(opaque, 1); |
133 | } |
134 | static void lm_kbd_pwm2_tick(void *opaque) |
135 | { |
136 | lm_kbd_pwm_tick(opaque, 2); |
137 | } |
138 | |
139 | enum { |
140 | LM832x_CMD_READ_ID = 0x80, /* Read chip ID. */ |
141 | LM832x_CMD_WRITE_CFG = 0x81, /* Set configuration item. */ |
142 | LM832x_CMD_READ_INT = 0x82, /* Get interrupt status. */ |
143 | LM832x_CMD_RESET = 0x83, /* Reset, same as external one */ |
144 | LM823x_CMD_WRITE_PULL_DOWN = 0x84, /* Select GPIO pull-up/down. */ |
145 | LM832x_CMD_WRITE_PORT_SEL = 0x85, /* Select GPIO in/out. */ |
146 | LM832x_CMD_WRITE_PORT_STATE = 0x86, /* Set GPIO pull-up/down. */ |
147 | LM832x_CMD_READ_PORT_SEL = 0x87, /* Get GPIO in/out. */ |
148 | LM832x_CMD_READ_PORT_STATE = 0x88, /* Get GPIO pull-up/down. */ |
149 | LM832x_CMD_READ_FIFO = 0x89, /* Read byte from FIFO. */ |
150 | LM832x_CMD_RPT_READ_FIFO = 0x8a, /* Read FIFO (no increment). */ |
151 | LM832x_CMD_SET_ACTIVE = 0x8b, /* Set active time. */ |
152 | LM832x_CMD_READ_ERROR = 0x8c, /* Get error status. */ |
153 | LM832x_CMD_READ_ROTATOR = 0x8e, /* Read rotator status. */ |
154 | LM832x_CMD_SET_DEBOUNCE = 0x8f, /* Set debouncing time. */ |
155 | LM832x_CMD_SET_KEY_SIZE = 0x90, /* Set keypad size. */ |
156 | LM832x_CMD_READ_KEY_SIZE = 0x91, /* Get keypad size. */ |
157 | LM832x_CMD_READ_CFG = 0x92, /* Get configuration item. */ |
158 | LM832x_CMD_WRITE_CLOCK = 0x93, /* Set clock config. */ |
159 | LM832x_CMD_READ_CLOCK = 0x94, /* Get clock config. */ |
160 | LM832x_CMD_PWM_WRITE = 0x95, /* Write PWM script. */ |
161 | LM832x_CMD_PWM_START = 0x96, /* Start PWM engine. */ |
162 | LM832x_CMD_PWM_STOP = 0x97, /* Stop PWM engine. */ |
163 | LM832x_GENERAL_ERROR = 0xff, /* There was one error. |
164 | Previously was represented by -1 |
165 | This is not a command */ |
166 | }; |
167 | |
168 | #define LM832x_MAX_KPX 8 |
169 | #define LM832x_MAX_KPY 12 |
170 | |
171 | static uint8_t lm_kbd_read(LM823KbdState *s, int reg, int byte) |
172 | { |
173 | int ret; |
174 | |
175 | switch (reg) { |
176 | case LM832x_CMD_READ_ID: |
177 | ret = 0x0400; |
178 | break; |
179 | |
180 | case LM832x_CMD_READ_INT: |
181 | ret = s->status; |
182 | if (!(s->status & INT_NOINIT)) { |
183 | s->status = 0; |
184 | lm_kbd_irq_update(s); |
185 | } |
186 | break; |
187 | |
188 | case LM832x_CMD_READ_PORT_SEL: |
189 | ret = s->gpio.dir; |
190 | break; |
191 | case LM832x_CMD_READ_PORT_STATE: |
192 | ret = s->gpio.mask; |
193 | break; |
194 | |
195 | case LM832x_CMD_READ_FIFO: |
196 | if (s->kbd.len <= 1) |
197 | return 0x00; |
198 | |
199 | /* Example response from the two commands after a INT_KEYPAD |
200 | * interrupt caused by the key 0x3c being pressed: |
201 | * RPT_READ_FIFO: 55 bc 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01 |
202 | * READ_FIFO: bc 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01 |
203 | * RPT_READ_FIFO: bc 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01 |
204 | * |
205 | * 55 is the code of the key release event serviced in the previous |
206 | * interrupt handling. |
207 | * |
208 | * TODO: find out whether the FIFO is advanced a single character |
209 | * before reading every byte or the whole size of the FIFO at the |
210 | * last LM832x_CMD_READ_FIFO. This affects LM832x_CMD_RPT_READ_FIFO |
211 | * output in cases where there are more than one event in the FIFO. |
212 | * Assume 0xbc and 0x3c events are in the FIFO: |
213 | * RPT_READ_FIFO: 55 bc 3c 00 4e ff 0a 50 08 00 29 d9 08 01 c9 |
214 | * READ_FIFO: bc 3c 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 |
215 | * Does RPT_READ_FIFO now return 0xbc and 0x3c or only 0x3c? |
216 | */ |
217 | s->kbd.start ++; |
218 | s->kbd.start &= sizeof(s->kbd.fifo) - 1; |
219 | s->kbd.len --; |
220 | |
221 | return s->kbd.fifo[s->kbd.start]; |
222 | case LM832x_CMD_RPT_READ_FIFO: |
223 | if (byte >= s->kbd.len) |
224 | return 0x00; |
225 | |
226 | return s->kbd.fifo[(s->kbd.start + byte) & (sizeof(s->kbd.fifo) - 1)]; |
227 | |
228 | case LM832x_CMD_READ_ERROR: |
229 | return s->error; |
230 | |
231 | case LM832x_CMD_READ_ROTATOR: |
232 | return 0; |
233 | |
234 | case LM832x_CMD_READ_KEY_SIZE: |
235 | return s->kbd.size; |
236 | |
237 | case LM832x_CMD_READ_CFG: |
238 | return s->config & 0xf; |
239 | |
240 | case LM832x_CMD_READ_CLOCK: |
241 | return (s->clock & 0xfc) | 2; |
242 | |
243 | default: |
244 | lm_kbd_error(s, ERR_CMDUNK); |
245 | fprintf(stderr, "%s: unknown command %02x\n" , __func__, reg); |
246 | return 0x00; |
247 | } |
248 | |
249 | return ret >> (byte << 3); |
250 | } |
251 | |
252 | static void lm_kbd_write(LM823KbdState *s, int reg, int byte, uint8_t value) |
253 | { |
254 | switch (reg) { |
255 | case LM832x_CMD_WRITE_CFG: |
256 | s->config = value; |
257 | /* This must be done whenever s->mux.in is updated (never). */ |
258 | if ((s->config >> 1) & 1) /* MUX1EN */ |
259 | qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 0) & 1]); |
260 | if ((s->config >> 3) & 1) /* MUX2EN */ |
261 | qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 2) & 1]); |
262 | /* TODO: check that this is issued only following the chip reset |
263 | * and not in the middle of operation and that it is followed by |
264 | * the GPIO ports re-resablishing through WRITE_PORT_SEL and |
265 | * WRITE_PORT_STATE (using a timer perhaps) and otherwise output |
266 | * warnings. */ |
267 | s->status = 0; |
268 | lm_kbd_irq_update(s); |
269 | s->kbd.len = 0; |
270 | s->kbd.start = 0; |
271 | s->reg = LM832x_GENERAL_ERROR; |
272 | break; |
273 | |
274 | case LM832x_CMD_RESET: |
275 | if (value == 0xaa) |
276 | lm_kbd_reset(s); |
277 | else |
278 | lm_kbd_error(s, ERR_BADPAR); |
279 | s->reg = LM832x_GENERAL_ERROR; |
280 | break; |
281 | |
282 | case LM823x_CMD_WRITE_PULL_DOWN: |
283 | if (!byte) |
284 | s->gpio.pull = value; |
285 | else { |
286 | s->gpio.pull |= value << 8; |
287 | lm_kbd_gpio_update(s); |
288 | s->reg = LM832x_GENERAL_ERROR; |
289 | } |
290 | break; |
291 | case LM832x_CMD_WRITE_PORT_SEL: |
292 | if (!byte) |
293 | s->gpio.dir = value; |
294 | else { |
295 | s->gpio.dir |= value << 8; |
296 | lm_kbd_gpio_update(s); |
297 | s->reg = LM832x_GENERAL_ERROR; |
298 | } |
299 | break; |
300 | case LM832x_CMD_WRITE_PORT_STATE: |
301 | if (!byte) |
302 | s->gpio.mask = value; |
303 | else { |
304 | s->gpio.mask |= value << 8; |
305 | lm_kbd_gpio_update(s); |
306 | s->reg = LM832x_GENERAL_ERROR; |
307 | } |
308 | break; |
309 | |
310 | case LM832x_CMD_SET_ACTIVE: |
311 | s->acttime = value; |
312 | s->reg = LM832x_GENERAL_ERROR; |
313 | break; |
314 | |
315 | case LM832x_CMD_SET_DEBOUNCE: |
316 | s->kbd.dbnctime = value; |
317 | s->reg = LM832x_GENERAL_ERROR; |
318 | if (!value) |
319 | lm_kbd_error(s, ERR_BADPAR); |
320 | break; |
321 | |
322 | case LM832x_CMD_SET_KEY_SIZE: |
323 | s->kbd.size = value; |
324 | s->reg = LM832x_GENERAL_ERROR; |
325 | if ( |
326 | (value & 0xf) < 3 || (value & 0xf) > LM832x_MAX_KPY || |
327 | (value >> 4) < 3 || (value >> 4) > LM832x_MAX_KPX) |
328 | lm_kbd_error(s, ERR_BADPAR); |
329 | break; |
330 | |
331 | case LM832x_CMD_WRITE_CLOCK: |
332 | s->clock = value; |
333 | s->reg = LM832x_GENERAL_ERROR; |
334 | if ((value & 3) && (value & 3) != 3) { |
335 | lm_kbd_error(s, ERR_BADPAR); |
336 | fprintf(stderr, "%s: invalid clock setting in RCPWM\n" , |
337 | __func__); |
338 | } |
339 | /* TODO: Validate that the command is only issued once */ |
340 | break; |
341 | |
342 | case LM832x_CMD_PWM_WRITE: |
343 | if (byte == 0) { |
344 | if (!(value & 3) || (value >> 2) > 59) { |
345 | lm_kbd_error(s, ERR_BADPAR); |
346 | s->reg = LM832x_GENERAL_ERROR; |
347 | break; |
348 | } |
349 | |
350 | s->pwm.faddr = value; |
351 | s->pwm.file[s->pwm.faddr] = 0; |
352 | } else if (byte == 1) { |
353 | s->pwm.file[s->pwm.faddr] |= value << 8; |
354 | } else if (byte == 2) { |
355 | s->pwm.file[s->pwm.faddr] |= value << 0; |
356 | s->reg = LM832x_GENERAL_ERROR; |
357 | } |
358 | break; |
359 | case LM832x_CMD_PWM_START: |
360 | s->reg = LM832x_GENERAL_ERROR; |
361 | if (!(value & 3) || (value >> 2) > 59) { |
362 | lm_kbd_error(s, ERR_BADPAR); |
363 | break; |
364 | } |
365 | |
366 | s->pwm.addr[(value & 3) - 1] = value >> 2; |
367 | lm_kbd_pwm_start(s, (value & 3) - 1); |
368 | break; |
369 | case LM832x_CMD_PWM_STOP: |
370 | s->reg = LM832x_GENERAL_ERROR; |
371 | if (!(value & 3)) { |
372 | lm_kbd_error(s, ERR_BADPAR); |
373 | break; |
374 | } |
375 | |
376 | timer_del(s->pwm.tm[(value & 3) - 1]); |
377 | break; |
378 | |
379 | case LM832x_GENERAL_ERROR: |
380 | lm_kbd_error(s, ERR_BADPAR); |
381 | break; |
382 | default: |
383 | lm_kbd_error(s, ERR_CMDUNK); |
384 | fprintf(stderr, "%s: unknown command %02x\n" , __func__, reg); |
385 | break; |
386 | } |
387 | } |
388 | |
389 | static int lm_i2c_event(I2CSlave *i2c, enum i2c_event event) |
390 | { |
391 | LM823KbdState *s = LM8323(i2c); |
392 | |
393 | switch (event) { |
394 | case I2C_START_RECV: |
395 | case I2C_START_SEND: |
396 | s->i2c_cycle = 0; |
397 | s->i2c_dir = (event == I2C_START_SEND); |
398 | break; |
399 | |
400 | default: |
401 | break; |
402 | } |
403 | |
404 | return 0; |
405 | } |
406 | |
407 | static uint8_t lm_i2c_rx(I2CSlave *i2c) |
408 | { |
409 | LM823KbdState *s = LM8323(i2c); |
410 | |
411 | return lm_kbd_read(s, s->reg, s->i2c_cycle ++); |
412 | } |
413 | |
414 | static int lm_i2c_tx(I2CSlave *i2c, uint8_t data) |
415 | { |
416 | LM823KbdState *s = LM8323(i2c); |
417 | |
418 | if (!s->i2c_cycle) |
419 | s->reg = data; |
420 | else |
421 | lm_kbd_write(s, s->reg, s->i2c_cycle - 1, data); |
422 | s->i2c_cycle ++; |
423 | |
424 | return 0; |
425 | } |
426 | |
427 | static int lm_kbd_post_load(void *opaque, int version_id) |
428 | { |
429 | LM823KbdState *s = opaque; |
430 | |
431 | lm_kbd_irq_update(s); |
432 | lm_kbd_gpio_update(s); |
433 | |
434 | return 0; |
435 | } |
436 | |
437 | static const VMStateDescription vmstate_lm_kbd = { |
438 | .name = "LM8323" , |
439 | .version_id = 0, |
440 | .minimum_version_id = 0, |
441 | .post_load = lm_kbd_post_load, |
442 | .fields = (VMStateField[]) { |
443 | VMSTATE_I2C_SLAVE(parent_obj, LM823KbdState), |
444 | VMSTATE_UINT8(i2c_dir, LM823KbdState), |
445 | VMSTATE_UINT8(i2c_cycle, LM823KbdState), |
446 | VMSTATE_UINT8(reg, LM823KbdState), |
447 | VMSTATE_UINT8(config, LM823KbdState), |
448 | VMSTATE_UINT8(status, LM823KbdState), |
449 | VMSTATE_UINT8(acttime, LM823KbdState), |
450 | VMSTATE_UINT8(error, LM823KbdState), |
451 | VMSTATE_UINT8(clock, LM823KbdState), |
452 | VMSTATE_UINT16(gpio.pull, LM823KbdState), |
453 | VMSTATE_UINT16(gpio.mask, LM823KbdState), |
454 | VMSTATE_UINT16(gpio.dir, LM823KbdState), |
455 | VMSTATE_UINT16(gpio.level, LM823KbdState), |
456 | VMSTATE_UINT8(kbd.dbnctime, LM823KbdState), |
457 | VMSTATE_UINT8(kbd.size, LM823KbdState), |
458 | VMSTATE_UINT8(kbd.start, LM823KbdState), |
459 | VMSTATE_UINT8(kbd.len, LM823KbdState), |
460 | VMSTATE_BUFFER(kbd.fifo, LM823KbdState), |
461 | VMSTATE_UINT16_ARRAY(pwm.file, LM823KbdState, 256), |
462 | VMSTATE_UINT8(pwm.faddr, LM823KbdState), |
463 | VMSTATE_BUFFER(pwm.addr, LM823KbdState), |
464 | VMSTATE_TIMER_PTR_ARRAY(pwm.tm, LM823KbdState, 3), |
465 | VMSTATE_END_OF_LIST() |
466 | } |
467 | }; |
468 | |
469 | |
470 | static void lm8323_realize(DeviceState *dev, Error **errp) |
471 | { |
472 | LM823KbdState *s = LM8323(dev); |
473 | |
474 | s->model = 0x8323; |
475 | s->pwm.tm[0] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm0_tick, s); |
476 | s->pwm.tm[1] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm1_tick, s); |
477 | s->pwm.tm[2] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm2_tick, s); |
478 | qdev_init_gpio_out(dev, &s->nirq, 1); |
479 | |
480 | lm_kbd_reset(s); |
481 | |
482 | qemu_register_reset((void *) lm_kbd_reset, s); |
483 | } |
484 | |
485 | void lm832x_key_event(DeviceState *dev, int key, int state) |
486 | { |
487 | LM823KbdState *s = LM8323(dev); |
488 | |
489 | if ((s->status & INT_ERROR) && (s->error & ERR_FIFOOVR)) |
490 | return; |
491 | |
492 | if (s->kbd.len >= sizeof(s->kbd.fifo)) { |
493 | lm_kbd_error(s, ERR_FIFOOVR); |
494 | return; |
495 | } |
496 | |
497 | s->kbd.fifo[(s->kbd.start + s->kbd.len ++) & (sizeof(s->kbd.fifo) - 1)] = |
498 | key | (state << 7); |
499 | |
500 | /* We never set ERR_KEYOVR because we support multiple keys fine. */ |
501 | s->status |= INT_KEYPAD; |
502 | lm_kbd_irq_update(s); |
503 | } |
504 | |
505 | static void lm8323_class_init(ObjectClass *klass, void *data) |
506 | { |
507 | DeviceClass *dc = DEVICE_CLASS(klass); |
508 | I2CSlaveClass *k = I2C_SLAVE_CLASS(klass); |
509 | |
510 | dc->realize = lm8323_realize; |
511 | k->event = lm_i2c_event; |
512 | k->recv = lm_i2c_rx; |
513 | k->send = lm_i2c_tx; |
514 | dc->vmsd = &vmstate_lm_kbd; |
515 | } |
516 | |
517 | static const TypeInfo lm8323_info = { |
518 | .name = TYPE_LM8323, |
519 | .parent = TYPE_I2C_SLAVE, |
520 | .instance_size = sizeof(LM823KbdState), |
521 | .class_init = lm8323_class_init, |
522 | }; |
523 | |
524 | static void lm832x_register_types(void) |
525 | { |
526 | type_register_static(&lm8323_info); |
527 | } |
528 | |
529 | type_init(lm832x_register_types) |
530 | |