1 | #ifndef QEMU_HW_MILKYMIST_HW_H |
2 | #define QEMU_HW_MILKYMIST_HW_H |
3 | |
4 | #include "hw/qdev-core.h" |
5 | #include "net/net.h" |
6 | |
7 | static inline DeviceState *milkymist_uart_create(hwaddr base, |
8 | qemu_irq irq, |
9 | Chardev *chr) |
10 | { |
11 | DeviceState *dev; |
12 | |
13 | dev = qdev_create(NULL, "milkymist-uart" ); |
14 | qdev_prop_set_chr(dev, "chardev" , chr); |
15 | qdev_init_nofail(dev); |
16 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); |
17 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); |
18 | |
19 | return dev; |
20 | } |
21 | |
22 | static inline DeviceState *milkymist_hpdmc_create(hwaddr base) |
23 | { |
24 | DeviceState *dev; |
25 | |
26 | dev = qdev_create(NULL, "milkymist-hpdmc" ); |
27 | qdev_init_nofail(dev); |
28 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); |
29 | |
30 | return dev; |
31 | } |
32 | |
33 | static inline DeviceState *milkymist_memcard_create(hwaddr base) |
34 | { |
35 | DeviceState *dev; |
36 | |
37 | dev = qdev_create(NULL, "milkymist-memcard" ); |
38 | qdev_init_nofail(dev); |
39 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); |
40 | |
41 | return dev; |
42 | } |
43 | |
44 | static inline DeviceState *milkymist_vgafb_create(hwaddr base, |
45 | uint32_t fb_offset, uint32_t fb_mask) |
46 | { |
47 | DeviceState *dev; |
48 | |
49 | dev = qdev_create(NULL, "milkymist-vgafb" ); |
50 | qdev_prop_set_uint32(dev, "fb_offset" , fb_offset); |
51 | qdev_prop_set_uint32(dev, "fb_mask" , fb_mask); |
52 | qdev_init_nofail(dev); |
53 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); |
54 | |
55 | return dev; |
56 | } |
57 | |
58 | static inline DeviceState *milkymist_sysctl_create(hwaddr base, |
59 | qemu_irq gpio_irq, qemu_irq timer0_irq, qemu_irq timer1_irq, |
60 | uint32_t freq_hz, uint32_t system_id, uint32_t capabilities, |
61 | uint32_t gpio_strappings) |
62 | { |
63 | DeviceState *dev; |
64 | |
65 | dev = qdev_create(NULL, "milkymist-sysctl" ); |
66 | qdev_prop_set_uint32(dev, "frequency" , freq_hz); |
67 | qdev_prop_set_uint32(dev, "systemid" , system_id); |
68 | qdev_prop_set_uint32(dev, "capabilities" , capabilities); |
69 | qdev_prop_set_uint32(dev, "gpio_strappings" , gpio_strappings); |
70 | qdev_init_nofail(dev); |
71 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); |
72 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, gpio_irq); |
73 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, timer0_irq); |
74 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, timer1_irq); |
75 | |
76 | return dev; |
77 | } |
78 | |
79 | static inline DeviceState *milkymist_pfpu_create(hwaddr base, |
80 | qemu_irq irq) |
81 | { |
82 | DeviceState *dev; |
83 | |
84 | dev = qdev_create(NULL, "milkymist-pfpu" ); |
85 | qdev_init_nofail(dev); |
86 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); |
87 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); |
88 | return dev; |
89 | } |
90 | |
91 | static inline DeviceState *milkymist_ac97_create(hwaddr base, |
92 | qemu_irq crrequest_irq, qemu_irq crreply_irq, qemu_irq dmar_irq, |
93 | qemu_irq dmaw_irq) |
94 | { |
95 | DeviceState *dev; |
96 | |
97 | dev = qdev_create(NULL, "milkymist-ac97" ); |
98 | qdev_init_nofail(dev); |
99 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); |
100 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, crrequest_irq); |
101 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, crreply_irq); |
102 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, dmar_irq); |
103 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 3, dmaw_irq); |
104 | |
105 | return dev; |
106 | } |
107 | |
108 | static inline DeviceState *milkymist_minimac2_create(hwaddr base, |
109 | hwaddr buffers_base, qemu_irq rx_irq, qemu_irq tx_irq) |
110 | { |
111 | DeviceState *dev; |
112 | |
113 | qemu_check_nic_model(&nd_table[0], "minimac2" ); |
114 | dev = qdev_create(NULL, "milkymist-minimac2" ); |
115 | qdev_set_nic_properties(dev, &nd_table[0]); |
116 | qdev_init_nofail(dev); |
117 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); |
118 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, buffers_base); |
119 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, rx_irq); |
120 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, tx_irq); |
121 | |
122 | return dev; |
123 | } |
124 | |
125 | static inline DeviceState *milkymist_softusb_create(hwaddr base, |
126 | qemu_irq irq, uint32_t pmem_base, uint32_t pmem_size, |
127 | uint32_t dmem_base, uint32_t dmem_size) |
128 | { |
129 | DeviceState *dev; |
130 | |
131 | dev = qdev_create(NULL, "milkymist-softusb" ); |
132 | qdev_prop_set_uint32(dev, "pmem_size" , pmem_size); |
133 | qdev_prop_set_uint32(dev, "dmem_size" , dmem_size); |
134 | qdev_init_nofail(dev); |
135 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); |
136 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, pmem_base); |
137 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, dmem_base); |
138 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); |
139 | |
140 | return dev; |
141 | } |
142 | |
143 | #endif /* QEMU_HW_MILKYMIST_HW_H */ |
144 | |