1/*
2 * QEMU VMWARE VMXNET3 paravirtual NIC
3 *
4 * Copyright (c) 2012 Ravello Systems LTD (http://ravellosystems.com)
5 *
6 * Developed by Daynix Computing LTD (http://www.daynix.com)
7 *
8 * Authors:
9 * Dmitry Fleytman <dmitry@daynix.com>
10 * Tamir Shomer <tamirs@daynix.com>
11 * Yan Vugenfirer <yan@daynix.com>
12 *
13 * This work is licensed under the terms of the GNU GPL, version 2.
14 * See the COPYING file in the top-level directory.
15 */
16
17#ifndef HW_NET_VMXNET3_DEFS_H
18#define HW_NET_VMXNET3_DEFS_H
19
20#include "net/net.h"
21#include "hw/net/vmxnet3.h"
22
23#define TYPE_VMXNET3 "vmxnet3"
24#define VMXNET3(obj) OBJECT_CHECK(VMXNET3State, (obj), TYPE_VMXNET3)
25
26/* Device state and helper functions */
27#define VMXNET3_RX_RINGS_PER_QUEUE (2)
28
29/* Cyclic ring abstraction */
30typedef struct {
31 hwaddr pa;
32 uint32_t size;
33 uint32_t cell_size;
34 uint32_t next;
35 uint8_t gen;
36} Vmxnet3Ring;
37
38typedef struct {
39 Vmxnet3Ring tx_ring;
40 Vmxnet3Ring comp_ring;
41
42 uint8_t intr_idx;
43 hwaddr tx_stats_pa;
44 struct UPT1_TxStats txq_stats;
45} Vmxnet3TxqDescr;
46
47typedef struct {
48 Vmxnet3Ring rx_ring[VMXNET3_RX_RINGS_PER_QUEUE];
49 Vmxnet3Ring comp_ring;
50 uint8_t intr_idx;
51 hwaddr rx_stats_pa;
52 struct UPT1_RxStats rxq_stats;
53} Vmxnet3RxqDescr;
54
55typedef struct {
56 bool is_masked;
57 bool is_pending;
58 bool is_asserted;
59} Vmxnet3IntState;
60
61typedef struct {
62 PCIDevice parent_obj;
63 NICState *nic;
64 NICConf conf;
65 MemoryRegion bar0;
66 MemoryRegion bar1;
67 MemoryRegion msix_bar;
68
69 Vmxnet3RxqDescr rxq_descr[VMXNET3_DEVICE_MAX_RX_QUEUES];
70 Vmxnet3TxqDescr txq_descr[VMXNET3_DEVICE_MAX_TX_QUEUES];
71
72 /* Whether MSI-X support was installed successfully */
73 bool msix_used;
74 hwaddr drv_shmem;
75 hwaddr temp_shared_guest_driver_memory;
76
77 uint8_t txq_num;
78
79 /* This boolean tells whether RX packet being indicated has to */
80 /* be split into head and body chunks from different RX rings */
81 bool rx_packets_compound;
82
83 bool rx_vlan_stripping;
84 bool lro_supported;
85
86 uint8_t rxq_num;
87
88 /* Network MTU */
89 uint32_t mtu;
90
91 /* Maximum number of fragments for indicated TX packets */
92 uint32_t max_tx_frags;
93
94 /* Maximum number of fragments for indicated RX packets */
95 uint16_t max_rx_frags;
96
97 /* Index for events interrupt */
98 uint8_t event_int_idx;
99
100 /* Whether automatic interrupts masking enabled */
101 bool auto_int_masking;
102
103 bool peer_has_vhdr;
104
105 /* TX packets to QEMU interface */
106 struct NetTxPkt *tx_pkt;
107 uint32_t offload_mode;
108 uint32_t cso_or_gso_size;
109 uint16_t tci;
110 bool needs_vlan;
111
112 struct NetRxPkt *rx_pkt;
113
114 bool tx_sop;
115 bool skip_current_tx_pkt;
116
117 uint32_t device_active;
118 uint32_t last_command;
119
120 uint32_t link_status_and_speed;
121
122 Vmxnet3IntState interrupt_states[VMXNET3_MAX_INTRS];
123
124 uint32_t temp_mac; /* To store the low part first */
125
126 MACAddr perm_mac;
127 uint32_t vlan_table[VMXNET3_VFT_SIZE];
128 uint32_t rx_mode;
129 MACAddr *mcast_list;
130 uint32_t mcast_list_len;
131 uint32_t mcast_list_buff_size; /* needed for live migration. */
132
133 /* Compatibility flags for migration */
134 uint32_t compat_flags;
135} VMXNET3State;
136
137#endif
138