1 | /* |
2 | * Generic intermediate code generation. |
3 | * |
4 | * Copyright (C) 2016-2017 LluĂs Vilanova <vilanova@ac.upc.edu> |
5 | * |
6 | * This work is licensed under the terms of the GNU GPL, version 2 or later. |
7 | * See the COPYING file in the top-level directory. |
8 | */ |
9 | |
10 | #ifndef EXEC__TRANSLATOR_H |
11 | #define EXEC__TRANSLATOR_H |
12 | |
13 | /* |
14 | * Include this header from a target-specific file, and add a |
15 | * |
16 | * DisasContextBase base; |
17 | * |
18 | * member in your target-specific DisasContext. |
19 | */ |
20 | |
21 | |
22 | #include "exec/exec-all.h" |
23 | #include "tcg/tcg.h" |
24 | |
25 | |
26 | /** |
27 | * DisasJumpType: |
28 | * @DISAS_NEXT: Next instruction in program order. |
29 | * @DISAS_TOO_MANY: Too many instructions translated. |
30 | * @DISAS_NORETURN: Following code is dead. |
31 | * @DISAS_TARGET_*: Start of target-specific conditions. |
32 | * |
33 | * What instruction to disassemble next. |
34 | */ |
35 | typedef enum DisasJumpType { |
36 | DISAS_NEXT, |
37 | DISAS_TOO_MANY, |
38 | DISAS_NORETURN, |
39 | DISAS_TARGET_0, |
40 | DISAS_TARGET_1, |
41 | DISAS_TARGET_2, |
42 | DISAS_TARGET_3, |
43 | DISAS_TARGET_4, |
44 | DISAS_TARGET_5, |
45 | DISAS_TARGET_6, |
46 | DISAS_TARGET_7, |
47 | DISAS_TARGET_8, |
48 | DISAS_TARGET_9, |
49 | DISAS_TARGET_10, |
50 | DISAS_TARGET_11, |
51 | } DisasJumpType; |
52 | |
53 | /** |
54 | * DisasContextBase: |
55 | * @tb: Translation block for this disassembly. |
56 | * @pc_first: Address of first guest instruction in this TB. |
57 | * @pc_next: Address of next guest instruction in this TB (current during |
58 | * disassembly). |
59 | * @is_jmp: What instruction to disassemble next. |
60 | * @num_insns: Number of translated instructions (including current). |
61 | * @max_insns: Maximum number of instructions to be translated in this TB. |
62 | * @singlestep_enabled: "Hardware" single stepping enabled. |
63 | * |
64 | * Architecture-agnostic disassembly context. |
65 | */ |
66 | typedef struct DisasContextBase { |
67 | TranslationBlock *tb; |
68 | target_ulong pc_first; |
69 | target_ulong pc_next; |
70 | DisasJumpType is_jmp; |
71 | int num_insns; |
72 | int max_insns; |
73 | bool singlestep_enabled; |
74 | } DisasContextBase; |
75 | |
76 | /** |
77 | * TranslatorOps: |
78 | * @init_disas_context: |
79 | * Initialize the target-specific portions of DisasContext struct. |
80 | * The generic DisasContextBase has already been initialized. |
81 | * |
82 | * @tb_start: |
83 | * Emit any code required before the start of the main loop, |
84 | * after the generic gen_tb_start(). |
85 | * |
86 | * @insn_start: |
87 | * Emit the tcg_gen_insn_start opcode. |
88 | * |
89 | * @breakpoint_check: |
90 | * When called, the breakpoint has already been checked to match the PC, |
91 | * but the target may decide the breakpoint missed the address |
92 | * (e.g., due to conditions encoded in their flags). Return true to |
93 | * indicate that the breakpoint did hit, in which case no more breakpoints |
94 | * are checked. If the breakpoint did hit, emit any code required to |
95 | * signal the exception, and set db->is_jmp as necessary to terminate |
96 | * the main loop. |
97 | * |
98 | * @translate_insn: |
99 | * Disassemble one instruction and set db->pc_next for the start |
100 | * of the following instruction. Set db->is_jmp as necessary to |
101 | * terminate the main loop. |
102 | * |
103 | * @tb_stop: |
104 | * Emit any opcodes required to exit the TB, based on db->is_jmp. |
105 | * |
106 | * @disas_log: |
107 | * Print instruction disassembly to log. |
108 | */ |
109 | typedef struct TranslatorOps { |
110 | void (*init_disas_context)(DisasContextBase *db, CPUState *cpu); |
111 | void (*tb_start)(DisasContextBase *db, CPUState *cpu); |
112 | void (*insn_start)(DisasContextBase *db, CPUState *cpu); |
113 | bool (*breakpoint_check)(DisasContextBase *db, CPUState *cpu, |
114 | const CPUBreakpoint *bp); |
115 | void (*translate_insn)(DisasContextBase *db, CPUState *cpu); |
116 | void (*tb_stop)(DisasContextBase *db, CPUState *cpu); |
117 | void (*disas_log)(const DisasContextBase *db, CPUState *cpu); |
118 | } TranslatorOps; |
119 | |
120 | /** |
121 | * translator_loop: |
122 | * @ops: Target-specific operations. |
123 | * @db: Disassembly context. |
124 | * @cpu: Target vCPU. |
125 | * @tb: Translation block. |
126 | * @max_insns: Maximum number of insns to translate. |
127 | * |
128 | * Generic translator loop. |
129 | * |
130 | * Translation will stop in the following cases (in order): |
131 | * - When is_jmp set by #TranslatorOps::breakpoint_check. |
132 | * - set to DISAS_TOO_MANY exits after translating one more insn |
133 | * - set to any other value than DISAS_NEXT exits immediately. |
134 | * - When is_jmp set by #TranslatorOps::translate_insn. |
135 | * - set to any value other than DISAS_NEXT exits immediately. |
136 | * - When the TCG operation buffer is full. |
137 | * - When single-stepping is enabled (system-wide or on the current vCPU). |
138 | * - When too many instructions have been translated. |
139 | */ |
140 | void translator_loop(const TranslatorOps *ops, DisasContextBase *db, |
141 | CPUState *cpu, TranslationBlock *tb, int max_insns); |
142 | |
143 | void translator_loop_temp_check(DisasContextBase *db); |
144 | |
145 | #endif /* EXEC__TRANSLATOR_H */ |
146 | |