1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ |
2 | /* |
3 | * VFIO API definition |
4 | * |
5 | * Copyright (C) 2012 Red Hat, Inc. All rights reserved. |
6 | * Author: Alex Williamson <alex.williamson@redhat.com> |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as |
10 | * published by the Free Software Foundation. |
11 | */ |
12 | #ifndef VFIO_H |
13 | #define VFIO_H |
14 | |
15 | #include <linux/types.h> |
16 | #include <linux/ioctl.h> |
17 | |
18 | #define VFIO_API_VERSION 0 |
19 | |
20 | |
21 | /* Kernel & User level defines for VFIO IOCTLs. */ |
22 | |
23 | /* Extensions */ |
24 | |
25 | #define VFIO_TYPE1_IOMMU 1 |
26 | #define VFIO_SPAPR_TCE_IOMMU 2 |
27 | #define VFIO_TYPE1v2_IOMMU 3 |
28 | /* |
29 | * IOMMU enforces DMA cache coherence (ex. PCIe NoSnoop stripping). This |
30 | * capability is subject to change as groups are added or removed. |
31 | */ |
32 | #define VFIO_DMA_CC_IOMMU 4 |
33 | |
34 | /* Check if EEH is supported */ |
35 | #define VFIO_EEH 5 |
36 | |
37 | /* Two-stage IOMMU */ |
38 | #define VFIO_TYPE1_NESTING_IOMMU 6 /* Implies v2 */ |
39 | |
40 | #define VFIO_SPAPR_TCE_v2_IOMMU 7 |
41 | |
42 | /* |
43 | * The No-IOMMU IOMMU offers no translation or isolation for devices and |
44 | * supports no ioctls outside of VFIO_CHECK_EXTENSION. Use of VFIO's No-IOMMU |
45 | * code will taint the host kernel and should be used with extreme caution. |
46 | */ |
47 | #define VFIO_NOIOMMU_IOMMU 8 |
48 | |
49 | /* |
50 | * The IOCTL interface is designed for extensibility by embedding the |
51 | * structure length (argsz) and flags into structures passed between |
52 | * kernel and userspace. We therefore use the _IO() macro for these |
53 | * defines to avoid implicitly embedding a size into the ioctl request. |
54 | * As structure fields are added, argsz will increase to match and flag |
55 | * bits will be defined to indicate additional fields with valid data. |
56 | * It's *always* the caller's responsibility to indicate the size of |
57 | * the structure passed by setting argsz appropriately. |
58 | */ |
59 | |
60 | #define VFIO_TYPE (';') |
61 | #define VFIO_BASE 100 |
62 | |
63 | /* |
64 | * For extension of INFO ioctls, VFIO makes use of a capability chain |
65 | * designed after PCI/e capabilities. A flag bit indicates whether |
66 | * this capability chain is supported and a field defined in the fixed |
67 | * structure defines the offset of the first capability in the chain. |
68 | * This field is only valid when the corresponding bit in the flags |
69 | * bitmap is set. This offset field is relative to the start of the |
70 | * INFO buffer, as is the next field within each capability header. |
71 | * The id within the header is a shared address space per INFO ioctl, |
72 | * while the version field is specific to the capability id. The |
73 | * contents following the header are specific to the capability id. |
74 | */ |
75 | struct { |
76 | __u16 ; /* Identifies capability */ |
77 | __u16 ; /* Version specific to the capability ID */ |
78 | __u32 ; /* Offset of next capability */ |
79 | }; |
80 | |
81 | /* |
82 | * Callers of INFO ioctls passing insufficiently sized buffers will see |
83 | * the capability chain flag bit set, a zero value for the first capability |
84 | * offset (if available within the provided argsz), and argsz will be |
85 | * updated to report the necessary buffer size. For compatibility, the |
86 | * INFO ioctl will not report error in this case, but the capability chain |
87 | * will not be available. |
88 | */ |
89 | |
90 | /* -------- IOCTLs for VFIO file descriptor (/dev/vfio/vfio) -------- */ |
91 | |
92 | /** |
93 | * VFIO_GET_API_VERSION - _IO(VFIO_TYPE, VFIO_BASE + 0) |
94 | * |
95 | * Report the version of the VFIO API. This allows us to bump the entire |
96 | * API version should we later need to add or change features in incompatible |
97 | * ways. |
98 | * Return: VFIO_API_VERSION |
99 | * Availability: Always |
100 | */ |
101 | #define VFIO_GET_API_VERSION _IO(VFIO_TYPE, VFIO_BASE + 0) |
102 | |
103 | /** |
104 | * VFIO_CHECK_EXTENSION - _IOW(VFIO_TYPE, VFIO_BASE + 1, __u32) |
105 | * |
106 | * Check whether an extension is supported. |
107 | * Return: 0 if not supported, 1 (or some other positive integer) if supported. |
108 | * Availability: Always |
109 | */ |
110 | #define VFIO_CHECK_EXTENSION _IO(VFIO_TYPE, VFIO_BASE + 1) |
111 | |
112 | /** |
113 | * VFIO_SET_IOMMU - _IOW(VFIO_TYPE, VFIO_BASE + 2, __s32) |
114 | * |
115 | * Set the iommu to the given type. The type must be supported by an |
116 | * iommu driver as verified by calling CHECK_EXTENSION using the same |
117 | * type. A group must be set to this file descriptor before this |
118 | * ioctl is available. The IOMMU interfaces enabled by this call are |
119 | * specific to the value set. |
120 | * Return: 0 on success, -errno on failure |
121 | * Availability: When VFIO group attached |
122 | */ |
123 | #define VFIO_SET_IOMMU _IO(VFIO_TYPE, VFIO_BASE + 2) |
124 | |
125 | /* -------- IOCTLs for GROUP file descriptors (/dev/vfio/$GROUP) -------- */ |
126 | |
127 | /** |
128 | * VFIO_GROUP_GET_STATUS - _IOR(VFIO_TYPE, VFIO_BASE + 3, |
129 | * struct vfio_group_status) |
130 | * |
131 | * Retrieve information about the group. Fills in provided |
132 | * struct vfio_group_info. Caller sets argsz. |
133 | * Return: 0 on succes, -errno on failure. |
134 | * Availability: Always |
135 | */ |
136 | struct vfio_group_status { |
137 | __u32 argsz; |
138 | __u32 flags; |
139 | #define VFIO_GROUP_FLAGS_VIABLE (1 << 0) |
140 | #define VFIO_GROUP_FLAGS_CONTAINER_SET (1 << 1) |
141 | }; |
142 | #define VFIO_GROUP_GET_STATUS _IO(VFIO_TYPE, VFIO_BASE + 3) |
143 | |
144 | /** |
145 | * VFIO_GROUP_SET_CONTAINER - _IOW(VFIO_TYPE, VFIO_BASE + 4, __s32) |
146 | * |
147 | * Set the container for the VFIO group to the open VFIO file |
148 | * descriptor provided. Groups may only belong to a single |
149 | * container. Containers may, at their discretion, support multiple |
150 | * groups. Only when a container is set are all of the interfaces |
151 | * of the VFIO file descriptor and the VFIO group file descriptor |
152 | * available to the user. |
153 | * Return: 0 on success, -errno on failure. |
154 | * Availability: Always |
155 | */ |
156 | #define VFIO_GROUP_SET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 4) |
157 | |
158 | /** |
159 | * VFIO_GROUP_UNSET_CONTAINER - _IO(VFIO_TYPE, VFIO_BASE + 5) |
160 | * |
161 | * Remove the group from the attached container. This is the |
162 | * opposite of the SET_CONTAINER call and returns the group to |
163 | * an initial state. All device file descriptors must be released |
164 | * prior to calling this interface. When removing the last group |
165 | * from a container, the IOMMU will be disabled and all state lost, |
166 | * effectively also returning the VFIO file descriptor to an initial |
167 | * state. |
168 | * Return: 0 on success, -errno on failure. |
169 | * Availability: When attached to container |
170 | */ |
171 | #define VFIO_GROUP_UNSET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 5) |
172 | |
173 | /** |
174 | * VFIO_GROUP_GET_DEVICE_FD - _IOW(VFIO_TYPE, VFIO_BASE + 6, char) |
175 | * |
176 | * Return a new file descriptor for the device object described by |
177 | * the provided string. The string should match a device listed in |
178 | * the devices subdirectory of the IOMMU group sysfs entry. The |
179 | * group containing the device must already be added to this context. |
180 | * Return: new file descriptor on success, -errno on failure. |
181 | * Availability: When attached to container |
182 | */ |
183 | #define VFIO_GROUP_GET_DEVICE_FD _IO(VFIO_TYPE, VFIO_BASE + 6) |
184 | |
185 | /* --------------- IOCTLs for DEVICE file descriptors --------------- */ |
186 | |
187 | /** |
188 | * VFIO_DEVICE_GET_INFO - _IOR(VFIO_TYPE, VFIO_BASE + 7, |
189 | * struct vfio_device_info) |
190 | * |
191 | * Retrieve information about the device. Fills in provided |
192 | * struct vfio_device_info. Caller sets argsz. |
193 | * Return: 0 on success, -errno on failure. |
194 | */ |
195 | struct vfio_device_info { |
196 | __u32 argsz; |
197 | __u32 flags; |
198 | #define VFIO_DEVICE_FLAGS_RESET (1 << 0) /* Device supports reset */ |
199 | #define VFIO_DEVICE_FLAGS_PCI (1 << 1) /* vfio-pci device */ |
200 | #define VFIO_DEVICE_FLAGS_PLATFORM (1 << 2) /* vfio-platform device */ |
201 | #define VFIO_DEVICE_FLAGS_AMBA (1 << 3) /* vfio-amba device */ |
202 | #define VFIO_DEVICE_FLAGS_CCW (1 << 4) /* vfio-ccw device */ |
203 | #define VFIO_DEVICE_FLAGS_AP (1 << 5) /* vfio-ap device */ |
204 | __u32 num_regions; /* Max region index + 1 */ |
205 | __u32 num_irqs; /* Max IRQ index + 1 */ |
206 | }; |
207 | #define VFIO_DEVICE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 7) |
208 | |
209 | /* |
210 | * Vendor driver using Mediated device framework should provide device_api |
211 | * attribute in supported type attribute groups. Device API string should be one |
212 | * of the following corresponding to device flags in vfio_device_info structure. |
213 | */ |
214 | |
215 | #define VFIO_DEVICE_API_PCI_STRING "vfio-pci" |
216 | #define VFIO_DEVICE_API_PLATFORM_STRING "vfio-platform" |
217 | #define VFIO_DEVICE_API_AMBA_STRING "vfio-amba" |
218 | #define VFIO_DEVICE_API_CCW_STRING "vfio-ccw" |
219 | #define VFIO_DEVICE_API_AP_STRING "vfio-ap" |
220 | |
221 | /** |
222 | * VFIO_DEVICE_GET_REGION_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 8, |
223 | * struct vfio_region_info) |
224 | * |
225 | * Retrieve information about a device region. Caller provides |
226 | * struct vfio_region_info with index value set. Caller sets argsz. |
227 | * Implementation of region mapping is bus driver specific. This is |
228 | * intended to describe MMIO, I/O port, as well as bus specific |
229 | * regions (ex. PCI config space). Zero sized regions may be used |
230 | * to describe unimplemented regions (ex. unimplemented PCI BARs). |
231 | * Return: 0 on success, -errno on failure. |
232 | */ |
233 | struct vfio_region_info { |
234 | __u32 argsz; |
235 | __u32 flags; |
236 | #define VFIO_REGION_INFO_FLAG_READ (1 << 0) /* Region supports read */ |
237 | #define VFIO_REGION_INFO_FLAG_WRITE (1 << 1) /* Region supports write */ |
238 | #define VFIO_REGION_INFO_FLAG_MMAP (1 << 2) /* Region supports mmap */ |
239 | #define VFIO_REGION_INFO_FLAG_CAPS (1 << 3) /* Info supports caps */ |
240 | __u32 index; /* Region index */ |
241 | __u32 cap_offset; /* Offset within info struct of first cap */ |
242 | __u64 size; /* Region size (bytes) */ |
243 | __u64 offset; /* Region offset from start of device fd */ |
244 | }; |
245 | #define VFIO_DEVICE_GET_REGION_INFO _IO(VFIO_TYPE, VFIO_BASE + 8) |
246 | |
247 | /* |
248 | * The sparse mmap capability allows finer granularity of specifying areas |
249 | * within a region with mmap support. When specified, the user should only |
250 | * mmap the offset ranges specified by the areas array. mmaps outside of the |
251 | * areas specified may fail (such as the range covering a PCI MSI-X table) or |
252 | * may result in improper device behavior. |
253 | * |
254 | * The structures below define version 1 of this capability. |
255 | */ |
256 | #define VFIO_REGION_INFO_CAP_SPARSE_MMAP 1 |
257 | |
258 | struct vfio_region_sparse_mmap_area { |
259 | __u64 offset; /* Offset of mmap'able area within region */ |
260 | __u64 size; /* Size of mmap'able area */ |
261 | }; |
262 | |
263 | struct vfio_region_info_cap_sparse_mmap { |
264 | struct vfio_info_cap_header ; |
265 | __u32 nr_areas; |
266 | __u32 reserved; |
267 | struct vfio_region_sparse_mmap_area areas[]; |
268 | }; |
269 | |
270 | /* |
271 | * The device specific type capability allows regions unique to a specific |
272 | * device or class of devices to be exposed. This helps solve the problem for |
273 | * vfio bus drivers of defining which region indexes correspond to which region |
274 | * on the device, without needing to resort to static indexes, as done by |
275 | * vfio-pci. For instance, if we were to go back in time, we might remove |
276 | * VFIO_PCI_VGA_REGION_INDEX and let vfio-pci simply define that all indexes |
277 | * greater than or equal to VFIO_PCI_NUM_REGIONS are device specific and we'd |
278 | * make a "VGA" device specific type to describe the VGA access space. This |
279 | * means that non-VGA devices wouldn't need to waste this index, and thus the |
280 | * address space associated with it due to implementation of device file |
281 | * descriptor offsets in vfio-pci. |
282 | * |
283 | * The current implementation is now part of the user ABI, so we can't use this |
284 | * for VGA, but there are other upcoming use cases, such as opregions for Intel |
285 | * IGD devices and framebuffers for vGPU devices. We missed VGA, but we'll |
286 | * use this for future additions. |
287 | * |
288 | * The structure below defines version 1 of this capability. |
289 | */ |
290 | #define VFIO_REGION_INFO_CAP_TYPE 2 |
291 | |
292 | struct vfio_region_info_cap_type { |
293 | struct vfio_info_cap_header ; |
294 | __u32 type; /* global per bus driver */ |
295 | __u32 subtype; /* type specific */ |
296 | }; |
297 | |
298 | #define VFIO_REGION_TYPE_PCI_VENDOR_TYPE (1 << 31) |
299 | #define VFIO_REGION_TYPE_PCI_VENDOR_MASK (0xffff) |
300 | |
301 | /* 8086 Vendor sub-types */ |
302 | #define VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION (1) |
303 | #define VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG (2) |
304 | #define VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG (3) |
305 | |
306 | #define VFIO_REGION_TYPE_GFX (1) |
307 | #define VFIO_REGION_SUBTYPE_GFX_EDID (1) |
308 | |
309 | /** |
310 | * struct vfio_region_gfx_edid - EDID region layout. |
311 | * |
312 | * Set display link state and EDID blob. |
313 | * |
314 | * The EDID blob has monitor information such as brand, name, serial |
315 | * number, physical size, supported video modes and more. |
316 | * |
317 | * This special region allows userspace (typically qemu) set a virtual |
318 | * EDID for the virtual monitor, which allows a flexible display |
319 | * configuration. |
320 | * |
321 | * For the edid blob spec look here: |
322 | * https://en.wikipedia.org/wiki/Extended_Display_Identification_Data |
323 | * |
324 | * On linux systems you can find the EDID blob in sysfs: |
325 | * /sys/class/drm/${card}/${connector}/edid |
326 | * |
327 | * You can use the edid-decode ulility (comes with xorg-x11-utils) to |
328 | * decode the EDID blob. |
329 | * |
330 | * @edid_offset: location of the edid blob, relative to the |
331 | * start of the region (readonly). |
332 | * @edid_max_size: max size of the edid blob (readonly). |
333 | * @edid_size: actual edid size (read/write). |
334 | * @link_state: display link state (read/write). |
335 | * VFIO_DEVICE_GFX_LINK_STATE_UP: Monitor is turned on. |
336 | * VFIO_DEVICE_GFX_LINK_STATE_DOWN: Monitor is turned off. |
337 | * @max_xres: max display width (0 == no limitation, readonly). |
338 | * @max_yres: max display height (0 == no limitation, readonly). |
339 | * |
340 | * EDID update protocol: |
341 | * (1) set link-state to down. |
342 | * (2) update edid blob and size. |
343 | * (3) set link-state to up. |
344 | */ |
345 | struct vfio_region_gfx_edid { |
346 | __u32 edid_offset; |
347 | __u32 edid_max_size; |
348 | __u32 edid_size; |
349 | __u32 max_xres; |
350 | __u32 max_yres; |
351 | __u32 link_state; |
352 | #define VFIO_DEVICE_GFX_LINK_STATE_UP 1 |
353 | #define VFIO_DEVICE_GFX_LINK_STATE_DOWN 2 |
354 | }; |
355 | |
356 | #define VFIO_REGION_TYPE_CCW (2) |
357 | /* ccw sub-types */ |
358 | #define VFIO_REGION_SUBTYPE_CCW_ASYNC_CMD (1) |
359 | |
360 | /* |
361 | * 10de vendor sub-type |
362 | * |
363 | * NVIDIA GPU NVlink2 RAM is coherent RAM mapped onto the host address space. |
364 | */ |
365 | #define VFIO_REGION_SUBTYPE_NVIDIA_NVLINK2_RAM (1) |
366 | |
367 | /* |
368 | * 1014 vendor sub-type |
369 | * |
370 | * IBM NPU NVlink2 ATSD (Address Translation Shootdown) register of NPU |
371 | * to do TLB invalidation on a GPU. |
372 | */ |
373 | #define VFIO_REGION_SUBTYPE_IBM_NVLINK2_ATSD (1) |
374 | |
375 | /* |
376 | * The MSIX mappable capability informs that MSIX data of a BAR can be mmapped |
377 | * which allows direct access to non-MSIX registers which happened to be within |
378 | * the same system page. |
379 | * |
380 | * Even though the userspace gets direct access to the MSIX data, the existing |
381 | * VFIO_DEVICE_SET_IRQS interface must still be used for MSIX configuration. |
382 | */ |
383 | #define VFIO_REGION_INFO_CAP_MSIX_MAPPABLE 3 |
384 | |
385 | /* |
386 | * Capability with compressed real address (aka SSA - small system address) |
387 | * where GPU RAM is mapped on a system bus. Used by a GPU for DMA routing |
388 | * and by the userspace to associate a NVLink bridge with a GPU. |
389 | */ |
390 | #define VFIO_REGION_INFO_CAP_NVLINK2_SSATGT 4 |
391 | |
392 | struct vfio_region_info_cap_nvlink2_ssatgt { |
393 | struct vfio_info_cap_header ; |
394 | __u64 tgt; |
395 | }; |
396 | |
397 | /* |
398 | * Capability with an NVLink link speed. The value is read by |
399 | * the NVlink2 bridge driver from the bridge's "ibm,nvlink-speed" |
400 | * property in the device tree. The value is fixed in the hardware |
401 | * and failing to provide the correct value results in the link |
402 | * not working with no indication from the driver why. |
403 | */ |
404 | #define VFIO_REGION_INFO_CAP_NVLINK2_LNKSPD 5 |
405 | |
406 | struct vfio_region_info_cap_nvlink2_lnkspd { |
407 | struct vfio_info_cap_header ; |
408 | __u32 link_speed; |
409 | __u32 __pad; |
410 | }; |
411 | |
412 | /** |
413 | * VFIO_DEVICE_GET_IRQ_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 9, |
414 | * struct vfio_irq_info) |
415 | * |
416 | * Retrieve information about a device IRQ. Caller provides |
417 | * struct vfio_irq_info with index value set. Caller sets argsz. |
418 | * Implementation of IRQ mapping is bus driver specific. Indexes |
419 | * using multiple IRQs are primarily intended to support MSI-like |
420 | * interrupt blocks. Zero count irq blocks may be used to describe |
421 | * unimplemented interrupt types. |
422 | * |
423 | * The EVENTFD flag indicates the interrupt index supports eventfd based |
424 | * signaling. |
425 | * |
426 | * The MASKABLE flags indicates the index supports MASK and UNMASK |
427 | * actions described below. |
428 | * |
429 | * AUTOMASKED indicates that after signaling, the interrupt line is |
430 | * automatically masked by VFIO and the user needs to unmask the line |
431 | * to receive new interrupts. This is primarily intended to distinguish |
432 | * level triggered interrupts. |
433 | * |
434 | * The NORESIZE flag indicates that the interrupt lines within the index |
435 | * are setup as a set and new subindexes cannot be enabled without first |
436 | * disabling the entire index. This is used for interrupts like PCI MSI |
437 | * and MSI-X where the driver may only use a subset of the available |
438 | * indexes, but VFIO needs to enable a specific number of vectors |
439 | * upfront. In the case of MSI-X, where the user can enable MSI-X and |
440 | * then add and unmask vectors, it's up to userspace to make the decision |
441 | * whether to allocate the maximum supported number of vectors or tear |
442 | * down setup and incrementally increase the vectors as each is enabled. |
443 | */ |
444 | struct vfio_irq_info { |
445 | __u32 argsz; |
446 | __u32 flags; |
447 | #define VFIO_IRQ_INFO_EVENTFD (1 << 0) |
448 | #define VFIO_IRQ_INFO_MASKABLE (1 << 1) |
449 | #define VFIO_IRQ_INFO_AUTOMASKED (1 << 2) |
450 | #define VFIO_IRQ_INFO_NORESIZE (1 << 3) |
451 | __u32 index; /* IRQ index */ |
452 | __u32 count; /* Number of IRQs within this index */ |
453 | }; |
454 | #define VFIO_DEVICE_GET_IRQ_INFO _IO(VFIO_TYPE, VFIO_BASE + 9) |
455 | |
456 | /** |
457 | * VFIO_DEVICE_SET_IRQS - _IOW(VFIO_TYPE, VFIO_BASE + 10, struct vfio_irq_set) |
458 | * |
459 | * Set signaling, masking, and unmasking of interrupts. Caller provides |
460 | * struct vfio_irq_set with all fields set. 'start' and 'count' indicate |
461 | * the range of subindexes being specified. |
462 | * |
463 | * The DATA flags specify the type of data provided. If DATA_NONE, the |
464 | * operation performs the specified action immediately on the specified |
465 | * interrupt(s). For example, to unmask AUTOMASKED interrupt [0,0]: |
466 | * flags = (DATA_NONE|ACTION_UNMASK), index = 0, start = 0, count = 1. |
467 | * |
468 | * DATA_BOOL allows sparse support for the same on arrays of interrupts. |
469 | * For example, to mask interrupts [0,1] and [0,3] (but not [0,2]): |
470 | * flags = (DATA_BOOL|ACTION_MASK), index = 0, start = 1, count = 3, |
471 | * data = {1,0,1} |
472 | * |
473 | * DATA_EVENTFD binds the specified ACTION to the provided __s32 eventfd. |
474 | * A value of -1 can be used to either de-assign interrupts if already |
475 | * assigned or skip un-assigned interrupts. For example, to set an eventfd |
476 | * to be trigger for interrupts [0,0] and [0,2]: |
477 | * flags = (DATA_EVENTFD|ACTION_TRIGGER), index = 0, start = 0, count = 3, |
478 | * data = {fd1, -1, fd2} |
479 | * If index [0,1] is previously set, two count = 1 ioctls calls would be |
480 | * required to set [0,0] and [0,2] without changing [0,1]. |
481 | * |
482 | * Once a signaling mechanism is set, DATA_BOOL or DATA_NONE can be used |
483 | * with ACTION_TRIGGER to perform kernel level interrupt loopback testing |
484 | * from userspace (ie. simulate hardware triggering). |
485 | * |
486 | * Setting of an event triggering mechanism to userspace for ACTION_TRIGGER |
487 | * enables the interrupt index for the device. Individual subindex interrupts |
488 | * can be disabled using the -1 value for DATA_EVENTFD or the index can be |
489 | * disabled as a whole with: flags = (DATA_NONE|ACTION_TRIGGER), count = 0. |
490 | * |
491 | * Note that ACTION_[UN]MASK specify user->kernel signaling (irqfds) while |
492 | * ACTION_TRIGGER specifies kernel->user signaling. |
493 | */ |
494 | struct vfio_irq_set { |
495 | __u32 argsz; |
496 | __u32 flags; |
497 | #define VFIO_IRQ_SET_DATA_NONE (1 << 0) /* Data not present */ |
498 | #define VFIO_IRQ_SET_DATA_BOOL (1 << 1) /* Data is bool (u8) */ |
499 | #define VFIO_IRQ_SET_DATA_EVENTFD (1 << 2) /* Data is eventfd (s32) */ |
500 | #define VFIO_IRQ_SET_ACTION_MASK (1 << 3) /* Mask interrupt */ |
501 | #define VFIO_IRQ_SET_ACTION_UNMASK (1 << 4) /* Unmask interrupt */ |
502 | #define VFIO_IRQ_SET_ACTION_TRIGGER (1 << 5) /* Trigger interrupt */ |
503 | __u32 index; |
504 | __u32 start; |
505 | __u32 count; |
506 | __u8 data[]; |
507 | }; |
508 | #define VFIO_DEVICE_SET_IRQS _IO(VFIO_TYPE, VFIO_BASE + 10) |
509 | |
510 | #define VFIO_IRQ_SET_DATA_TYPE_MASK (VFIO_IRQ_SET_DATA_NONE | \ |
511 | VFIO_IRQ_SET_DATA_BOOL | \ |
512 | VFIO_IRQ_SET_DATA_EVENTFD) |
513 | #define VFIO_IRQ_SET_ACTION_TYPE_MASK (VFIO_IRQ_SET_ACTION_MASK | \ |
514 | VFIO_IRQ_SET_ACTION_UNMASK | \ |
515 | VFIO_IRQ_SET_ACTION_TRIGGER) |
516 | /** |
517 | * VFIO_DEVICE_RESET - _IO(VFIO_TYPE, VFIO_BASE + 11) |
518 | * |
519 | * Reset a device. |
520 | */ |
521 | #define VFIO_DEVICE_RESET _IO(VFIO_TYPE, VFIO_BASE + 11) |
522 | |
523 | /* |
524 | * The VFIO-PCI bus driver makes use of the following fixed region and |
525 | * IRQ index mapping. Unimplemented regions return a size of zero. |
526 | * Unimplemented IRQ types return a count of zero. |
527 | */ |
528 | |
529 | enum { |
530 | VFIO_PCI_BAR0_REGION_INDEX, |
531 | VFIO_PCI_BAR1_REGION_INDEX, |
532 | VFIO_PCI_BAR2_REGION_INDEX, |
533 | VFIO_PCI_BAR3_REGION_INDEX, |
534 | VFIO_PCI_BAR4_REGION_INDEX, |
535 | VFIO_PCI_BAR5_REGION_INDEX, |
536 | VFIO_PCI_ROM_REGION_INDEX, |
537 | VFIO_PCI_CONFIG_REGION_INDEX, |
538 | /* |
539 | * Expose VGA regions defined for PCI base class 03, subclass 00. |
540 | * This includes I/O port ranges 0x3b0 to 0x3bb and 0x3c0 to 0x3df |
541 | * as well as the MMIO range 0xa0000 to 0xbffff. Each implemented |
542 | * range is found at it's identity mapped offset from the region |
543 | * offset, for example 0x3b0 is region_info.offset + 0x3b0. Areas |
544 | * between described ranges are unimplemented. |
545 | */ |
546 | VFIO_PCI_VGA_REGION_INDEX, |
547 | VFIO_PCI_NUM_REGIONS = 9 /* Fixed user ABI, region indexes >=9 use */ |
548 | /* device specific cap to define content. */ |
549 | }; |
550 | |
551 | enum { |
552 | VFIO_PCI_INTX_IRQ_INDEX, |
553 | VFIO_PCI_MSI_IRQ_INDEX, |
554 | VFIO_PCI_MSIX_IRQ_INDEX, |
555 | VFIO_PCI_ERR_IRQ_INDEX, |
556 | VFIO_PCI_REQ_IRQ_INDEX, |
557 | VFIO_PCI_NUM_IRQS |
558 | }; |
559 | |
560 | /* |
561 | * The vfio-ccw bus driver makes use of the following fixed region and |
562 | * IRQ index mapping. Unimplemented regions return a size of zero. |
563 | * Unimplemented IRQ types return a count of zero. |
564 | */ |
565 | |
566 | enum { |
567 | VFIO_CCW_CONFIG_REGION_INDEX, |
568 | VFIO_CCW_NUM_REGIONS |
569 | }; |
570 | |
571 | enum { |
572 | VFIO_CCW_IO_IRQ_INDEX, |
573 | VFIO_CCW_NUM_IRQS |
574 | }; |
575 | |
576 | /** |
577 | * VFIO_DEVICE_GET_PCI_HOT_RESET_INFO - _IORW(VFIO_TYPE, VFIO_BASE + 12, |
578 | * struct vfio_pci_hot_reset_info) |
579 | * |
580 | * Return: 0 on success, -errno on failure: |
581 | * -enospc = insufficient buffer, -enodev = unsupported for device. |
582 | */ |
583 | struct vfio_pci_dependent_device { |
584 | __u32 group_id; |
585 | __u16 segment; |
586 | __u8 bus; |
587 | __u8 devfn; /* Use PCI_SLOT/PCI_FUNC */ |
588 | }; |
589 | |
590 | struct vfio_pci_hot_reset_info { |
591 | __u32 argsz; |
592 | __u32 flags; |
593 | __u32 count; |
594 | struct vfio_pci_dependent_device devices[]; |
595 | }; |
596 | |
597 | #define VFIO_DEVICE_GET_PCI_HOT_RESET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12) |
598 | |
599 | /** |
600 | * VFIO_DEVICE_PCI_HOT_RESET - _IOW(VFIO_TYPE, VFIO_BASE + 13, |
601 | * struct vfio_pci_hot_reset) |
602 | * |
603 | * Return: 0 on success, -errno on failure. |
604 | */ |
605 | struct vfio_pci_hot_reset { |
606 | __u32 argsz; |
607 | __u32 flags; |
608 | __u32 count; |
609 | __s32 group_fds[]; |
610 | }; |
611 | |
612 | #define VFIO_DEVICE_PCI_HOT_RESET _IO(VFIO_TYPE, VFIO_BASE + 13) |
613 | |
614 | /** |
615 | * VFIO_DEVICE_QUERY_GFX_PLANE - _IOW(VFIO_TYPE, VFIO_BASE + 14, |
616 | * struct vfio_device_query_gfx_plane) |
617 | * |
618 | * Set the drm_plane_type and flags, then retrieve the gfx plane info. |
619 | * |
620 | * flags supported: |
621 | * - VFIO_GFX_PLANE_TYPE_PROBE and VFIO_GFX_PLANE_TYPE_DMABUF are set |
622 | * to ask if the mdev supports dma-buf. 0 on support, -EINVAL on no |
623 | * support for dma-buf. |
624 | * - VFIO_GFX_PLANE_TYPE_PROBE and VFIO_GFX_PLANE_TYPE_REGION are set |
625 | * to ask if the mdev supports region. 0 on support, -EINVAL on no |
626 | * support for region. |
627 | * - VFIO_GFX_PLANE_TYPE_DMABUF or VFIO_GFX_PLANE_TYPE_REGION is set |
628 | * with each call to query the plane info. |
629 | * - Others are invalid and return -EINVAL. |
630 | * |
631 | * Note: |
632 | * 1. Plane could be disabled by guest. In that case, success will be |
633 | * returned with zero-initialized drm_format, size, width and height |
634 | * fields. |
635 | * 2. x_hot/y_hot is set to 0xFFFFFFFF if no hotspot information available |
636 | * |
637 | * Return: 0 on success, -errno on other failure. |
638 | */ |
639 | struct vfio_device_gfx_plane_info { |
640 | __u32 argsz; |
641 | __u32 flags; |
642 | #define VFIO_GFX_PLANE_TYPE_PROBE (1 << 0) |
643 | #define VFIO_GFX_PLANE_TYPE_DMABUF (1 << 1) |
644 | #define VFIO_GFX_PLANE_TYPE_REGION (1 << 2) |
645 | /* in */ |
646 | __u32 drm_plane_type; /* type of plane: DRM_PLANE_TYPE_* */ |
647 | /* out */ |
648 | __u32 drm_format; /* drm format of plane */ |
649 | __u64 drm_format_mod; /* tiled mode */ |
650 | __u32 width; /* width of plane */ |
651 | __u32 height; /* height of plane */ |
652 | __u32 stride; /* stride of plane */ |
653 | __u32 size; /* size of plane in bytes, align on page*/ |
654 | __u32 x_pos; /* horizontal position of cursor plane */ |
655 | __u32 y_pos; /* vertical position of cursor plane*/ |
656 | __u32 x_hot; /* horizontal position of cursor hotspot */ |
657 | __u32 y_hot; /* vertical position of cursor hotspot */ |
658 | union { |
659 | __u32 region_index; /* region index */ |
660 | __u32 dmabuf_id; /* dma-buf id */ |
661 | }; |
662 | }; |
663 | |
664 | #define VFIO_DEVICE_QUERY_GFX_PLANE _IO(VFIO_TYPE, VFIO_BASE + 14) |
665 | |
666 | /** |
667 | * VFIO_DEVICE_GET_GFX_DMABUF - _IOW(VFIO_TYPE, VFIO_BASE + 15, __u32) |
668 | * |
669 | * Return a new dma-buf file descriptor for an exposed guest framebuffer |
670 | * described by the provided dmabuf_id. The dmabuf_id is returned from VFIO_ |
671 | * DEVICE_QUERY_GFX_PLANE as a token of the exposed guest framebuffer. |
672 | */ |
673 | |
674 | #define VFIO_DEVICE_GET_GFX_DMABUF _IO(VFIO_TYPE, VFIO_BASE + 15) |
675 | |
676 | /** |
677 | * VFIO_DEVICE_IOEVENTFD - _IOW(VFIO_TYPE, VFIO_BASE + 16, |
678 | * struct vfio_device_ioeventfd) |
679 | * |
680 | * Perform a write to the device at the specified device fd offset, with |
681 | * the specified data and width when the provided eventfd is triggered. |
682 | * vfio bus drivers may not support this for all regions, for all widths, |
683 | * or at all. vfio-pci currently only enables support for BAR regions, |
684 | * excluding the MSI-X vector table. |
685 | * |
686 | * Return: 0 on success, -errno on failure. |
687 | */ |
688 | struct vfio_device_ioeventfd { |
689 | __u32 argsz; |
690 | __u32 flags; |
691 | #define VFIO_DEVICE_IOEVENTFD_8 (1 << 0) /* 1-byte write */ |
692 | #define VFIO_DEVICE_IOEVENTFD_16 (1 << 1) /* 2-byte write */ |
693 | #define VFIO_DEVICE_IOEVENTFD_32 (1 << 2) /* 4-byte write */ |
694 | #define VFIO_DEVICE_IOEVENTFD_64 (1 << 3) /* 8-byte write */ |
695 | #define VFIO_DEVICE_IOEVENTFD_SIZE_MASK (0xf) |
696 | __u64 offset; /* device fd offset of write */ |
697 | __u64 data; /* data to be written */ |
698 | __s32 fd; /* -1 for de-assignment */ |
699 | }; |
700 | |
701 | #define VFIO_DEVICE_IOEVENTFD _IO(VFIO_TYPE, VFIO_BASE + 16) |
702 | |
703 | /* -------- API for Type1 VFIO IOMMU -------- */ |
704 | |
705 | /** |
706 | * VFIO_IOMMU_GET_INFO - _IOR(VFIO_TYPE, VFIO_BASE + 12, struct vfio_iommu_info) |
707 | * |
708 | * Retrieve information about the IOMMU object. Fills in provided |
709 | * struct vfio_iommu_info. Caller sets argsz. |
710 | * |
711 | * XXX Should we do these by CHECK_EXTENSION too? |
712 | */ |
713 | struct vfio_iommu_type1_info { |
714 | __u32 argsz; |
715 | __u32 flags; |
716 | #define VFIO_IOMMU_INFO_PGSIZES (1 << 0) /* supported page sizes info */ |
717 | __u64 iova_pgsizes; /* Bitmap of supported page sizes */ |
718 | }; |
719 | |
720 | #define VFIO_IOMMU_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12) |
721 | |
722 | /** |
723 | * VFIO_IOMMU_MAP_DMA - _IOW(VFIO_TYPE, VFIO_BASE + 13, struct vfio_dma_map) |
724 | * |
725 | * Map process virtual addresses to IO virtual addresses using the |
726 | * provided struct vfio_dma_map. Caller sets argsz. READ &/ WRITE required. |
727 | */ |
728 | struct vfio_iommu_type1_dma_map { |
729 | __u32 argsz; |
730 | __u32 flags; |
731 | #define VFIO_DMA_MAP_FLAG_READ (1 << 0) /* readable from device */ |
732 | #define VFIO_DMA_MAP_FLAG_WRITE (1 << 1) /* writable from device */ |
733 | __u64 vaddr; /* Process virtual address */ |
734 | __u64 iova; /* IO virtual address */ |
735 | __u64 size; /* Size of mapping (bytes) */ |
736 | }; |
737 | |
738 | #define VFIO_IOMMU_MAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 13) |
739 | |
740 | /** |
741 | * VFIO_IOMMU_UNMAP_DMA - _IOWR(VFIO_TYPE, VFIO_BASE + 14, |
742 | * struct vfio_dma_unmap) |
743 | * |
744 | * Unmap IO virtual addresses using the provided struct vfio_dma_unmap. |
745 | * Caller sets argsz. The actual unmapped size is returned in the size |
746 | * field. No guarantee is made to the user that arbitrary unmaps of iova |
747 | * or size different from those used in the original mapping call will |
748 | * succeed. |
749 | */ |
750 | struct vfio_iommu_type1_dma_unmap { |
751 | __u32 argsz; |
752 | __u32 flags; |
753 | __u64 iova; /* IO virtual address */ |
754 | __u64 size; /* Size of mapping (bytes) */ |
755 | }; |
756 | |
757 | #define VFIO_IOMMU_UNMAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 14) |
758 | |
759 | /* |
760 | * IOCTLs to enable/disable IOMMU container usage. |
761 | * No parameters are supported. |
762 | */ |
763 | #define VFIO_IOMMU_ENABLE _IO(VFIO_TYPE, VFIO_BASE + 15) |
764 | #define VFIO_IOMMU_DISABLE _IO(VFIO_TYPE, VFIO_BASE + 16) |
765 | |
766 | /* -------- Additional API for SPAPR TCE (Server POWERPC) IOMMU -------- */ |
767 | |
768 | /* |
769 | * The SPAPR TCE DDW info struct provides the information about |
770 | * the details of Dynamic DMA window capability. |
771 | * |
772 | * @pgsizes contains a page size bitmask, 4K/64K/16M are supported. |
773 | * @max_dynamic_windows_supported tells the maximum number of windows |
774 | * which the platform can create. |
775 | * @levels tells the maximum number of levels in multi-level IOMMU tables; |
776 | * this allows splitting a table into smaller chunks which reduces |
777 | * the amount of physically contiguous memory required for the table. |
778 | */ |
779 | struct vfio_iommu_spapr_tce_ddw_info { |
780 | __u64 pgsizes; /* Bitmap of supported page sizes */ |
781 | __u32 max_dynamic_windows_supported; |
782 | __u32 levels; |
783 | }; |
784 | |
785 | /* |
786 | * The SPAPR TCE info struct provides the information about the PCI bus |
787 | * address ranges available for DMA, these values are programmed into |
788 | * the hardware so the guest has to know that information. |
789 | * |
790 | * The DMA 32 bit window start is an absolute PCI bus address. |
791 | * The IOVA address passed via map/unmap ioctls are absolute PCI bus |
792 | * addresses too so the window works as a filter rather than an offset |
793 | * for IOVA addresses. |
794 | * |
795 | * Flags supported: |
796 | * - VFIO_IOMMU_SPAPR_INFO_DDW: informs the userspace that dynamic DMA windows |
797 | * (DDW) support is present. @ddw is only supported when DDW is present. |
798 | */ |
799 | struct vfio_iommu_spapr_tce_info { |
800 | __u32 argsz; |
801 | __u32 flags; |
802 | #define VFIO_IOMMU_SPAPR_INFO_DDW (1 << 0) /* DDW supported */ |
803 | __u32 dma32_window_start; /* 32 bit window start (bytes) */ |
804 | __u32 dma32_window_size; /* 32 bit window size (bytes) */ |
805 | struct vfio_iommu_spapr_tce_ddw_info ddw; |
806 | }; |
807 | |
808 | #define VFIO_IOMMU_SPAPR_TCE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12) |
809 | |
810 | /* |
811 | * EEH PE operation struct provides ways to: |
812 | * - enable/disable EEH functionality; |
813 | * - unfreeze IO/DMA for frozen PE; |
814 | * - read PE state; |
815 | * - reset PE; |
816 | * - configure PE; |
817 | * - inject EEH error. |
818 | */ |
819 | struct vfio_eeh_pe_err { |
820 | __u32 type; |
821 | __u32 func; |
822 | __u64 addr; |
823 | __u64 mask; |
824 | }; |
825 | |
826 | struct vfio_eeh_pe_op { |
827 | __u32 argsz; |
828 | __u32 flags; |
829 | __u32 op; |
830 | union { |
831 | struct vfio_eeh_pe_err err; |
832 | }; |
833 | }; |
834 | |
835 | #define VFIO_EEH_PE_DISABLE 0 /* Disable EEH functionality */ |
836 | #define VFIO_EEH_PE_ENABLE 1 /* Enable EEH functionality */ |
837 | #define VFIO_EEH_PE_UNFREEZE_IO 2 /* Enable IO for frozen PE */ |
838 | #define VFIO_EEH_PE_UNFREEZE_DMA 3 /* Enable DMA for frozen PE */ |
839 | #define VFIO_EEH_PE_GET_STATE 4 /* PE state retrieval */ |
840 | #define VFIO_EEH_PE_STATE_NORMAL 0 /* PE in functional state */ |
841 | #define VFIO_EEH_PE_STATE_RESET 1 /* PE reset in progress */ |
842 | #define VFIO_EEH_PE_STATE_STOPPED 2 /* Stopped DMA and IO */ |
843 | #define VFIO_EEH_PE_STATE_STOPPED_DMA 4 /* Stopped DMA only */ |
844 | #define VFIO_EEH_PE_STATE_UNAVAIL 5 /* State unavailable */ |
845 | #define VFIO_EEH_PE_RESET_DEACTIVATE 5 /* Deassert PE reset */ |
846 | #define VFIO_EEH_PE_RESET_HOT 6 /* Assert hot reset */ |
847 | #define VFIO_EEH_PE_RESET_FUNDAMENTAL 7 /* Assert fundamental reset */ |
848 | #define VFIO_EEH_PE_CONFIGURE 8 /* PE configuration */ |
849 | #define VFIO_EEH_PE_INJECT_ERR 9 /* Inject EEH error */ |
850 | |
851 | #define VFIO_EEH_PE_OP _IO(VFIO_TYPE, VFIO_BASE + 21) |
852 | |
853 | /** |
854 | * VFIO_IOMMU_SPAPR_REGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 17, struct vfio_iommu_spapr_register_memory) |
855 | * |
856 | * Registers user space memory where DMA is allowed. It pins |
857 | * user pages and does the locked memory accounting so |
858 | * subsequent VFIO_IOMMU_MAP_DMA/VFIO_IOMMU_UNMAP_DMA calls |
859 | * get faster. |
860 | */ |
861 | struct vfio_iommu_spapr_register_memory { |
862 | __u32 argsz; |
863 | __u32 flags; |
864 | __u64 vaddr; /* Process virtual address */ |
865 | __u64 size; /* Size of mapping (bytes) */ |
866 | }; |
867 | #define VFIO_IOMMU_SPAPR_REGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 17) |
868 | |
869 | /** |
870 | * VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 18, struct vfio_iommu_spapr_register_memory) |
871 | * |
872 | * Unregisters user space memory registered with |
873 | * VFIO_IOMMU_SPAPR_REGISTER_MEMORY. |
874 | * Uses vfio_iommu_spapr_register_memory for parameters. |
875 | */ |
876 | #define VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 18) |
877 | |
878 | /** |
879 | * VFIO_IOMMU_SPAPR_TCE_CREATE - _IOWR(VFIO_TYPE, VFIO_BASE + 19, struct vfio_iommu_spapr_tce_create) |
880 | * |
881 | * Creates an additional TCE table and programs it (sets a new DMA window) |
882 | * to every IOMMU group in the container. It receives page shift, window |
883 | * size and number of levels in the TCE table being created. |
884 | * |
885 | * It allocates and returns an offset on a PCI bus of the new DMA window. |
886 | */ |
887 | struct vfio_iommu_spapr_tce_create { |
888 | __u32 argsz; |
889 | __u32 flags; |
890 | /* in */ |
891 | __u32 page_shift; |
892 | __u32 __resv1; |
893 | __u64 window_size; |
894 | __u32 levels; |
895 | __u32 __resv2; |
896 | /* out */ |
897 | __u64 start_addr; |
898 | }; |
899 | #define VFIO_IOMMU_SPAPR_TCE_CREATE _IO(VFIO_TYPE, VFIO_BASE + 19) |
900 | |
901 | /** |
902 | * VFIO_IOMMU_SPAPR_TCE_REMOVE - _IOW(VFIO_TYPE, VFIO_BASE + 20, struct vfio_iommu_spapr_tce_remove) |
903 | * |
904 | * Unprograms a TCE table from all groups in the container and destroys it. |
905 | * It receives a PCI bus offset as a window id. |
906 | */ |
907 | struct vfio_iommu_spapr_tce_remove { |
908 | __u32 argsz; |
909 | __u32 flags; |
910 | /* in */ |
911 | __u64 start_addr; |
912 | }; |
913 | #define VFIO_IOMMU_SPAPR_TCE_REMOVE _IO(VFIO_TYPE, VFIO_BASE + 20) |
914 | |
915 | /* ***************************************************************** */ |
916 | |
917 | #endif /* VFIO_H */ |
918 | |