1 | /* |
2 | * MIPS cpu parameters for qemu. |
3 | * |
4 | * SPDX-License-Identifier: LGPL-2.0+ |
5 | */ |
6 | |
7 | #ifndef MIPS_CPU_PARAM_H |
8 | #define MIPS_CPU_PARAM_H 1 |
9 | |
10 | #ifdef TARGET_MIPS64 |
11 | # define TARGET_LONG_BITS 64 |
12 | #else |
13 | # define TARGET_LONG_BITS 32 |
14 | #endif |
15 | #ifdef TARGET_MIPS64 |
16 | #define TARGET_PHYS_ADDR_SPACE_BITS 48 |
17 | #define TARGET_VIRT_ADDR_SPACE_BITS 48 |
18 | #else |
19 | #define TARGET_PHYS_ADDR_SPACE_BITS 40 |
20 | # ifdef CONFIG_USER_ONLY |
21 | # define TARGET_VIRT_ADDR_SPACE_BITS 31 |
22 | # else |
23 | # define TARGET_VIRT_ADDR_SPACE_BITS 32 |
24 | #endif |
25 | #endif |
26 | #define TARGET_PAGE_BITS 12 |
27 | #define NB_MMU_MODES 4 |
28 | |
29 | #endif |
30 | |