1 | /* |
2 | * Generic vector operation descriptor |
3 | * |
4 | * Copyright (c) 2018 Linaro |
5 | * |
6 | * This library is free software; you can redistribute it and/or |
7 | * modify it under the terms of the GNU Lesser General Public |
8 | * License as published by the Free Software Foundation; either |
9 | * version 2.1 of the License, or (at your option) any later version. |
10 | * |
11 | * This library is distributed in the hope that it will be useful, |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
14 | * Lesser General Public License for more details. |
15 | * |
16 | * You should have received a copy of the GNU Lesser General Public |
17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
18 | */ |
19 | |
20 | #ifndef TCG_TCG_GVEC_DESC_H |
21 | #define TCG_TCG_GVEC_DESC_H |
22 | |
23 | /* ??? These bit widths are set for ARM SVE, maxing out at 256 byte vectors. */ |
24 | #define SIMD_OPRSZ_SHIFT 0 |
25 | #define SIMD_OPRSZ_BITS 5 |
26 | |
27 | #define SIMD_MAXSZ_SHIFT (SIMD_OPRSZ_SHIFT + SIMD_OPRSZ_BITS) |
28 | #define SIMD_MAXSZ_BITS 5 |
29 | |
30 | #define SIMD_DATA_SHIFT (SIMD_MAXSZ_SHIFT + SIMD_MAXSZ_BITS) |
31 | #define SIMD_DATA_BITS (32 - SIMD_DATA_SHIFT) |
32 | |
33 | /* Create a descriptor from components. */ |
34 | uint32_t simd_desc(uint32_t oprsz, uint32_t maxsz, int32_t data); |
35 | |
36 | /* Extract the operation size from a descriptor. */ |
37 | static inline intptr_t simd_oprsz(uint32_t desc) |
38 | { |
39 | return (extract32(desc, SIMD_OPRSZ_SHIFT, SIMD_OPRSZ_BITS) + 1) * 8; |
40 | } |
41 | |
42 | /* Extract the max vector size from a descriptor. */ |
43 | static inline intptr_t simd_maxsz(uint32_t desc) |
44 | { |
45 | return (extract32(desc, SIMD_MAXSZ_SHIFT, SIMD_MAXSZ_BITS) + 1) * 8; |
46 | } |
47 | |
48 | /* Extract the operation-specific data from a descriptor. */ |
49 | static inline int32_t simd_data(uint32_t desc) |
50 | { |
51 | return sextract32(desc, SIMD_DATA_SHIFT, SIMD_DATA_BITS); |
52 | } |
53 | |
54 | #endif |
55 | |