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39 | |
40 | // This is a generated file. DO NOT EDIT. |
41 | // Please see util/x86simdgen/generate.pl |
42 | #ifndef QSIMD_P_H |
43 | # error "Please include <private/qsimd_p.h> instead" |
44 | #endif |
45 | #ifndef QSIMD_X86_P_H |
46 | #define QSIMD_X86_P_H |
47 | |
48 | #include "qsimd_p.h" |
49 | |
50 | // |
51 | // W A R N I N G |
52 | // ------------- |
53 | // |
54 | // This file is not part of the Qt API. It exists purely as an |
55 | // implementation detail. This header file may change from version to |
56 | // version without notice, or even be removed. |
57 | // |
58 | // We mean it. |
59 | // |
60 | |
61 | QT_BEGIN_NAMESPACE |
62 | |
63 | // used only to indicate that the CPU detection was initialized |
64 | #define QSimdInitialized (Q_UINT64_C(1) << 0) |
65 | |
66 | // in CPUID Leaf 1, EDX: |
67 | #define CpuFeatureSSE2 (Q_UINT64_C(1) << 1) |
68 | #define QT_FUNCTION_TARGET_STRING_SSE2 "sse2" |
69 | |
70 | // in CPUID Leaf 1, ECX: |
71 | #define CpuFeatureSSE3 (Q_UINT64_C(1) << 2) |
72 | #define QT_FUNCTION_TARGET_STRING_SSE3 "sse3" |
73 | #define CpuFeatureSSSE3 (Q_UINT64_C(1) << 3) |
74 | #define QT_FUNCTION_TARGET_STRING_SSSE3 "ssse3" |
75 | #define CpuFeatureFMA (Q_UINT64_C(1) << 4) |
76 | #define QT_FUNCTION_TARGET_STRING_FMA "fma" |
77 | #define CpuFeatureSSE4_1 (Q_UINT64_C(1) << 5) |
78 | #define QT_FUNCTION_TARGET_STRING_SSE4_1 "sse4.1" |
79 | #define CpuFeatureSSE4_2 (Q_UINT64_C(1) << 6) |
80 | #define QT_FUNCTION_TARGET_STRING_SSE4_2 "sse4.2" |
81 | #define CpuFeatureMOVBE (Q_UINT64_C(1) << 7) |
82 | #define QT_FUNCTION_TARGET_STRING_MOVBE "movbe" |
83 | #define CpuFeaturePOPCNT (Q_UINT64_C(1) << 8) |
84 | #define QT_FUNCTION_TARGET_STRING_POPCNT "popcnt" |
85 | #define CpuFeatureAES (Q_UINT64_C(1) << 9) |
86 | #define QT_FUNCTION_TARGET_STRING_AES "aes,sse4.2" |
87 | #define CpuFeatureAVX (Q_UINT64_C(1) << 10) |
88 | #define QT_FUNCTION_TARGET_STRING_AVX "avx" |
89 | #define CpuFeatureF16C (Q_UINT64_C(1) << 11) |
90 | #define QT_FUNCTION_TARGET_STRING_F16C "f16c" |
91 | #define CpuFeatureRDRND (Q_UINT64_C(1) << 12) |
92 | #define QT_FUNCTION_TARGET_STRING_RDRND "rdrnd" |
93 | |
94 | // in CPUID Leaf 7, Sub-leaf 0, EBX: |
95 | #define CpuFeatureBMI (Q_UINT64_C(1) << 13) |
96 | #define QT_FUNCTION_TARGET_STRING_BMI "bmi" |
97 | #define CpuFeatureHLE (Q_UINT64_C(1) << 14) |
98 | #define QT_FUNCTION_TARGET_STRING_HLE "hle" |
99 | #define CpuFeatureAVX2 (Q_UINT64_C(1) << 15) |
100 | #define QT_FUNCTION_TARGET_STRING_AVX2 "avx2" |
101 | #define CpuFeatureBMI2 (Q_UINT64_C(1) << 16) |
102 | #define QT_FUNCTION_TARGET_STRING_BMI2 "bmi2" |
103 | #define CpuFeatureRTM (Q_UINT64_C(1) << 17) |
104 | #define QT_FUNCTION_TARGET_STRING_RTM "rtm" |
105 | #define CpuFeatureAVX512F (Q_UINT64_C(1) << 18) |
106 | #define QT_FUNCTION_TARGET_STRING_AVX512F "avx512f" |
107 | #define CpuFeatureAVX512DQ (Q_UINT64_C(1) << 19) |
108 | #define QT_FUNCTION_TARGET_STRING_AVX512DQ "avx512dq" |
109 | #define CpuFeatureRDSEED (Q_UINT64_C(1) << 20) |
110 | #define QT_FUNCTION_TARGET_STRING_RDSEED "rdseed" |
111 | #define CpuFeatureAVX512IFMA (Q_UINT64_C(1) << 21) |
112 | #define QT_FUNCTION_TARGET_STRING_AVX512IFMA "avx512ifma" |
113 | #define CpuFeatureAVX512PF (Q_UINT64_C(1) << 22) |
114 | #define QT_FUNCTION_TARGET_STRING_AVX512PF "avx512pf" |
115 | #define CpuFeatureAVX512ER (Q_UINT64_C(1) << 23) |
116 | #define QT_FUNCTION_TARGET_STRING_AVX512ER "avx512er" |
117 | #define CpuFeatureAVX512CD (Q_UINT64_C(1) << 24) |
118 | #define QT_FUNCTION_TARGET_STRING_AVX512CD "avx512cd" |
119 | #define CpuFeatureSHA (Q_UINT64_C(1) << 25) |
120 | #define QT_FUNCTION_TARGET_STRING_SHA "sha" |
121 | #define CpuFeatureAVX512BW (Q_UINT64_C(1) << 26) |
122 | #define QT_FUNCTION_TARGET_STRING_AVX512BW "avx512bw" |
123 | #define CpuFeatureAVX512VL (Q_UINT64_C(1) << 27) |
124 | #define QT_FUNCTION_TARGET_STRING_AVX512VL "avx512vl" |
125 | |
126 | // in CPUID Leaf 7, Sub-leaf 0, ECX: |
127 | #define CpuFeatureAVX512VBMI (Q_UINT64_C(1) << 28) |
128 | #define QT_FUNCTION_TARGET_STRING_AVX512VBMI "avx512vbmi" |
129 | #define CpuFeatureAVX512VBMI2 (Q_UINT64_C(1) << 29) |
130 | #define QT_FUNCTION_TARGET_STRING_AVX512VBMI2 "avx512vbmi2" |
131 | #define CpuFeatureGFNI (Q_UINT64_C(1) << 30) |
132 | #define QT_FUNCTION_TARGET_STRING_GFNI "gfni" |
133 | #define CpuFeatureVAES (Q_UINT64_C(1) << 31) |
134 | #define QT_FUNCTION_TARGET_STRING_VAES "vaes" |
135 | #define CpuFeatureAVX512VNNI (Q_UINT64_C(1) << 32) |
136 | #define QT_FUNCTION_TARGET_STRING_AVX512VNNI "avx512vnni" |
137 | #define CpuFeatureAVX512BITALG (Q_UINT64_C(1) << 33) |
138 | #define QT_FUNCTION_TARGET_STRING_AVX512BITALG "avx512bitalg" |
139 | #define CpuFeatureAVX512VPOPCNTDQ (Q_UINT64_C(1) << 34) |
140 | #define QT_FUNCTION_TARGET_STRING_AVX512VPOPCNTDQ "avx512vpopcntdq" |
141 | |
142 | // in CPUID Leaf 7, Sub-leaf 0, EDX: |
143 | #define CpuFeatureAVX5124NNIW (Q_UINT64_C(1) << 35) |
144 | #define QT_FUNCTION_TARGET_STRING_AVX5124NNIW "avx5124nniw" |
145 | #define CpuFeatureAVX5124FMAPS (Q_UINT64_C(1) << 36) |
146 | #define QT_FUNCTION_TARGET_STRING_AVX5124FMAPS "avx5124fmaps" |
147 | |
148 | static const quint64 qCompilerCpuFeatures = 0 |
149 | #ifdef __SSE2__ |
150 | | CpuFeatureSSE2 |
151 | #endif |
152 | #ifdef __SSE3__ |
153 | | CpuFeatureSSE3 |
154 | #endif |
155 | #ifdef __SSSE3__ |
156 | | CpuFeatureSSSE3 |
157 | #endif |
158 | #ifdef __FMA__ |
159 | | CpuFeatureFMA |
160 | #endif |
161 | #ifdef __SSE4_1__ |
162 | | CpuFeatureSSE4_1 |
163 | #endif |
164 | #ifdef __SSE4_2__ |
165 | | CpuFeatureSSE4_2 |
166 | #endif |
167 | #ifdef __MOVBE__ |
168 | | CpuFeatureMOVBE |
169 | #endif |
170 | #ifdef __POPCNT__ |
171 | | CpuFeaturePOPCNT |
172 | #endif |
173 | #ifdef __AES__ |
174 | | CpuFeatureAES |
175 | #endif |
176 | #ifdef __AVX__ |
177 | | CpuFeatureAVX |
178 | #endif |
179 | #ifdef __F16C__ |
180 | | CpuFeatureF16C |
181 | #endif |
182 | #ifdef __RDRND__ |
183 | | CpuFeatureRDRND |
184 | #endif |
185 | #ifdef __BMI__ |
186 | | CpuFeatureBMI |
187 | #endif |
188 | #ifdef __HLE__ |
189 | | CpuFeatureHLE |
190 | #endif |
191 | #ifdef __AVX2__ |
192 | | CpuFeatureAVX2 |
193 | #endif |
194 | #ifdef __BMI2__ |
195 | | CpuFeatureBMI2 |
196 | #endif |
197 | #ifdef __RTM__ |
198 | | CpuFeatureRTM |
199 | #endif |
200 | #ifdef __AVX512F__ |
201 | | CpuFeatureAVX512F |
202 | #endif |
203 | #ifdef __AVX512DQ__ |
204 | | CpuFeatureAVX512DQ |
205 | #endif |
206 | #ifdef __RDSEED__ |
207 | | CpuFeatureRDSEED |
208 | #endif |
209 | #ifdef __AVX512IFMA__ |
210 | | CpuFeatureAVX512IFMA |
211 | #endif |
212 | #ifdef __AVX512PF__ |
213 | | CpuFeatureAVX512PF |
214 | #endif |
215 | #ifdef __AVX512ER__ |
216 | | CpuFeatureAVX512ER |
217 | #endif |
218 | #ifdef __AVX512CD__ |
219 | | CpuFeatureAVX512CD |
220 | #endif |
221 | #ifdef __SHA__ |
222 | | CpuFeatureSHA |
223 | #endif |
224 | #ifdef __AVX512BW__ |
225 | | CpuFeatureAVX512BW |
226 | #endif |
227 | #ifdef __AVX512VL__ |
228 | | CpuFeatureAVX512VL |
229 | #endif |
230 | #ifdef __AVX512VBMI__ |
231 | | CpuFeatureAVX512VBMI |
232 | #endif |
233 | #ifdef __AVX512VBMI2__ |
234 | | CpuFeatureAVX512VBMI2 |
235 | #endif |
236 | #ifdef __GFNI__ |
237 | | CpuFeatureGFNI |
238 | #endif |
239 | #ifdef __VAES__ |
240 | | CpuFeatureVAES |
241 | #endif |
242 | #ifdef __AVX512VNNI__ |
243 | | CpuFeatureAVX512VNNI |
244 | #endif |
245 | #ifdef __AVX512BITALG__ |
246 | | CpuFeatureAVX512BITALG |
247 | #endif |
248 | #ifdef __AVX512VPOPCNTDQ__ |
249 | | CpuFeatureAVX512VPOPCNTDQ |
250 | #endif |
251 | #ifdef __AVX5124NNIW__ |
252 | | CpuFeatureAVX5124NNIW |
253 | #endif |
254 | #ifdef __AVX5124FMAPS__ |
255 | | CpuFeatureAVX5124FMAPS |
256 | #endif |
257 | ; |
258 | |
259 | QT_END_NAMESPACE |
260 | |
261 | #endif // QSIMD_X86_P_H |
262 | |