| 1 | /* | 
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| 2 | Copyright (c) 2005-2019 Intel Corporation | 
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| 3 |  | 
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| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | 
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| 5 | you may not use this file except in compliance with the License. | 
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| 6 | You may obtain a copy of the License at | 
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| 7 |  | 
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| 8 | http://www.apache.org/licenses/LICENSE-2.0 | 
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| 9 |  | 
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| 10 | Unless required by applicable law or agreed to in writing, software | 
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| 11 | distributed under the License is distributed on an "AS IS" BASIS, | 
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| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | 
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| 13 | See the License for the specific language governing permissions and | 
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| 14 | limitations under the License. | 
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| 15 | */ | 
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| 16 |  | 
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| 17 | // Header that includes Intel(R) Transactional Synchronization Extensions (Intel(R) TSX) specific test functions | 
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| 18 |  | 
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| 19 | #if __TBB_TSX_AVAILABLE | 
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| 20 | #define __TBB_TSX_TESTING_ENABLED_FOR_THIS_COMPILER (__INTEL_COMPILER || __GNUC__ || _MSC_VER || __SUNPRO_CC) | 
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| 21 | #if __TBB_TSX_TESTING_ENABLED_FOR_THIS_COMPILER | 
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| 22 |  | 
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| 23 | #include "harness_defs.h" | 
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| 24 |  | 
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| 25 | inline static bool IsInsideTx() | 
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| 26 | { | 
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| 27 | return __TBB_machine_is_in_transaction() != 0; | 
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| 28 | } | 
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| 29 |  | 
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| 30 | #if _MSC_VER | 
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| 31 | #include <intrin.h> // for __cpuid | 
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| 32 | #endif | 
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| 33 | // TODO: consider reusing tbb_misc.cpp:cpu_has_speculation() instead of code duplication. | 
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| 34 | bool have_TSX() { | 
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| 35 | bool result = false; | 
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| 36 | const int hle_ebx_mask = 1<<4; | 
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| 37 | const int rtm_ebx_mask = 1<<11; | 
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| 38 | #if _MSC_VER | 
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| 39 | int info[4] = {0,0,0,0}; | 
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| 40 | const int reg_ebx = 1; | 
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| 41 | int old_ecx = 0; | 
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| 42 | __cpuidex(info, 7, old_ecx); | 
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| 43 | result = (info[reg_ebx] & rtm_ebx_mask)!=0; | 
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| 44 | if( result ) ASSERT( (info[reg_ebx] & hle_ebx_mask)!=0, NULL ); | 
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| 45 | #elif __GNUC__ || __SUNPRO_CC | 
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| 46 | int32_t reg_ebx = 0; | 
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| 47 | int32_t reg_eax = 7; | 
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| 48 | int32_t reg_ecx = 0; | 
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| 49 | __asm__ __volatile__ ( "movl %%ebx, %%esi\n" | 
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| 50 | "cpuid\n" | 
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| 51 | "movl %%ebx, %0\n" | 
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| 52 | "movl %%esi, %%ebx\n" | 
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| 53 | : "=a"(reg_ebx) : "0"(reg_eax), "c"(reg_ecx) : "esi", | 
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| 54 | #if __TBB_x86_64 | 
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| 55 | "ebx", | 
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| 56 | #endif | 
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| 57 | "edx" | 
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| 58 | ); | 
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| 59 | result = (reg_ebx & rtm_ebx_mask)!=0 ; | 
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| 60 | if( result ) ASSERT( (reg_ebx & hle_ebx_mask)!=0, NULL ); | 
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| 61 | #endif | 
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| 62 | return result; | 
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| 63 | } | 
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| 64 |  | 
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| 65 | #endif /* __TBB_TSX_TESTING_ENABLED_FOR_THIS_COMPILER */ | 
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| 66 | #endif /* __TBB_TSX_AVAILABLE */ | 
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| 67 |  | 
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