| 1 | /* |
| 2 | * Copyright (c) 2015, Intel Corporation |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * * Redistributions of source code must retain the above copyright notice, |
| 8 | * this list of conditions and the following disclaimer. |
| 9 | * * Redistributions in binary form must reproduce the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer in the |
| 11 | * documentation and/or other materials provided with the distribution. |
| 12 | * * Neither the name of Intel Corporation nor the names of its contributors |
| 13 | * may be used to endorse or promote products derived from this software |
| 14 | * without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 17 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
| 20 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 23 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 24 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 25 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 26 | * POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | /** \file |
| 30 | * \brief SOM streaming runtime code. |
| 31 | * |
| 32 | * Code in this file handles storing and loading SOM slot information from |
| 33 | * stream state. |
| 34 | */ |
| 35 | |
| 36 | #include "scratch.h" |
| 37 | #include "som_stream.h" |
| 38 | #include "rose/rose_internal.h" |
| 39 | #include "util/multibit.h" |
| 40 | |
| 41 | // Sentinel values stored in stream state and used to represent an SOM distance |
| 42 | // that is too far in the past to be stored in the available space in stream |
| 43 | // state. |
| 44 | |
| 45 | #define SOM_SENTINEL_LARGE (~0ull) |
| 46 | #define SOM_SENTINEL_MEDIUM (~0u) |
| 47 | #define SOM_SENTINEL_SMALL ((u16)~0u) |
| 48 | |
| 49 | static really_inline |
| 50 | void storeSomValue(void *stream_som_store, u64a som_value, |
| 51 | u64a stream_offset, u8 som_size) { |
| 52 | // Special case for sentinel value. |
| 53 | if (som_value == SOM_SENTINEL_LARGE) { |
| 54 | switch (som_size) { |
| 55 | case 2: |
| 56 | *(u16 *)stream_som_store = SOM_SENTINEL_SMALL; |
| 57 | break; |
| 58 | case 4: |
| 59 | *(u32 *)stream_som_store = SOM_SENTINEL_MEDIUM; |
| 60 | break; |
| 61 | case 8: |
| 62 | *(u64a *)stream_som_store = SOM_SENTINEL_LARGE; |
| 63 | break; |
| 64 | default: |
| 65 | break; |
| 66 | } |
| 67 | return; |
| 68 | } |
| 69 | |
| 70 | assert(som_value <= stream_offset); |
| 71 | u64a rel_offset = stream_offset - som_value; |
| 72 | DEBUG_PRINTF("rel_offset=%llu\n" , rel_offset); |
| 73 | |
| 74 | switch (som_size) { |
| 75 | case 2: |
| 76 | rel_offset = MIN(rel_offset, SOM_SENTINEL_SMALL); |
| 77 | assert(ISALIGNED_N(stream_som_store, alignof(u16))); |
| 78 | *(u16 *)stream_som_store = rel_offset; |
| 79 | break; |
| 80 | case 4: |
| 81 | rel_offset = MIN(rel_offset, SOM_SENTINEL_MEDIUM); |
| 82 | assert(ISALIGNED_N(stream_som_store, alignof(u32))); |
| 83 | *(u32 *)stream_som_store = rel_offset; |
| 84 | break; |
| 85 | case 8: |
| 86 | assert(ISALIGNED_N(stream_som_store, alignof(u64a))); |
| 87 | *(u64a *)stream_som_store = rel_offset; |
| 88 | break; |
| 89 | default: |
| 90 | assert(0); |
| 91 | break; |
| 92 | } |
| 93 | } |
| 94 | |
| 95 | void storeSomToStream(struct hs_scratch *scratch, const u64a offset) { |
| 96 | assert(scratch); |
| 97 | DEBUG_PRINTF("stream offset %llu\n" , offset); |
| 98 | |
| 99 | struct core_info *ci = &scratch->core_info; |
| 100 | const struct RoseEngine *rose = ci->rose; |
| 101 | |
| 102 | const u32 som_store_count = rose->somLocationCount; |
| 103 | assert(som_store_count); // Caller should ensure that we have work to do. |
| 104 | |
| 105 | u8 *som_store_valid = (u8 *)ci->state + rose->stateOffsets.somValid; |
| 106 | char *stream_som_store = ci->state + rose->stateOffsets.somLocation; |
| 107 | const u64a *som_store = scratch->som_store; |
| 108 | const u8 som_size = rose->somHorizon; |
| 109 | |
| 110 | for (u32 i = mmbit_iterate(som_store_valid, som_store_count, MMB_INVALID); |
| 111 | i != MMB_INVALID; |
| 112 | i = mmbit_iterate(som_store_valid, som_store_count, i)) { |
| 113 | DEBUG_PRINTF("storing %llu in %u\n" , som_store[i], i); |
| 114 | storeSomValue(stream_som_store + (i * som_size), som_store[i], |
| 115 | offset, som_size); |
| 116 | } |
| 117 | } |
| 118 | |
| 119 | static really_inline |
| 120 | u64a loadSomValue(const void *stream_som_store, u64a stream_offset, |
| 121 | u8 som_size) { |
| 122 | u64a rel_offset; |
| 123 | switch (som_size) { |
| 124 | case 2: |
| 125 | assert(ISALIGNED_N(stream_som_store, alignof(u16))); |
| 126 | rel_offset = *(const u16 *)stream_som_store; |
| 127 | if (rel_offset == SOM_SENTINEL_SMALL) { |
| 128 | return SOM_SENTINEL_LARGE; |
| 129 | } |
| 130 | break; |
| 131 | case 4: |
| 132 | assert(ISALIGNED_N(stream_som_store, alignof(u32))); |
| 133 | rel_offset = *(const u32 *)stream_som_store; |
| 134 | if (rel_offset == SOM_SENTINEL_MEDIUM) { |
| 135 | return SOM_SENTINEL_LARGE; |
| 136 | } |
| 137 | break; |
| 138 | case 8: |
| 139 | assert(ISALIGNED_N(stream_som_store, alignof(u64a))); |
| 140 | rel_offset = *(const u64a *)stream_som_store; |
| 141 | break; |
| 142 | default: |
| 143 | assert(0); |
| 144 | rel_offset = 0; |
| 145 | break; |
| 146 | } |
| 147 | |
| 148 | DEBUG_PRINTF("rel_offset=%llu\n" , rel_offset); |
| 149 | return stream_offset - rel_offset; |
| 150 | } |
| 151 | |
| 152 | void loadSomFromStream(struct hs_scratch *scratch, const u64a offset) { |
| 153 | assert(scratch); |
| 154 | DEBUG_PRINTF("stream offset %llu\n" , offset); |
| 155 | |
| 156 | struct core_info *ci = &scratch->core_info; |
| 157 | const struct RoseEngine *rose = ci->rose; |
| 158 | |
| 159 | const u32 som_store_count = rose->somLocationCount; |
| 160 | assert(som_store_count); // Caller should ensure that we have work to do. |
| 161 | |
| 162 | const u8 *som_store_valid = (u8 *)ci->state + rose->stateOffsets.somValid; |
| 163 | const char *stream_som_store = ci->state + rose->stateOffsets.somLocation; |
| 164 | u64a *som_store = scratch->som_store; |
| 165 | const u8 som_size = rose->somHorizon; |
| 166 | |
| 167 | for (u32 i = mmbit_iterate(som_store_valid, som_store_count, MMB_INVALID); |
| 168 | i != MMB_INVALID; |
| 169 | i = mmbit_iterate(som_store_valid, som_store_count, i)) { |
| 170 | som_store[i] = loadSomValue(stream_som_store + (i*som_size), offset, |
| 171 | som_size); |
| 172 | DEBUG_PRINTF("loaded %llu from %u\n" , som_store[i], i); |
| 173 | } |
| 174 | } |
| 175 | |