1 | // Licensed to the .NET Foundation under one or more agreements. |
2 | // The .NET Foundation licenses this file to you under the MIT license. |
3 | // See the LICENSE file in the project root for more information. |
4 | |
5 | /*****************************************************************************/ |
6 | #if !defined(HARDWARE_INTRINSIC) && !defined(HARDWARE_INTRINSIC_CLASS) |
7 | #error Define HARDWARE_INTRINSIC and/or HARDWARE_INTRINSIC_CLASS before including this file |
8 | #endif |
9 | /*****************************************************************************/ |
10 | |
11 | // clang-format off |
12 | |
13 | #if defined(HARDWARE_INTRINSIC_CLASS) |
14 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_AES , Aes ) |
15 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_ATOMICS , Atomics ) |
16 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_CRC32 , Crc32 ) |
17 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_DCPOP , Dcpop ) |
18 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_DP , Dp ) |
19 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_FCMA , Fcma ) |
20 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_FP , Fp ) |
21 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_FP16 , Fp16 ) |
22 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_JSCVT , Jscvt ) |
23 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_LRCPC , Lrcpc ) |
24 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_PMULL , Pmull ) |
25 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SHA1 , Sha1 ) |
26 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SHA256 , Sha256 ) |
27 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SHA512 , Sha512 ) |
28 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SHA3 , Sha3 ) |
29 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SIMD , Simd ) |
30 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SIMD_V81 , Simd_v81 ) |
31 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SIMD_FP16 , Simd_fp16) |
32 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SM3 , Sm3 ) |
33 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SM4 , Sm4 ) |
34 | HARDWARE_INTRINSIC_CLASS(JIT_FLAG_HAS_ARM64_SVE , Sve ) |
35 | #endif // defined(HARDWARE_INTRINSIC_CLASS) |
36 | |
37 | #if defined(HARDWARE_INTRINSIC) |
38 | // (ID Class Function name Form Floating, Signed, Unsigned, Flags) |
39 | // None (For internal use only) |
40 | HARDWARE_INTRINSIC(NI_ARM64_NONE_MOV, None, None, UnaryOp, INS_mov, INS_mov, INS_mov, None ) |
41 | // Base |
42 | HARDWARE_INTRINSIC(NI_ARM64_BASE_CLS, Base, LeadingSignCount, UnaryOp, INS_invalid, INS_cls, INS_cls, None ) |
43 | HARDWARE_INTRINSIC(NI_ARM64_BASE_CLZ, Base, LeadingZeroCount, UnaryOp, INS_invalid, INS_clz, INS_clz, None ) |
44 | HARDWARE_INTRINSIC(NI_Base_Vector64_AsByte, Base, AsByte, UnaryOp, INS_invalid, INS_invalid, INS_invalid, None ) |
45 | HARDWARE_INTRINSIC(NI_Base_Vector64_AsInt16, Base, AsInt16, UnaryOp, INS_invalid, INS_invalid, INS_invalid, None ) |
46 | HARDWARE_INTRINSIC(NI_Base_Vector64_AsInt32, Base, AsInt32, UnaryOp, INS_invalid, INS_invalid, INS_invalid, None ) |
47 | HARDWARE_INTRINSIC(NI_Base_Vector64_AsSByte, Base, AsSByte, UnaryOp, INS_invalid, INS_invalid, INS_invalid, None ) |
48 | HARDWARE_INTRINSIC(NI_Base_Vector64_AsSingle, Base, AsSingle, UnaryOp, INS_invalid, INS_invalid, INS_invalid, None ) |
49 | HARDWARE_INTRINSIC(NI_Base_Vector64_AsUInt16, Base, AsUInt16, UnaryOp, INS_invalid, INS_invalid, INS_invalid, None ) |
50 | HARDWARE_INTRINSIC(NI_Base_Vector64_AsUInt32, Base, AsUInt32, UnaryOp, INS_invalid, INS_invalid, INS_invalid, None ) |
51 | HARDWARE_INTRINSIC(NI_Base_Vector128_As, Base, As, UnaryOp, INS_invalid, INS_invalid, INS_invalid, None ) |
52 | HARDWARE_INTRINSIC(NI_Base_Vector128_AsByte, Base, AsByte, UnaryOp, INS_invalid, INS_invalid, INS_invalid, None ) |
53 | HARDWARE_INTRINSIC(NI_Base_Vector128_AsDouble, Base, AsDouble, UnaryOp, INS_invalid, INS_invalid, INS_invalid, None ) |
54 | HARDWARE_INTRINSIC(NI_Base_Vector128_AsInt16, Base, AsInt16, UnaryOp, INS_invalid, INS_invalid, INS_invalid, None ) |
55 | HARDWARE_INTRINSIC(NI_Base_Vector128_AsInt32, Base, AsInt32, UnaryOp, INS_invalid, INS_invalid, INS_invalid, None ) |
56 | HARDWARE_INTRINSIC(NI_Base_Vector128_AsInt64, Base, AsInt64, UnaryOp, INS_invalid, INS_invalid, INS_invalid, None ) |
57 | HARDWARE_INTRINSIC(NI_Base_Vector128_AsSByte, Base, AsSByte, UnaryOp, INS_invalid, INS_invalid, INS_invalid, None ) |
58 | HARDWARE_INTRINSIC(NI_Base_Vector128_AsSingle, Base, AsSingle, UnaryOp, INS_invalid, INS_invalid, INS_invalid, None ) |
59 | HARDWARE_INTRINSIC(NI_Base_Vector128_AsUInt16, Base, AsUInt16, UnaryOp, INS_invalid, INS_invalid, INS_invalid, None ) |
60 | HARDWARE_INTRINSIC(NI_Base_Vector128_AsUInt32, Base, AsUInt32, UnaryOp, INS_invalid, INS_invalid, INS_invalid, None ) |
61 | HARDWARE_INTRINSIC(NI_Base_Vector128_AsUInt64, Base, AsUInt64, UnaryOp, INS_invalid, INS_invalid, INS_invalid, None ) |
62 | #if NYI |
63 | // Crc32 |
64 | HARDWARE_INTRINSIC(NI_ARM64_CRC32_CRC32, Crc32, Crc32, CrcOp, INS_invalid, INS_invalid, INS_crc32, None ) |
65 | HARDWARE_INTRINSIC(NI_ARM64_CRC32_CRC32C, Crc32, Crc32C, CrcOp, INS_invalid, INS_invalid, INS_crc32c, None ) |
66 | #endif |
67 | // Simd |
68 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_Abs, Simd, Abs, SimdUnaryOp, INS_fabs, INS_invalid, INS_abs, None ) |
69 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_Add, Simd, Add, SimdBinaryOp, INS_fadd, INS_add, INS_add, None ) |
70 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_BitwiseAnd, Simd, And, SimdBinaryOp, INS_and, INS_and, INS_and, None ) |
71 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_BitwiseAndNot, Simd, AndNot, SimdBinaryOp, INS_bic, INS_bic, INS_bic, None ) |
72 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_BitwiseOr, Simd, Or, SimdBinaryOp, INS_orr, INS_orr, INS_orr, None ) |
73 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_BitwiseOrNot, Simd, OrNot, SimdBinaryOp, INS_orn, INS_orn, INS_orn, None ) |
74 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_BitwiseNot, Simd, Not, SimdUnaryOp, INS_not, INS_not, INS_not, None ) |
75 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_BitwiseSelect, Simd, BitwiseSelect, SimdSelectOp, INS_bsl, INS_bsl, INS_bsl, None ) |
76 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_BitwiseXor, Simd, Xor, SimdBinaryOp, INS_eor, INS_eor, INS_eor, None ) |
77 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_CLS, Simd, LeadingSignCount, SimdUnaryOp, INS_invalid, INS_cls, INS_cls, None ) |
78 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_CLZ, Simd, LeadingZeroCount, SimdUnaryOp, INS_invalid, INS_clz, INS_clz, None ) |
79 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_CNT, Simd, PopCount, SimdUnaryOp, INS_invalid, INS_cnt, INS_cnt, None ) |
80 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_EQ, Simd, CompareEqual, SimdBinaryOp, INS_fcmeq, INS_cmeq, INS_cmeq, None ) |
81 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_EQ_ZERO, Simd, CompareEqualZero, SimdUnaryOp, INS_fcmeq, INS_cmeq, INS_cmeq, None ) |
82 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_GE, Simd, CompareGreaterThanOrEqual, SimdBinaryOp, INS_fcmge, INS_cmge, INS_cmhs, None ) |
83 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_GE_ZERO, Simd, CompareGreaterThanOrEqualZero, SimdUnaryOp, INS_fcmge, INS_cmge, INS_invalid, LowerCmpUZero ) |
84 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_GT, Simd, CompareGreaterThan, SimdBinaryOp, INS_fcmgt, INS_cmgt, INS_cmhi, None ) |
85 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_GT_ZERO, Simd, CompareGreaterThanZero, SimdUnaryOp, INS_fcmgt, INS_cmgt, INS_invalid, LowerCmpUZero ) |
86 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_LE_ZERO, Simd, CompareLessThanOrEqualZero, SimdUnaryOp, INS_fcmle, INS_cmle, INS_cmeq, LowerCmpUZero ) |
87 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_LT_ZERO, Simd, CompareLessThanZero, SimdUnaryOp, INS_fcmlt, INS_cmlt, INS_invalid, LowerCmpUZero ) |
88 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_TST, Simd, CompareTest, SimdBinaryOp, INS_ctst, INS_ctst, INS_ctst, None ) |
89 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_Div, Simd, Divide, SimdBinaryOp, INS_fdiv, INS_invalid, INS_invalid, None ) |
90 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_Negate, Simd, Negate, SimdUnaryOp, INS_fneg, INS_neg, INS_invalid, None ) |
91 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_Max, Simd, Max, SimdBinaryOp, INS_fmax, INS_smax, INS_umax, None ) |
92 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_Min, Simd, Min, SimdBinaryOp, INS_fmin, INS_smin, INS_umin, None ) |
93 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_Mul, Simd, Multiply, SimdBinaryOp, INS_fmul, INS_mul, INS_mul, None ) |
94 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_Sqrt, Simd, Sqrt, SimdUnaryOp, INS_fsqrt, INS_invalid, INS_invalid, None ) |
95 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_Sub, Simd, Subtract, SimdBinaryOp, INS_fsub, INS_sub, INS_sub, None ) |
96 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_GetItem, Simd, Extract, SimdExtractOp, INS_mov, INS_mov, INS_mov, None ) |
97 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_SetItem, Simd, Insert, SimdInsertOp, INS_mov, INS_mov, INS_mov, None ) |
98 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_SetAllVector64, Simd, SetAllVector64, SimdSetAllOp, INS_dup, INS_dup, INS_dup, None ) |
99 | HARDWARE_INTRINSIC(NI_ARM64_SIMD_SetAllVector128, Simd, SetAllVector128, SimdSetAllOp, INS_dup, INS_dup, INS_dup, None ) |
100 | //Aes |
101 | HARDWARE_INTRINSIC(NI_ARM64_AesEncrypt, Aes, Encrypt, SimdBinaryRMWOp, INS_invalid, INS_invalid, INS_aese, None ) |
102 | HARDWARE_INTRINSIC(NI_ARM64_AesDecrypt, Aes, Decrypt, SimdBinaryRMWOp, INS_invalid, INS_invalid, INS_aesd, None ) |
103 | HARDWARE_INTRINSIC(NI_ARM64_AesMixColumns, Aes, MixColumns, SimdUnaryOp, INS_invalid, INS_invalid, INS_aesmc, None ) |
104 | HARDWARE_INTRINSIC(NI_ARM64_AesInvMixColumns, Aes, InverseMixColumns, SimdUnaryOp, INS_invalid, INS_invalid, INS_aesimc, None ) |
105 | |
106 | //Sha1 |
107 | HARDWARE_INTRINSIC(NI_ARM64_Sha1Choose, Sha1, HashChoose, Sha1HashOp, INS_invalid, INS_invalid, INS_sha1c, None ) |
108 | HARDWARE_INTRINSIC(NI_ARM64_Sha1Parity, Sha1, HashParity, Sha1HashOp, INS_invalid, INS_invalid, INS_sha1p, None ) |
109 | HARDWARE_INTRINSIC(NI_ARM64_Sha1Majority, Sha1, HashMajority, Sha1HashOp, INS_invalid, INS_invalid, INS_sha1m, None ) |
110 | HARDWARE_INTRINSIC(NI_ARM64_Sha1FixedRotate, Sha1, FixedRotate, Sha1RotateOp, INS_invalid, INS_invalid, INS_sha1h, None ) |
111 | HARDWARE_INTRINSIC(NI_ARM64_Sha1SchedulePart1, Sha1, SchedulePart1, SimdTernaryRMWOp, INS_invalid, INS_invalid, INS_sha1su0, None ) |
112 | HARDWARE_INTRINSIC(NI_ARM64_Sha1SchedulePart2, Sha1, SchedulePart2, SimdBinaryRMWOp, INS_invalid, INS_invalid, INS_sha1su1, None ) |
113 | |
114 | //Sha256 |
115 | HARDWARE_INTRINSIC(NI_ARM64_Sha256HashLower, Sha256, HashLower, SimdTernaryRMWOp, INS_invalid, INS_invalid, INS_sha256h, None ) |
116 | HARDWARE_INTRINSIC(NI_ARM64_Sha256HashUpper, Sha256, HashUpper, SimdTernaryRMWOp, INS_invalid, INS_invalid, INS_sha256h2, None ) |
117 | HARDWARE_INTRINSIC(NI_ARM64_Sha256SchedulePart1, Sha256, SchedulePart1, SimdBinaryRMWOp, INS_invalid, INS_invalid, INS_sha256su0, None ) |
118 | HARDWARE_INTRINSIC(NI_ARM64_Sha256SchedulePart2, Sha256, SchedulePart2, SimdTernaryRMWOp, INS_invalid, INS_invalid, INS_sha256su1, None ) |
119 | #endif |
120 | |
121 | |
122 | #undef HARDWARE_INTRINSIC_CLASS |
123 | #undef HARDWARE_INTRINSIC |
124 | |
125 | // clang-format on |
126 | |