1 | /** |
2 | * \file bn_mul.h |
3 | * |
4 | * \brief Multi-precision integer library |
5 | */ |
6 | /* |
7 | * Copyright The Mbed TLS Contributors |
8 | * SPDX-License-Identifier: Apache-2.0 |
9 | * |
10 | * Licensed under the Apache License, Version 2.0 (the "License"); you may |
11 | * not use this file except in compliance with the License. |
12 | * You may obtain a copy of the License at |
13 | * |
14 | * http://www.apache.org/licenses/LICENSE-2.0 |
15 | * |
16 | * Unless required by applicable law or agreed to in writing, software |
17 | * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT |
18 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
19 | * See the License for the specific language governing permissions and |
20 | * limitations under the License. |
21 | */ |
22 | /* |
23 | * Multiply source vector [s] with b, add result |
24 | * to destination vector [d] and set carry c. |
25 | * |
26 | * Currently supports: |
27 | * |
28 | * . IA-32 (386+) . AMD64 / EM64T |
29 | * . IA-32 (SSE2) . Motorola 68000 |
30 | * . PowerPC, 32-bit . MicroBlaze |
31 | * . PowerPC, 64-bit . TriCore |
32 | * . SPARC v8 . ARM v3+ |
33 | * . Alpha . MIPS32 |
34 | * . C, longlong . C, generic |
35 | */ |
36 | #ifndef MBEDTLS_BN_MUL_H |
37 | #define MBEDTLS_BN_MUL_H |
38 | |
39 | #if !defined(MBEDTLS_CONFIG_FILE) |
40 | #include "mbedtls/config.h" |
41 | #else |
42 | #include MBEDTLS_CONFIG_FILE |
43 | #endif |
44 | |
45 | #include "mbedtls/bignum.h" |
46 | |
47 | |
48 | /* |
49 | * Conversion macros for embedded constants: |
50 | * build lists of mbedtls_mpi_uint's from lists of unsigned char's grouped by 8, 4 or 2 |
51 | */ |
52 | #if defined(MBEDTLS_HAVE_INT32) |
53 | |
54 | #define MBEDTLS_BYTES_TO_T_UINT_4(a, b, c, d) \ |
55 | ((mbedtls_mpi_uint) (a) << 0) | \ |
56 | ((mbedtls_mpi_uint) (b) << 8) | \ |
57 | ((mbedtls_mpi_uint) (c) << 16) | \ |
58 | ((mbedtls_mpi_uint) (d) << 24) |
59 | |
60 | #define MBEDTLS_BYTES_TO_T_UINT_2(a, b) \ |
61 | MBEDTLS_BYTES_TO_T_UINT_4(a, b, 0, 0) |
62 | |
63 | #define MBEDTLS_BYTES_TO_T_UINT_8(a, b, c, d, e, f, g, h) \ |
64 | MBEDTLS_BYTES_TO_T_UINT_4(a, b, c, d), \ |
65 | MBEDTLS_BYTES_TO_T_UINT_4(e, f, g, h) |
66 | |
67 | #else /* 64-bits */ |
68 | |
69 | #define MBEDTLS_BYTES_TO_T_UINT_8(a, b, c, d, e, f, g, h) \ |
70 | ((mbedtls_mpi_uint) (a) << 0) | \ |
71 | ((mbedtls_mpi_uint) (b) << 8) | \ |
72 | ((mbedtls_mpi_uint) (c) << 16) | \ |
73 | ((mbedtls_mpi_uint) (d) << 24) | \ |
74 | ((mbedtls_mpi_uint) (e) << 32) | \ |
75 | ((mbedtls_mpi_uint) (f) << 40) | \ |
76 | ((mbedtls_mpi_uint) (g) << 48) | \ |
77 | ((mbedtls_mpi_uint) (h) << 56) |
78 | |
79 | #define MBEDTLS_BYTES_TO_T_UINT_4(a, b, c, d) \ |
80 | MBEDTLS_BYTES_TO_T_UINT_8(a, b, c, d, 0, 0, 0, 0) |
81 | |
82 | #define MBEDTLS_BYTES_TO_T_UINT_2(a, b) \ |
83 | MBEDTLS_BYTES_TO_T_UINT_8(a, b, 0, 0, 0, 0, 0, 0) |
84 | |
85 | #endif /* bits in mbedtls_mpi_uint */ |
86 | |
87 | /* *INDENT-OFF* */ |
88 | #if defined(MBEDTLS_HAVE_ASM) |
89 | |
90 | #ifndef asm |
91 | #define asm __asm |
92 | #endif |
93 | |
94 | /* armcc5 --gnu defines __GNUC__ but doesn't support GNU's extended asm */ |
95 | #if defined(__GNUC__) && \ |
96 | ( !defined(__ARMCC_VERSION) || __ARMCC_VERSION >= 6000000 ) |
97 | |
98 | /* |
99 | * GCC < 5.0 treated the x86 ebx (which is used for the GOT) as a |
100 | * fixed reserved register when building as PIC, leading to errors |
101 | * like: bn_mul.h:46:13: error: PIC register clobbered by 'ebx' in 'asm' |
102 | * |
103 | * This is fixed by an improved register allocator in GCC 5+. From the |
104 | * release notes: |
105 | * Register allocation improvements: Reuse of the PIC hard register, |
106 | * instead of using a fixed register, was implemented on x86/x86-64 |
107 | * targets. This improves generated PIC code performance as more hard |
108 | * registers can be used. |
109 | */ |
110 | #if defined(__GNUC__) && __GNUC__ < 5 && defined(__PIC__) |
111 | #define MULADDC_CANNOT_USE_EBX |
112 | #endif |
113 | |
114 | /* |
115 | * Disable use of the i386 assembly code below if option -O0, to disable all |
116 | * compiler optimisations, is passed, detected with __OPTIMIZE__ |
117 | * This is done as the number of registers used in the assembly code doesn't |
118 | * work with the -O0 option. |
119 | */ |
120 | #if defined(__i386__) && defined(__OPTIMIZE__) && !defined(MULADDC_CANNOT_USE_EBX) |
121 | |
122 | #define MULADDC_INIT \ |
123 | asm( \ |
124 | "movl %%ebx, %0 \n\t" \ |
125 | "movl %5, %%esi \n\t" \ |
126 | "movl %6, %%edi \n\t" \ |
127 | "movl %7, %%ecx \n\t" \ |
128 | "movl %8, %%ebx \n\t" |
129 | |
130 | #define MULADDC_CORE \ |
131 | "lodsl \n\t" \ |
132 | "mull %%ebx \n\t" \ |
133 | "addl %%ecx, %%eax \n\t" \ |
134 | "adcl $0, %%edx \n\t" \ |
135 | "addl (%%edi), %%eax \n\t" \ |
136 | "adcl $0, %%edx \n\t" \ |
137 | "movl %%edx, %%ecx \n\t" \ |
138 | "stosl \n\t" |
139 | |
140 | #if defined(MBEDTLS_HAVE_SSE2) |
141 | |
142 | #define MULADDC_HUIT \ |
143 | "movd %%ecx, %%mm1 \n\t" \ |
144 | "movd %%ebx, %%mm0 \n\t" \ |
145 | "movd (%%edi), %%mm3 \n\t" \ |
146 | "paddq %%mm3, %%mm1 \n\t" \ |
147 | "movd (%%esi), %%mm2 \n\t" \ |
148 | "pmuludq %%mm0, %%mm2 \n\t" \ |
149 | "movd 4(%%esi), %%mm4 \n\t" \ |
150 | "pmuludq %%mm0, %%mm4 \n\t" \ |
151 | "movd 8(%%esi), %%mm6 \n\t" \ |
152 | "pmuludq %%mm0, %%mm6 \n\t" \ |
153 | "movd 12(%%esi), %%mm7 \n\t" \ |
154 | "pmuludq %%mm0, %%mm7 \n\t" \ |
155 | "paddq %%mm2, %%mm1 \n\t" \ |
156 | "movd 4(%%edi), %%mm3 \n\t" \ |
157 | "paddq %%mm4, %%mm3 \n\t" \ |
158 | "movd 8(%%edi), %%mm5 \n\t" \ |
159 | "paddq %%mm6, %%mm5 \n\t" \ |
160 | "movd 12(%%edi), %%mm4 \n\t" \ |
161 | "paddq %%mm4, %%mm7 \n\t" \ |
162 | "movd %%mm1, (%%edi) \n\t" \ |
163 | "movd 16(%%esi), %%mm2 \n\t" \ |
164 | "pmuludq %%mm0, %%mm2 \n\t" \ |
165 | "psrlq $32, %%mm1 \n\t" \ |
166 | "movd 20(%%esi), %%mm4 \n\t" \ |
167 | "pmuludq %%mm0, %%mm4 \n\t" \ |
168 | "paddq %%mm3, %%mm1 \n\t" \ |
169 | "movd 24(%%esi), %%mm6 \n\t" \ |
170 | "pmuludq %%mm0, %%mm6 \n\t" \ |
171 | "movd %%mm1, 4(%%edi) \n\t" \ |
172 | "psrlq $32, %%mm1 \n\t" \ |
173 | "movd 28(%%esi), %%mm3 \n\t" \ |
174 | "pmuludq %%mm0, %%mm3 \n\t" \ |
175 | "paddq %%mm5, %%mm1 \n\t" \ |
176 | "movd 16(%%edi), %%mm5 \n\t" \ |
177 | "paddq %%mm5, %%mm2 \n\t" \ |
178 | "movd %%mm1, 8(%%edi) \n\t" \ |
179 | "psrlq $32, %%mm1 \n\t" \ |
180 | "paddq %%mm7, %%mm1 \n\t" \ |
181 | "movd 20(%%edi), %%mm5 \n\t" \ |
182 | "paddq %%mm5, %%mm4 \n\t" \ |
183 | "movd %%mm1, 12(%%edi) \n\t" \ |
184 | "psrlq $32, %%mm1 \n\t" \ |
185 | "paddq %%mm2, %%mm1 \n\t" \ |
186 | "movd 24(%%edi), %%mm5 \n\t" \ |
187 | "paddq %%mm5, %%mm6 \n\t" \ |
188 | "movd %%mm1, 16(%%edi) \n\t" \ |
189 | "psrlq $32, %%mm1 \n\t" \ |
190 | "paddq %%mm4, %%mm1 \n\t" \ |
191 | "movd 28(%%edi), %%mm5 \n\t" \ |
192 | "paddq %%mm5, %%mm3 \n\t" \ |
193 | "movd %%mm1, 20(%%edi) \n\t" \ |
194 | "psrlq $32, %%mm1 \n\t" \ |
195 | "paddq %%mm6, %%mm1 \n\t" \ |
196 | "movd %%mm1, 24(%%edi) \n\t" \ |
197 | "psrlq $32, %%mm1 \n\t" \ |
198 | "paddq %%mm3, %%mm1 \n\t" \ |
199 | "movd %%mm1, 28(%%edi) \n\t" \ |
200 | "addl $32, %%edi \n\t" \ |
201 | "addl $32, %%esi \n\t" \ |
202 | "psrlq $32, %%mm1 \n\t" \ |
203 | "movd %%mm1, %%ecx \n\t" |
204 | |
205 | #define MULADDC_STOP \ |
206 | "emms \n\t" \ |
207 | "movl %4, %%ebx \n\t" \ |
208 | "movl %%ecx, %1 \n\t" \ |
209 | "movl %%edi, %2 \n\t" \ |
210 | "movl %%esi, %3 \n\t" \ |
211 | : "=m" (t), "=m" (c), "=m" (d), "=m" (s) \ |
212 | : "m" (t), "m" (s), "m" (d), "m" (c), "m" (b) \ |
213 | : "eax", "ebx", "ecx", "edx", "esi", "edi" \ |
214 | ); |
215 | |
216 | #else |
217 | |
218 | #define MULADDC_STOP \ |
219 | "movl %4, %%ebx \n\t" \ |
220 | "movl %%ecx, %1 \n\t" \ |
221 | "movl %%edi, %2 \n\t" \ |
222 | "movl %%esi, %3 \n\t" \ |
223 | : "=m" (t), "=m" (c), "=m" (d), "=m" (s) \ |
224 | : "m" (t), "m" (s), "m" (d), "m" (c), "m" (b) \ |
225 | : "eax", "ebx", "ecx", "edx", "esi", "edi" \ |
226 | ); |
227 | #endif /* SSE2 */ |
228 | #endif /* i386 */ |
229 | |
230 | #if defined(__amd64__) || defined (__x86_64__) |
231 | |
232 | #define MULADDC_INIT \ |
233 | asm( \ |
234 | "xorq %%r8, %%r8\n" |
235 | |
236 | #define MULADDC_CORE \ |
237 | "movq (%%rsi), %%rax\n" \ |
238 | "mulq %%rbx\n" \ |
239 | "addq $8, %%rsi\n" \ |
240 | "addq %%rcx, %%rax\n" \ |
241 | "movq %%r8, %%rcx\n" \ |
242 | "adcq $0, %%rdx\n" \ |
243 | "nop \n" \ |
244 | "addq %%rax, (%%rdi)\n" \ |
245 | "adcq %%rdx, %%rcx\n" \ |
246 | "addq $8, %%rdi\n" |
247 | |
248 | #define MULADDC_STOP \ |
249 | : "+c" (c), "+D" (d), "+S" (s), "+m" (*(uint64_t (*)[16]) d) \ |
250 | : "b" (b), "m" (*(const uint64_t (*)[16]) s) \ |
251 | : "rax", "rdx", "r8" \ |
252 | ); |
253 | |
254 | #endif /* AMD64 */ |
255 | |
256 | #if defined(__aarch64__) |
257 | |
258 | #define MULADDC_INIT \ |
259 | asm( |
260 | |
261 | #define MULADDC_CORE \ |
262 | "ldr x4, [%2], #8 \n\t" \ |
263 | "ldr x5, [%1] \n\t" \ |
264 | "mul x6, x4, %4 \n\t" \ |
265 | "umulh x7, x4, %4 \n\t" \ |
266 | "adds x5, x5, x6 \n\t" \ |
267 | "adc x7, x7, xzr \n\t" \ |
268 | "adds x5, x5, %0 \n\t" \ |
269 | "adc %0, x7, xzr \n\t" \ |
270 | "str x5, [%1], #8 \n\t" |
271 | |
272 | #define MULADDC_STOP \ |
273 | : "+r" (c), "+r" (d), "+r" (s), "+m" (*(uint64_t (*)[16]) d) \ |
274 | : "r" (b), "m" (*(const uint64_t (*)[16]) s) \ |
275 | : "x4", "x5", "x6", "x7", "cc" \ |
276 | ); |
277 | |
278 | #endif /* Aarch64 */ |
279 | |
280 | #if defined(__mc68020__) || defined(__mcpu32__) |
281 | |
282 | #define MULADDC_INIT \ |
283 | asm( \ |
284 | "movl %3, %%a2 \n\t" \ |
285 | "movl %4, %%a3 \n\t" \ |
286 | "movl %5, %%d3 \n\t" \ |
287 | "movl %6, %%d2 \n\t" \ |
288 | "moveq #0, %%d0 \n\t" |
289 | |
290 | #define MULADDC_CORE \ |
291 | "movel %%a2@+, %%d1 \n\t" \ |
292 | "mulul %%d2, %%d4:%%d1 \n\t" \ |
293 | "addl %%d3, %%d1 \n\t" \ |
294 | "addxl %%d0, %%d4 \n\t" \ |
295 | "moveq #0, %%d3 \n\t" \ |
296 | "addl %%d1, %%a3@+ \n\t" \ |
297 | "addxl %%d4, %%d3 \n\t" |
298 | |
299 | #define MULADDC_STOP \ |
300 | "movl %%d3, %0 \n\t" \ |
301 | "movl %%a3, %1 \n\t" \ |
302 | "movl %%a2, %2 \n\t" \ |
303 | : "=m" (c), "=m" (d), "=m" (s) \ |
304 | : "m" (s), "m" (d), "m" (c), "m" (b) \ |
305 | : "d0", "d1", "d2", "d3", "d4", "a2", "a3" \ |
306 | ); |
307 | |
308 | #define MULADDC_HUIT \ |
309 | "movel %%a2@+, %%d1 \n\t" \ |
310 | "mulul %%d2, %%d4:%%d1 \n\t" \ |
311 | "addxl %%d3, %%d1 \n\t" \ |
312 | "addxl %%d0, %%d4 \n\t" \ |
313 | "addl %%d1, %%a3@+ \n\t" \ |
314 | "movel %%a2@+, %%d1 \n\t" \ |
315 | "mulul %%d2, %%d3:%%d1 \n\t" \ |
316 | "addxl %%d4, %%d1 \n\t" \ |
317 | "addxl %%d0, %%d3 \n\t" \ |
318 | "addl %%d1, %%a3@+ \n\t" \ |
319 | "movel %%a2@+, %%d1 \n\t" \ |
320 | "mulul %%d2, %%d4:%%d1 \n\t" \ |
321 | "addxl %%d3, %%d1 \n\t" \ |
322 | "addxl %%d0, %%d4 \n\t" \ |
323 | "addl %%d1, %%a3@+ \n\t" \ |
324 | "movel %%a2@+, %%d1 \n\t" \ |
325 | "mulul %%d2, %%d3:%%d1 \n\t" \ |
326 | "addxl %%d4, %%d1 \n\t" \ |
327 | "addxl %%d0, %%d3 \n\t" \ |
328 | "addl %%d1, %%a3@+ \n\t" \ |
329 | "movel %%a2@+, %%d1 \n\t" \ |
330 | "mulul %%d2, %%d4:%%d1 \n\t" \ |
331 | "addxl %%d3, %%d1 \n\t" \ |
332 | "addxl %%d0, %%d4 \n\t" \ |
333 | "addl %%d1, %%a3@+ \n\t" \ |
334 | "movel %%a2@+, %%d1 \n\t" \ |
335 | "mulul %%d2, %%d3:%%d1 \n\t" \ |
336 | "addxl %%d4, %%d1 \n\t" \ |
337 | "addxl %%d0, %%d3 \n\t" \ |
338 | "addl %%d1, %%a3@+ \n\t" \ |
339 | "movel %%a2@+, %%d1 \n\t" \ |
340 | "mulul %%d2, %%d4:%%d1 \n\t" \ |
341 | "addxl %%d3, %%d1 \n\t" \ |
342 | "addxl %%d0, %%d4 \n\t" \ |
343 | "addl %%d1, %%a3@+ \n\t" \ |
344 | "movel %%a2@+, %%d1 \n\t" \ |
345 | "mulul %%d2, %%d3:%%d1 \n\t" \ |
346 | "addxl %%d4, %%d1 \n\t" \ |
347 | "addxl %%d0, %%d3 \n\t" \ |
348 | "addl %%d1, %%a3@+ \n\t" \ |
349 | "addxl %%d0, %%d3 \n\t" |
350 | |
351 | #endif /* MC68000 */ |
352 | |
353 | #if defined(__powerpc64__) || defined(__ppc64__) |
354 | |
355 | #if defined(__MACH__) && defined(__APPLE__) |
356 | |
357 | #define MULADDC_INIT \ |
358 | asm( \ |
359 | "ld r3, %3 \n\t" \ |
360 | "ld r4, %4 \n\t" \ |
361 | "ld r5, %5 \n\t" \ |
362 | "ld r6, %6 \n\t" \ |
363 | "addi r3, r3, -8 \n\t" \ |
364 | "addi r4, r4, -8 \n\t" \ |
365 | "addic r5, r5, 0 \n\t" |
366 | |
367 | #define MULADDC_CORE \ |
368 | "ldu r7, 8(r3) \n\t" \ |
369 | "mulld r8, r7, r6 \n\t" \ |
370 | "mulhdu r9, r7, r6 \n\t" \ |
371 | "adde r8, r8, r5 \n\t" \ |
372 | "ld r7, 8(r4) \n\t" \ |
373 | "addze r5, r9 \n\t" \ |
374 | "addc r8, r8, r7 \n\t" \ |
375 | "stdu r8, 8(r4) \n\t" |
376 | |
377 | #define MULADDC_STOP \ |
378 | "addze r5, r5 \n\t" \ |
379 | "addi r4, r4, 8 \n\t" \ |
380 | "addi r3, r3, 8 \n\t" \ |
381 | "std r5, %0 \n\t" \ |
382 | "std r4, %1 \n\t" \ |
383 | "std r3, %2 \n\t" \ |
384 | : "=m" (c), "=m" (d), "=m" (s) \ |
385 | : "m" (s), "m" (d), "m" (c), "m" (b) \ |
386 | : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \ |
387 | ); |
388 | |
389 | |
390 | #else /* __MACH__ && __APPLE__ */ |
391 | |
392 | #define MULADDC_INIT \ |
393 | asm( \ |
394 | "ld %%r3, %3 \n\t" \ |
395 | "ld %%r4, %4 \n\t" \ |
396 | "ld %%r5, %5 \n\t" \ |
397 | "ld %%r6, %6 \n\t" \ |
398 | "addi %%r3, %%r3, -8 \n\t" \ |
399 | "addi %%r4, %%r4, -8 \n\t" \ |
400 | "addic %%r5, %%r5, 0 \n\t" |
401 | |
402 | #define MULADDC_CORE \ |
403 | "ldu %%r7, 8(%%r3) \n\t" \ |
404 | "mulld %%r8, %%r7, %%r6 \n\t" \ |
405 | "mulhdu %%r9, %%r7, %%r6 \n\t" \ |
406 | "adde %%r8, %%r8, %%r5 \n\t" \ |
407 | "ld %%r7, 8(%%r4) \n\t" \ |
408 | "addze %%r5, %%r9 \n\t" \ |
409 | "addc %%r8, %%r8, %%r7 \n\t" \ |
410 | "stdu %%r8, 8(%%r4) \n\t" |
411 | |
412 | #define MULADDC_STOP \ |
413 | "addze %%r5, %%r5 \n\t" \ |
414 | "addi %%r4, %%r4, 8 \n\t" \ |
415 | "addi %%r3, %%r3, 8 \n\t" \ |
416 | "std %%r5, %0 \n\t" \ |
417 | "std %%r4, %1 \n\t" \ |
418 | "std %%r3, %2 \n\t" \ |
419 | : "=m" (c), "=m" (d), "=m" (s) \ |
420 | : "m" (s), "m" (d), "m" (c), "m" (b) \ |
421 | : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \ |
422 | ); |
423 | |
424 | #endif /* __MACH__ && __APPLE__ */ |
425 | |
426 | #elif defined(__powerpc__) || defined(__ppc__) /* end PPC64/begin PPC32 */ |
427 | |
428 | #if defined(__MACH__) && defined(__APPLE__) |
429 | |
430 | #define MULADDC_INIT \ |
431 | asm( \ |
432 | "lwz r3, %3 \n\t" \ |
433 | "lwz r4, %4 \n\t" \ |
434 | "lwz r5, %5 \n\t" \ |
435 | "lwz r6, %6 \n\t" \ |
436 | "addi r3, r3, -4 \n\t" \ |
437 | "addi r4, r4, -4 \n\t" \ |
438 | "addic r5, r5, 0 \n\t" |
439 | |
440 | #define MULADDC_CORE \ |
441 | "lwzu r7, 4(r3) \n\t" \ |
442 | "mullw r8, r7, r6 \n\t" \ |
443 | "mulhwu r9, r7, r6 \n\t" \ |
444 | "adde r8, r8, r5 \n\t" \ |
445 | "lwz r7, 4(r4) \n\t" \ |
446 | "addze r5, r9 \n\t" \ |
447 | "addc r8, r8, r7 \n\t" \ |
448 | "stwu r8, 4(r4) \n\t" |
449 | |
450 | #define MULADDC_STOP \ |
451 | "addze r5, r5 \n\t" \ |
452 | "addi r4, r4, 4 \n\t" \ |
453 | "addi r3, r3, 4 \n\t" \ |
454 | "stw r5, %0 \n\t" \ |
455 | "stw r4, %1 \n\t" \ |
456 | "stw r3, %2 \n\t" \ |
457 | : "=m" (c), "=m" (d), "=m" (s) \ |
458 | : "m" (s), "m" (d), "m" (c), "m" (b) \ |
459 | : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \ |
460 | ); |
461 | |
462 | #else /* __MACH__ && __APPLE__ */ |
463 | |
464 | #define MULADDC_INIT \ |
465 | asm( \ |
466 | "lwz %%r3, %3 \n\t" \ |
467 | "lwz %%r4, %4 \n\t" \ |
468 | "lwz %%r5, %5 \n\t" \ |
469 | "lwz %%r6, %6 \n\t" \ |
470 | "addi %%r3, %%r3, -4 \n\t" \ |
471 | "addi %%r4, %%r4, -4 \n\t" \ |
472 | "addic %%r5, %%r5, 0 \n\t" |
473 | |
474 | #define MULADDC_CORE \ |
475 | "lwzu %%r7, 4(%%r3) \n\t" \ |
476 | "mullw %%r8, %%r7, %%r6 \n\t" \ |
477 | "mulhwu %%r9, %%r7, %%r6 \n\t" \ |
478 | "adde %%r8, %%r8, %%r5 \n\t" \ |
479 | "lwz %%r7, 4(%%r4) \n\t" \ |
480 | "addze %%r5, %%r9 \n\t" \ |
481 | "addc %%r8, %%r8, %%r7 \n\t" \ |
482 | "stwu %%r8, 4(%%r4) \n\t" |
483 | |
484 | #define MULADDC_STOP \ |
485 | "addze %%r5, %%r5 \n\t" \ |
486 | "addi %%r4, %%r4, 4 \n\t" \ |
487 | "addi %%r3, %%r3, 4 \n\t" \ |
488 | "stw %%r5, %0 \n\t" \ |
489 | "stw %%r4, %1 \n\t" \ |
490 | "stw %%r3, %2 \n\t" \ |
491 | : "=m" (c), "=m" (d), "=m" (s) \ |
492 | : "m" (s), "m" (d), "m" (c), "m" (b) \ |
493 | : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \ |
494 | ); |
495 | |
496 | #endif /* __MACH__ && __APPLE__ */ |
497 | |
498 | #endif /* PPC32 */ |
499 | |
500 | /* |
501 | * The Sparc(64) assembly is reported to be broken. |
502 | * Disable it for now, until we're able to fix it. |
503 | */ |
504 | #if 0 && defined(__sparc__) |
505 | #if defined(__sparc64__) |
506 | |
507 | #define MULADDC_INIT \ |
508 | asm( \ |
509 | "ldx %3, %%o0 \n\t" \ |
510 | "ldx %4, %%o1 \n\t" \ |
511 | "ld %5, %%o2 \n\t" \ |
512 | "ld %6, %%o3 \n\t" |
513 | |
514 | #define MULADDC_CORE \ |
515 | "ld [%%o0], %%o4 \n\t" \ |
516 | "inc 4, %%o0 \n\t" \ |
517 | "ld [%%o1], %%o5 \n\t" \ |
518 | "umul %%o3, %%o4, %%o4 \n\t" \ |
519 | "addcc %%o4, %%o2, %%o4 \n\t" \ |
520 | "rd %%y, %%g1 \n\t" \ |
521 | "addx %%g1, 0, %%g1 \n\t" \ |
522 | "addcc %%o4, %%o5, %%o4 \n\t" \ |
523 | "st %%o4, [%%o1] \n\t" \ |
524 | "addx %%g1, 0, %%o2 \n\t" \ |
525 | "inc 4, %%o1 \n\t" |
526 | |
527 | #define MULADDC_STOP \ |
528 | "st %%o2, %0 \n\t" \ |
529 | "stx %%o1, %1 \n\t" \ |
530 | "stx %%o0, %2 \n\t" \ |
531 | : "=m" (c), "=m" (d), "=m" (s) \ |
532 | : "m" (s), "m" (d), "m" (c), "m" (b) \ |
533 | : "g1", "o0", "o1", "o2", "o3", "o4", \ |
534 | "o5" \ |
535 | ); |
536 | |
537 | #else /* __sparc64__ */ |
538 | |
539 | #define MULADDC_INIT \ |
540 | asm( \ |
541 | "ld %3, %%o0 \n\t" \ |
542 | "ld %4, %%o1 \n\t" \ |
543 | "ld %5, %%o2 \n\t" \ |
544 | "ld %6, %%o3 \n\t" |
545 | |
546 | #define MULADDC_CORE \ |
547 | "ld [%%o0], %%o4 \n\t" \ |
548 | "inc 4, %%o0 \n\t" \ |
549 | "ld [%%o1], %%o5 \n\t" \ |
550 | "umul %%o3, %%o4, %%o4 \n\t" \ |
551 | "addcc %%o4, %%o2, %%o4 \n\t" \ |
552 | "rd %%y, %%g1 \n\t" \ |
553 | "addx %%g1, 0, %%g1 \n\t" \ |
554 | "addcc %%o4, %%o5, %%o4 \n\t" \ |
555 | "st %%o4, [%%o1] \n\t" \ |
556 | "addx %%g1, 0, %%o2 \n\t" \ |
557 | "inc 4, %%o1 \n\t" |
558 | |
559 | #define MULADDC_STOP \ |
560 | "st %%o2, %0 \n\t" \ |
561 | "st %%o1, %1 \n\t" \ |
562 | "st %%o0, %2 \n\t" \ |
563 | : "=m" (c), "=m" (d), "=m" (s) \ |
564 | : "m" (s), "m" (d), "m" (c), "m" (b) \ |
565 | : "g1", "o0", "o1", "o2", "o3", "o4", \ |
566 | "o5" \ |
567 | ); |
568 | |
569 | #endif /* __sparc64__ */ |
570 | #endif /* __sparc__ */ |
571 | |
572 | #if defined(__microblaze__) || defined(microblaze) |
573 | |
574 | #define MULADDC_INIT \ |
575 | asm( \ |
576 | "lwi r3, %3 \n\t" \ |
577 | "lwi r4, %4 \n\t" \ |
578 | "lwi r5, %5 \n\t" \ |
579 | "lwi r6, %6 \n\t" \ |
580 | "andi r7, r6, 0xffff \n\t" \ |
581 | "bsrli r6, r6, 16 \n\t" |
582 | |
583 | #if(__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__) |
584 | #define MULADDC_LHUI \ |
585 | "lhui r9, r3, 0 \n\t" \ |
586 | "addi r3, r3, 2 \n\t" \ |
587 | "lhui r8, r3, 0 \n\t" |
588 | #else |
589 | #define MULADDC_LHUI \ |
590 | "lhui r8, r3, 0 \n\t" \ |
591 | "addi r3, r3, 2 \n\t" \ |
592 | "lhui r9, r3, 0 \n\t" |
593 | #endif |
594 | |
595 | #define MULADDC_CORE \ |
596 | MULADDC_LHUI \ |
597 | "addi r3, r3, 2 \n\t" \ |
598 | "mul r10, r9, r6 \n\t" \ |
599 | "mul r11, r8, r7 \n\t" \ |
600 | "mul r12, r9, r7 \n\t" \ |
601 | "mul r13, r8, r6 \n\t" \ |
602 | "bsrli r8, r10, 16 \n\t" \ |
603 | "bsrli r9, r11, 16 \n\t" \ |
604 | "add r13, r13, r8 \n\t" \ |
605 | "add r13, r13, r9 \n\t" \ |
606 | "bslli r10, r10, 16 \n\t" \ |
607 | "bslli r11, r11, 16 \n\t" \ |
608 | "add r12, r12, r10 \n\t" \ |
609 | "addc r13, r13, r0 \n\t" \ |
610 | "add r12, r12, r11 \n\t" \ |
611 | "addc r13, r13, r0 \n\t" \ |
612 | "lwi r10, r4, 0 \n\t" \ |
613 | "add r12, r12, r10 \n\t" \ |
614 | "addc r13, r13, r0 \n\t" \ |
615 | "add r12, r12, r5 \n\t" \ |
616 | "addc r5, r13, r0 \n\t" \ |
617 | "swi r12, r4, 0 \n\t" \ |
618 | "addi r4, r4, 4 \n\t" |
619 | |
620 | #define MULADDC_STOP \ |
621 | "swi r5, %0 \n\t" \ |
622 | "swi r4, %1 \n\t" \ |
623 | "swi r3, %2 \n\t" \ |
624 | : "=m" (c), "=m" (d), "=m" (s) \ |
625 | : "m" (s), "m" (d), "m" (c), "m" (b) \ |
626 | : "r3", "r4", "r5", "r6", "r7", "r8", \ |
627 | "r9", "r10", "r11", "r12", "r13" \ |
628 | ); |
629 | |
630 | #endif /* MicroBlaze */ |
631 | |
632 | #if defined(__tricore__) |
633 | |
634 | #define MULADDC_INIT \ |
635 | asm( \ |
636 | "ld.a %%a2, %3 \n\t" \ |
637 | "ld.a %%a3, %4 \n\t" \ |
638 | "ld.w %%d4, %5 \n\t" \ |
639 | "ld.w %%d1, %6 \n\t" \ |
640 | "xor %%d5, %%d5 \n\t" |
641 | |
642 | #define MULADDC_CORE \ |
643 | "ld.w %%d0, [%%a2+] \n\t" \ |
644 | "madd.u %%e2, %%e4, %%d0, %%d1 \n\t" \ |
645 | "ld.w %%d0, [%%a3] \n\t" \ |
646 | "addx %%d2, %%d2, %%d0 \n\t" \ |
647 | "addc %%d3, %%d3, 0 \n\t" \ |
648 | "mov %%d4, %%d3 \n\t" \ |
649 | "st.w [%%a3+], %%d2 \n\t" |
650 | |
651 | #define MULADDC_STOP \ |
652 | "st.w %0, %%d4 \n\t" \ |
653 | "st.a %1, %%a3 \n\t" \ |
654 | "st.a %2, %%a2 \n\t" \ |
655 | : "=m" (c), "=m" (d), "=m" (s) \ |
656 | : "m" (s), "m" (d), "m" (c), "m" (b) \ |
657 | : "d0", "d1", "e2", "d4", "a2", "a3" \ |
658 | ); |
659 | |
660 | #endif /* TriCore */ |
661 | |
662 | /* |
663 | * Note, gcc -O0 by default uses r7 for the frame pointer, so it complains about |
664 | * our use of r7 below, unless -fomit-frame-pointer is passed. |
665 | * |
666 | * On the other hand, -fomit-frame-pointer is implied by any -Ox options with |
667 | * x !=0, which we can detect using __OPTIMIZE__ (which is also defined by |
668 | * clang and armcc5 under the same conditions). |
669 | * |
670 | * So, only use the optimized assembly below for optimized build, which avoids |
671 | * the build error and is pretty reasonable anyway. |
672 | */ |
673 | #if defined(__GNUC__) && !defined(__OPTIMIZE__) |
674 | #define MULADDC_CANNOT_USE_R7 |
675 | #endif |
676 | |
677 | #if defined(__arm__) && !defined(MULADDC_CANNOT_USE_R7) |
678 | |
679 | #if defined(__thumb__) && !defined(__thumb2__) |
680 | #if !defined(__ARMCC_VERSION) && !defined(__clang__) \ |
681 | && !defined(__llvm__) && !defined(__INTEL_COMPILER) |
682 | /* |
683 | * Thumb 1 ISA. This code path has only been tested successfully on gcc; |
684 | * it does not compile on clang or armclang. |
685 | * |
686 | * Other compilers which define __GNUC__ may not work. The above macro |
687 | * attempts to exclude these untested compilers. |
688 | */ |
689 | |
690 | #define MULADDC_INIT \ |
691 | asm( \ |
692 | "ldr r0, %3 \n\t" \ |
693 | "ldr r1, %4 \n\t" \ |
694 | "ldr r2, %5 \n\t" \ |
695 | "ldr r3, %6 \n\t" \ |
696 | "lsr r7, r3, #16 \n\t" \ |
697 | "mov r9, r7 \n\t" \ |
698 | "lsl r7, r3, #16 \n\t" \ |
699 | "lsr r7, r7, #16 \n\t" \ |
700 | "mov r8, r7 \n\t" |
701 | |
702 | #define MULADDC_CORE \ |
703 | "ldmia r0!, {r6} \n\t" \ |
704 | "lsr r7, r6, #16 \n\t" \ |
705 | "lsl r6, r6, #16 \n\t" \ |
706 | "lsr r6, r6, #16 \n\t" \ |
707 | "mov r4, r8 \n\t" \ |
708 | "mul r4, r6 \n\t" \ |
709 | "mov r3, r9 \n\t" \ |
710 | "mul r6, r3 \n\t" \ |
711 | "mov r5, r9 \n\t" \ |
712 | "mul r5, r7 \n\t" \ |
713 | "mov r3, r8 \n\t" \ |
714 | "mul r7, r3 \n\t" \ |
715 | "lsr r3, r6, #16 \n\t" \ |
716 | "add r5, r5, r3 \n\t" \ |
717 | "lsr r3, r7, #16 \n\t" \ |
718 | "add r5, r5, r3 \n\t" \ |
719 | "add r4, r4, r2 \n\t" \ |
720 | "mov r2, #0 \n\t" \ |
721 | "adc r5, r2 \n\t" \ |
722 | "lsl r3, r6, #16 \n\t" \ |
723 | "add r4, r4, r3 \n\t" \ |
724 | "adc r5, r2 \n\t" \ |
725 | "lsl r3, r7, #16 \n\t" \ |
726 | "add r4, r4, r3 \n\t" \ |
727 | "adc r5, r2 \n\t" \ |
728 | "ldr r3, [r1] \n\t" \ |
729 | "add r4, r4, r3 \n\t" \ |
730 | "adc r2, r5 \n\t" \ |
731 | "stmia r1!, {r4} \n\t" |
732 | |
733 | #define MULADDC_STOP \ |
734 | "str r2, %0 \n\t" \ |
735 | "str r1, %1 \n\t" \ |
736 | "str r0, %2 \n\t" \ |
737 | : "=m" (c), "=m" (d), "=m" (s) \ |
738 | : "m" (s), "m" (d), "m" (c), "m" (b) \ |
739 | : "r0", "r1", "r2", "r3", "r4", "r5", \ |
740 | "r6", "r7", "r8", "r9", "cc" \ |
741 | ); |
742 | |
743 | #endif /* Compiler is gcc */ |
744 | |
745 | #elif (__ARM_ARCH >= 6) && \ |
746 | defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1) |
747 | |
748 | #define MULADDC_INIT \ |
749 | asm( |
750 | |
751 | #define MULADDC_CORE \ |
752 | "ldr r0, [%0], #4 \n\t" \ |
753 | "ldr r1, [%1] \n\t" \ |
754 | "umaal r1, %2, %3, r0 \n\t" \ |
755 | "str r1, [%1], #4 \n\t" |
756 | |
757 | #define MULADDC_STOP \ |
758 | : "=r" (s), "=r" (d), "=r" (c) \ |
759 | : "r" (b), "0" (s), "1" (d), "2" (c) \ |
760 | : "r0", "r1", "memory" \ |
761 | ); |
762 | |
763 | #else |
764 | |
765 | #define MULADDC_INIT \ |
766 | asm( \ |
767 | "ldr r0, %3 \n\t" \ |
768 | "ldr r1, %4 \n\t" \ |
769 | "ldr r2, %5 \n\t" \ |
770 | "ldr r3, %6 \n\t" |
771 | |
772 | #define MULADDC_CORE \ |
773 | "ldr r4, [r0], #4 \n\t" \ |
774 | "mov r5, #0 \n\t" \ |
775 | "ldr r6, [r1] \n\t" \ |
776 | "umlal r2, r5, r3, r4 \n\t" \ |
777 | "adds r7, r6, r2 \n\t" \ |
778 | "adc r2, r5, #0 \n\t" \ |
779 | "str r7, [r1], #4 \n\t" |
780 | |
781 | #define MULADDC_STOP \ |
782 | "str r2, %0 \n\t" \ |
783 | "str r1, %1 \n\t" \ |
784 | "str r0, %2 \n\t" \ |
785 | : "=m" (c), "=m" (d), "=m" (s) \ |
786 | : "m" (s), "m" (d), "m" (c), "m" (b) \ |
787 | : "r0", "r1", "r2", "r3", "r4", "r5", \ |
788 | "r6", "r7", "cc" \ |
789 | ); |
790 | |
791 | #endif /* Thumb */ |
792 | |
793 | #endif /* ARMv3 */ |
794 | |
795 | #if defined(__alpha__) |
796 | |
797 | #define MULADDC_INIT \ |
798 | asm( \ |
799 | "ldq $1, %3 \n\t" \ |
800 | "ldq $2, %4 \n\t" \ |
801 | "ldq $3, %5 \n\t" \ |
802 | "ldq $4, %6 \n\t" |
803 | |
804 | #define MULADDC_CORE \ |
805 | "ldq $6, 0($1) \n\t" \ |
806 | "addq $1, 8, $1 \n\t" \ |
807 | "mulq $6, $4, $7 \n\t" \ |
808 | "umulh $6, $4, $6 \n\t" \ |
809 | "addq $7, $3, $7 \n\t" \ |
810 | "cmpult $7, $3, $3 \n\t" \ |
811 | "ldq $5, 0($2) \n\t" \ |
812 | "addq $7, $5, $7 \n\t" \ |
813 | "cmpult $7, $5, $5 \n\t" \ |
814 | "stq $7, 0($2) \n\t" \ |
815 | "addq $2, 8, $2 \n\t" \ |
816 | "addq $6, $3, $3 \n\t" \ |
817 | "addq $5, $3, $3 \n\t" |
818 | |
819 | #define MULADDC_STOP \ |
820 | "stq $3, %0 \n\t" \ |
821 | "stq $2, %1 \n\t" \ |
822 | "stq $1, %2 \n\t" \ |
823 | : "=m" (c), "=m" (d), "=m" (s) \ |
824 | : "m" (s), "m" (d), "m" (c), "m" (b) \ |
825 | : "$1", "$2", "$3", "$4", "$5", "$6", "$7" \ |
826 | ); |
827 | #endif /* Alpha */ |
828 | |
829 | #if defined(__mips__) && !defined(__mips64) |
830 | |
831 | #define MULADDC_INIT \ |
832 | asm( \ |
833 | "lw $10, %3 \n\t" \ |
834 | "lw $11, %4 \n\t" \ |
835 | "lw $12, %5 \n\t" \ |
836 | "lw $13, %6 \n\t" |
837 | |
838 | #define MULADDC_CORE \ |
839 | "lw $14, 0($10) \n\t" \ |
840 | "multu $13, $14 \n\t" \ |
841 | "addi $10, $10, 4 \n\t" \ |
842 | "mflo $14 \n\t" \ |
843 | "mfhi $9 \n\t" \ |
844 | "addu $14, $12, $14 \n\t" \ |
845 | "lw $15, 0($11) \n\t" \ |
846 | "sltu $12, $14, $12 \n\t" \ |
847 | "addu $15, $14, $15 \n\t" \ |
848 | "sltu $14, $15, $14 \n\t" \ |
849 | "addu $12, $12, $9 \n\t" \ |
850 | "sw $15, 0($11) \n\t" \ |
851 | "addu $12, $12, $14 \n\t" \ |
852 | "addi $11, $11, 4 \n\t" |
853 | |
854 | #define MULADDC_STOP \ |
855 | "sw $12, %0 \n\t" \ |
856 | "sw $11, %1 \n\t" \ |
857 | "sw $10, %2 \n\t" \ |
858 | : "=m" (c), "=m" (d), "=m" (s) \ |
859 | : "m" (s), "m" (d), "m" (c), "m" (b) \ |
860 | : "$9", "$10", "$11", "$12", "$13", "$14", "$15", "lo", "hi" \ |
861 | ); |
862 | |
863 | #endif /* MIPS */ |
864 | #endif /* GNUC */ |
865 | |
866 | #if (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__) |
867 | |
868 | #define MULADDC_INIT \ |
869 | __asm mov esi, s \ |
870 | __asm mov edi, d \ |
871 | __asm mov ecx, c \ |
872 | __asm mov ebx, b |
873 | |
874 | #define MULADDC_CORE \ |
875 | __asm lodsd \ |
876 | __asm mul ebx \ |
877 | __asm add eax, ecx \ |
878 | __asm adc edx, 0 \ |
879 | __asm add eax, [edi] \ |
880 | __asm adc edx, 0 \ |
881 | __asm mov ecx, edx \ |
882 | __asm stosd |
883 | |
884 | #if defined(MBEDTLS_HAVE_SSE2) |
885 | |
886 | #define EMIT __asm _emit |
887 | |
888 | #define MULADDC_HUIT \ |
889 | EMIT 0x0F EMIT 0x6E EMIT 0xC9 \ |
890 | EMIT 0x0F EMIT 0x6E EMIT 0xC3 \ |
891 | EMIT 0x0F EMIT 0x6E EMIT 0x1F \ |
892 | EMIT 0x0F EMIT 0xD4 EMIT 0xCB \ |
893 | EMIT 0x0F EMIT 0x6E EMIT 0x16 \ |
894 | EMIT 0x0F EMIT 0xF4 EMIT 0xD0 \ |
895 | EMIT 0x0F EMIT 0x6E EMIT 0x66 EMIT 0x04 \ |
896 | EMIT 0x0F EMIT 0xF4 EMIT 0xE0 \ |
897 | EMIT 0x0F EMIT 0x6E EMIT 0x76 EMIT 0x08 \ |
898 | EMIT 0x0F EMIT 0xF4 EMIT 0xF0 \ |
899 | EMIT 0x0F EMIT 0x6E EMIT 0x7E EMIT 0x0C \ |
900 | EMIT 0x0F EMIT 0xF4 EMIT 0xF8 \ |
901 | EMIT 0x0F EMIT 0xD4 EMIT 0xCA \ |
902 | EMIT 0x0F EMIT 0x6E EMIT 0x5F EMIT 0x04 \ |
903 | EMIT 0x0F EMIT 0xD4 EMIT 0xDC \ |
904 | EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x08 \ |
905 | EMIT 0x0F EMIT 0xD4 EMIT 0xEE \ |
906 | EMIT 0x0F EMIT 0x6E EMIT 0x67 EMIT 0x0C \ |
907 | EMIT 0x0F EMIT 0xD4 EMIT 0xFC \ |
908 | EMIT 0x0F EMIT 0x7E EMIT 0x0F \ |
909 | EMIT 0x0F EMIT 0x6E EMIT 0x56 EMIT 0x10 \ |
910 | EMIT 0x0F EMIT 0xF4 EMIT 0xD0 \ |
911 | EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ |
912 | EMIT 0x0F EMIT 0x6E EMIT 0x66 EMIT 0x14 \ |
913 | EMIT 0x0F EMIT 0xF4 EMIT 0xE0 \ |
914 | EMIT 0x0F EMIT 0xD4 EMIT 0xCB \ |
915 | EMIT 0x0F EMIT 0x6E EMIT 0x76 EMIT 0x18 \ |
916 | EMIT 0x0F EMIT 0xF4 EMIT 0xF0 \ |
917 | EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x04 \ |
918 | EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ |
919 | EMIT 0x0F EMIT 0x6E EMIT 0x5E EMIT 0x1C \ |
920 | EMIT 0x0F EMIT 0xF4 EMIT 0xD8 \ |
921 | EMIT 0x0F EMIT 0xD4 EMIT 0xCD \ |
922 | EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x10 \ |
923 | EMIT 0x0F EMIT 0xD4 EMIT 0xD5 \ |
924 | EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x08 \ |
925 | EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ |
926 | EMIT 0x0F EMIT 0xD4 EMIT 0xCF \ |
927 | EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x14 \ |
928 | EMIT 0x0F EMIT 0xD4 EMIT 0xE5 \ |
929 | EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x0C \ |
930 | EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ |
931 | EMIT 0x0F EMIT 0xD4 EMIT 0xCA \ |
932 | EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x18 \ |
933 | EMIT 0x0F EMIT 0xD4 EMIT 0xF5 \ |
934 | EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x10 \ |
935 | EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ |
936 | EMIT 0x0F EMIT 0xD4 EMIT 0xCC \ |
937 | EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x1C \ |
938 | EMIT 0x0F EMIT 0xD4 EMIT 0xDD \ |
939 | EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x14 \ |
940 | EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ |
941 | EMIT 0x0F EMIT 0xD4 EMIT 0xCE \ |
942 | EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x18 \ |
943 | EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ |
944 | EMIT 0x0F EMIT 0xD4 EMIT 0xCB \ |
945 | EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x1C \ |
946 | EMIT 0x83 EMIT 0xC7 EMIT 0x20 \ |
947 | EMIT 0x83 EMIT 0xC6 EMIT 0x20 \ |
948 | EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ |
949 | EMIT 0x0F EMIT 0x7E EMIT 0xC9 |
950 | |
951 | #define MULADDC_STOP \ |
952 | EMIT 0x0F EMIT 0x77 \ |
953 | __asm mov c, ecx \ |
954 | __asm mov d, edi \ |
955 | __asm mov s, esi \ |
956 | |
957 | #else |
958 | |
959 | #define MULADDC_STOP \ |
960 | __asm mov c, ecx \ |
961 | __asm mov d, edi \ |
962 | __asm mov s, esi \ |
963 | |
964 | #endif /* SSE2 */ |
965 | #endif /* MSVC */ |
966 | |
967 | #endif /* MBEDTLS_HAVE_ASM */ |
968 | |
969 | #if !defined(MULADDC_CORE) |
970 | #if defined(MBEDTLS_HAVE_UDBL) |
971 | |
972 | #define MULADDC_INIT \ |
973 | { \ |
974 | mbedtls_t_udbl r; \ |
975 | mbedtls_mpi_uint r0, r1; |
976 | |
977 | #define MULADDC_CORE \ |
978 | r = *(s++) * (mbedtls_t_udbl) b; \ |
979 | r0 = (mbedtls_mpi_uint) r; \ |
980 | r1 = (mbedtls_mpi_uint)( r >> biL ); \ |
981 | r0 += c; r1 += (r0 < c); \ |
982 | r0 += *d; r1 += (r0 < *d); \ |
983 | c = r1; *(d++) = r0; |
984 | |
985 | #define MULADDC_STOP \ |
986 | } |
987 | |
988 | #else |
989 | #define MULADDC_INIT \ |
990 | { \ |
991 | mbedtls_mpi_uint s0, s1, b0, b1; \ |
992 | mbedtls_mpi_uint r0, r1, rx, ry; \ |
993 | b0 = ( b << biH ) >> biH; \ |
994 | b1 = ( b >> biH ); |
995 | |
996 | #define MULADDC_CORE \ |
997 | s0 = ( *s << biH ) >> biH; \ |
998 | s1 = ( *s >> biH ); s++; \ |
999 | rx = s0 * b1; r0 = s0 * b0; \ |
1000 | ry = s1 * b0; r1 = s1 * b1; \ |
1001 | r1 += ( rx >> biH ); \ |
1002 | r1 += ( ry >> biH ); \ |
1003 | rx <<= biH; ry <<= biH; \ |
1004 | r0 += rx; r1 += (r0 < rx); \ |
1005 | r0 += ry; r1 += (r0 < ry); \ |
1006 | r0 += c; r1 += (r0 < c); \ |
1007 | r0 += *d; r1 += (r0 < *d); \ |
1008 | c = r1; *(d++) = r0; |
1009 | |
1010 | #define MULADDC_STOP \ |
1011 | } |
1012 | |
1013 | #endif /* C (generic) */ |
1014 | #endif /* C (longlong) */ |
1015 | |
1016 | /* *INDENT-ON* */ |
1017 | #endif /* bn_mul.h */ |
1018 | |