| 1 | #line 1 "adGlobals_x86.hpp" |
|---|---|
| 2 | // |
| 3 | // Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved. |
| 4 | // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 5 | // |
| 6 | // This code is free software; you can redistribute it and/or modify it |
| 7 | // under the terms of the GNU General Public License version 2 only, as |
| 8 | // published by the Free Software Foundation. |
| 9 | // |
| 10 | // This code is distributed in the hope that it will be useful, but WITHOUT |
| 11 | // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 13 | // version 2 for more details (a copy is included in the LICENSE file that |
| 14 | // accompanied this code). |
| 15 | // |
| 16 | // You should have received a copy of the GNU General Public License version |
| 17 | // 2 along with this work; if not, write to the Free Software Foundation, |
| 18 | // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
| 19 | // |
| 20 | // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
| 21 | // or visit www.oracle.com if you need additional information or have any |
| 22 | // questions. |
| 23 | // |
| 24 | // |
| 25 | |
| 26 | // Machine Generated File. Do Not Edit! |
| 27 | |
| 28 | |
| 29 | #ifndef GENERATED_ADFILES_ADGLOBALS_HPP |
| 30 | #define GENERATED_ADFILES_ADGLOBALS_HPP |
| 31 | |
| 32 | |
| 33 | // the number of reserved registers + machine registers. |
| 34 | #define REG_COUNT 545 |
| 35 | |
| 36 | // the number of save_on_entry + always_saved registers. |
| 37 | #define MAX_SAVED_ON_ENTRY_REG_COUNT 12 |
| 38 | #define SAVED_ON_ENTRY_REG_COUNT 0 |
| 39 | #define C_SAVED_ON_ENTRY_REG_COUNT 12 |
| 40 | |
| 41 | // Enumerate machine register numbers starting after reserved regs. |
| 42 | // in the order of occurrence in the register block. |
| 43 | enum MachRegisterNumbers { |
| 44 | R10_num, // enum 0, regnum 0, reg encode 10 |
| 45 | R10_H_num, // enum 1, regnum 1, reg encode 10 |
| 46 | R11_num, // enum 2, regnum 2, reg encode 11 |
| 47 | R11_H_num, // enum 3, regnum 3, reg encode 11 |
| 48 | R8_num, // enum 4, regnum 4, reg encode 8 |
| 49 | R8_H_num, // enum 5, regnum 5, reg encode 8 |
| 50 | R9_num, // enum 6, regnum 6, reg encode 9 |
| 51 | R9_H_num, // enum 7, regnum 7, reg encode 9 |
| 52 | R12_num, // enum 8, regnum 8, reg encode 12 |
| 53 | R12_H_num, // enum 9, regnum 9, reg encode 12 |
| 54 | RCX_num, // enum 10, regnum 10, reg encode 1 |
| 55 | RCX_H_num, // enum 11, regnum 11, reg encode 1 |
| 56 | RBX_num, // enum 12, regnum 12, reg encode 3 |
| 57 | RBX_H_num, // enum 13, regnum 13, reg encode 3 |
| 58 | RDI_num, // enum 14, regnum 14, reg encode 7 |
| 59 | RDI_H_num, // enum 15, regnum 15, reg encode 7 |
| 60 | RDX_num, // enum 16, regnum 16, reg encode 2 |
| 61 | RDX_H_num, // enum 17, regnum 17, reg encode 2 |
| 62 | RSI_num, // enum 18, regnum 18, reg encode 6 |
| 63 | RSI_H_num, // enum 19, regnum 19, reg encode 6 |
| 64 | RAX_num, // enum 20, regnum 20, reg encode 0 |
| 65 | RAX_H_num, // enum 21, regnum 21, reg encode 0 |
| 66 | RBP_num, // enum 22, regnum 22, reg encode 5 |
| 67 | RBP_H_num, // enum 23, regnum 23, reg encode 5 |
| 68 | R13_num, // enum 24, regnum 24, reg encode 13 |
| 69 | R13_H_num, // enum 25, regnum 25, reg encode 13 |
| 70 | R14_num, // enum 26, regnum 26, reg encode 14 |
| 71 | R14_H_num, // enum 27, regnum 27, reg encode 14 |
| 72 | R15_num, // enum 28, regnum 28, reg encode 15 |
| 73 | R15_H_num, // enum 29, regnum 29, reg encode 15 |
| 74 | RSP_num, // enum 30, regnum 30, reg encode 4 |
| 75 | RSP_H_num, // enum 31, regnum 31, reg encode 4 |
| 76 | XMM0_num, // enum 32, regnum 32, reg encode 0 |
| 77 | XMM0b_num, // enum 33, regnum 33, reg encode 0 |
| 78 | XMM0c_num, // enum 34, regnum 34, reg encode 0 |
| 79 | XMM0d_num, // enum 35, regnum 35, reg encode 0 |
| 80 | XMM0e_num, // enum 36, regnum 36, reg encode 0 |
| 81 | XMM0f_num, // enum 37, regnum 37, reg encode 0 |
| 82 | XMM0g_num, // enum 38, regnum 38, reg encode 0 |
| 83 | XMM0h_num, // enum 39, regnum 39, reg encode 0 |
| 84 | XMM0i_num, // enum 40, regnum 40, reg encode 0 |
| 85 | XMM0j_num, // enum 41, regnum 41, reg encode 0 |
| 86 | XMM0k_num, // enum 42, regnum 42, reg encode 0 |
| 87 | XMM0l_num, // enum 43, regnum 43, reg encode 0 |
| 88 | XMM0m_num, // enum 44, regnum 44, reg encode 0 |
| 89 | XMM0n_num, // enum 45, regnum 45, reg encode 0 |
| 90 | XMM0o_num, // enum 46, regnum 46, reg encode 0 |
| 91 | XMM0p_num, // enum 47, regnum 47, reg encode 0 |
| 92 | XMM1_num, // enum 48, regnum 48, reg encode 1 |
| 93 | XMM1b_num, // enum 49, regnum 49, reg encode 1 |
| 94 | XMM1c_num, // enum 50, regnum 50, reg encode 1 |
| 95 | XMM1d_num, // enum 51, regnum 51, reg encode 1 |
| 96 | XMM1e_num, // enum 52, regnum 52, reg encode 1 |
| 97 | XMM1f_num, // enum 53, regnum 53, reg encode 1 |
| 98 | XMM1g_num, // enum 54, regnum 54, reg encode 1 |
| 99 | XMM1h_num, // enum 55, regnum 55, reg encode 1 |
| 100 | XMM1i_num, // enum 56, regnum 56, reg encode 1 |
| 101 | XMM1j_num, // enum 57, regnum 57, reg encode 1 |
| 102 | XMM1k_num, // enum 58, regnum 58, reg encode 1 |
| 103 | XMM1l_num, // enum 59, regnum 59, reg encode 1 |
| 104 | XMM1m_num, // enum 60, regnum 60, reg encode 1 |
| 105 | XMM1n_num, // enum 61, regnum 61, reg encode 1 |
| 106 | XMM1o_num, // enum 62, regnum 62, reg encode 1 |
| 107 | XMM1p_num, // enum 63, regnum 63, reg encode 1 |
| 108 | XMM2_num, // enum 64, regnum 64, reg encode 2 |
| 109 | XMM2b_num, // enum 65, regnum 65, reg encode 2 |
| 110 | XMM2c_num, // enum 66, regnum 66, reg encode 2 |
| 111 | XMM2d_num, // enum 67, regnum 67, reg encode 2 |
| 112 | XMM2e_num, // enum 68, regnum 68, reg encode 2 |
| 113 | XMM2f_num, // enum 69, regnum 69, reg encode 2 |
| 114 | XMM2g_num, // enum 70, regnum 70, reg encode 2 |
| 115 | XMM2h_num, // enum 71, regnum 71, reg encode 2 |
| 116 | XMM2i_num, // enum 72, regnum 72, reg encode 2 |
| 117 | XMM2j_num, // enum 73, regnum 73, reg encode 2 |
| 118 | XMM2k_num, // enum 74, regnum 74, reg encode 2 |
| 119 | XMM2l_num, // enum 75, regnum 75, reg encode 2 |
| 120 | XMM2m_num, // enum 76, regnum 76, reg encode 2 |
| 121 | XMM2n_num, // enum 77, regnum 77, reg encode 2 |
| 122 | XMM2o_num, // enum 78, regnum 78, reg encode 2 |
| 123 | XMM2p_num, // enum 79, regnum 79, reg encode 2 |
| 124 | XMM3_num, // enum 80, regnum 80, reg encode 3 |
| 125 | XMM3b_num, // enum 81, regnum 81, reg encode 3 |
| 126 | XMM3c_num, // enum 82, regnum 82, reg encode 3 |
| 127 | XMM3d_num, // enum 83, regnum 83, reg encode 3 |
| 128 | XMM3e_num, // enum 84, regnum 84, reg encode 3 |
| 129 | XMM3f_num, // enum 85, regnum 85, reg encode 3 |
| 130 | XMM3g_num, // enum 86, regnum 86, reg encode 3 |
| 131 | XMM3h_num, // enum 87, regnum 87, reg encode 3 |
| 132 | XMM3i_num, // enum 88, regnum 88, reg encode 3 |
| 133 | XMM3j_num, // enum 89, regnum 89, reg encode 3 |
| 134 | XMM3k_num, // enum 90, regnum 90, reg encode 3 |
| 135 | XMM3l_num, // enum 91, regnum 91, reg encode 3 |
| 136 | XMM3m_num, // enum 92, regnum 92, reg encode 3 |
| 137 | XMM3n_num, // enum 93, regnum 93, reg encode 3 |
| 138 | XMM3o_num, // enum 94, regnum 94, reg encode 3 |
| 139 | XMM3p_num, // enum 95, regnum 95, reg encode 3 |
| 140 | XMM4_num, // enum 96, regnum 96, reg encode 4 |
| 141 | XMM4b_num, // enum 97, regnum 97, reg encode 4 |
| 142 | XMM4c_num, // enum 98, regnum 98, reg encode 4 |
| 143 | XMM4d_num, // enum 99, regnum 99, reg encode 4 |
| 144 | XMM4e_num, // enum 100, regnum 100, reg encode 4 |
| 145 | XMM4f_num, // enum 101, regnum 101, reg encode 4 |
| 146 | XMM4g_num, // enum 102, regnum 102, reg encode 4 |
| 147 | XMM4h_num, // enum 103, regnum 103, reg encode 4 |
| 148 | XMM4i_num, // enum 104, regnum 104, reg encode 4 |
| 149 | XMM4j_num, // enum 105, regnum 105, reg encode 4 |
| 150 | XMM4k_num, // enum 106, regnum 106, reg encode 4 |
| 151 | XMM4l_num, // enum 107, regnum 107, reg encode 4 |
| 152 | XMM4m_num, // enum 108, regnum 108, reg encode 4 |
| 153 | XMM4n_num, // enum 109, regnum 109, reg encode 4 |
| 154 | XMM4o_num, // enum 110, regnum 110, reg encode 4 |
| 155 | XMM4p_num, // enum 111, regnum 111, reg encode 4 |
| 156 | XMM5_num, // enum 112, regnum 112, reg encode 5 |
| 157 | XMM5b_num, // enum 113, regnum 113, reg encode 5 |
| 158 | XMM5c_num, // enum 114, regnum 114, reg encode 5 |
| 159 | XMM5d_num, // enum 115, regnum 115, reg encode 5 |
| 160 | XMM5e_num, // enum 116, regnum 116, reg encode 5 |
| 161 | XMM5f_num, // enum 117, regnum 117, reg encode 5 |
| 162 | XMM5g_num, // enum 118, regnum 118, reg encode 5 |
| 163 | XMM5h_num, // enum 119, regnum 119, reg encode 5 |
| 164 | XMM5i_num, // enum 120, regnum 120, reg encode 5 |
| 165 | XMM5j_num, // enum 121, regnum 121, reg encode 5 |
| 166 | XMM5k_num, // enum 122, regnum 122, reg encode 5 |
| 167 | XMM5l_num, // enum 123, regnum 123, reg encode 5 |
| 168 | XMM5m_num, // enum 124, regnum 124, reg encode 5 |
| 169 | XMM5n_num, // enum 125, regnum 125, reg encode 5 |
| 170 | XMM5o_num, // enum 126, regnum 126, reg encode 5 |
| 171 | XMM5p_num, // enum 127, regnum 127, reg encode 5 |
| 172 | XMM6_num, // enum 128, regnum 128, reg encode 6 |
| 173 | XMM6b_num, // enum 129, regnum 129, reg encode 6 |
| 174 | XMM6c_num, // enum 130, regnum 130, reg encode 6 |
| 175 | XMM6d_num, // enum 131, regnum 131, reg encode 6 |
| 176 | XMM6e_num, // enum 132, regnum 132, reg encode 6 |
| 177 | XMM6f_num, // enum 133, regnum 133, reg encode 6 |
| 178 | XMM6g_num, // enum 134, regnum 134, reg encode 6 |
| 179 | XMM6h_num, // enum 135, regnum 135, reg encode 6 |
| 180 | XMM6i_num, // enum 136, regnum 136, reg encode 6 |
| 181 | XMM6j_num, // enum 137, regnum 137, reg encode 6 |
| 182 | XMM6k_num, // enum 138, regnum 138, reg encode 6 |
| 183 | XMM6l_num, // enum 139, regnum 139, reg encode 6 |
| 184 | XMM6m_num, // enum 140, regnum 140, reg encode 6 |
| 185 | XMM6n_num, // enum 141, regnum 141, reg encode 6 |
| 186 | XMM6o_num, // enum 142, regnum 142, reg encode 6 |
| 187 | XMM6p_num, // enum 143, regnum 143, reg encode 6 |
| 188 | XMM7_num, // enum 144, regnum 144, reg encode 7 |
| 189 | XMM7b_num, // enum 145, regnum 145, reg encode 7 |
| 190 | XMM7c_num, // enum 146, regnum 146, reg encode 7 |
| 191 | XMM7d_num, // enum 147, regnum 147, reg encode 7 |
| 192 | XMM7e_num, // enum 148, regnum 148, reg encode 7 |
| 193 | XMM7f_num, // enum 149, regnum 149, reg encode 7 |
| 194 | XMM7g_num, // enum 150, regnum 150, reg encode 7 |
| 195 | XMM7h_num, // enum 151, regnum 151, reg encode 7 |
| 196 | XMM7i_num, // enum 152, regnum 152, reg encode 7 |
| 197 | XMM7j_num, // enum 153, regnum 153, reg encode 7 |
| 198 | XMM7k_num, // enum 154, regnum 154, reg encode 7 |
| 199 | XMM7l_num, // enum 155, regnum 155, reg encode 7 |
| 200 | XMM7m_num, // enum 156, regnum 156, reg encode 7 |
| 201 | XMM7n_num, // enum 157, regnum 157, reg encode 7 |
| 202 | XMM7o_num, // enum 158, regnum 158, reg encode 7 |
| 203 | XMM7p_num, // enum 159, regnum 159, reg encode 7 |
| 204 | XMM8_num, // enum 160, regnum 160, reg encode 8 |
| 205 | XMM8b_num, // enum 161, regnum 161, reg encode 8 |
| 206 | XMM8c_num, // enum 162, regnum 162, reg encode 8 |
| 207 | XMM8d_num, // enum 163, regnum 163, reg encode 8 |
| 208 | XMM8e_num, // enum 164, regnum 164, reg encode 8 |
| 209 | XMM8f_num, // enum 165, regnum 165, reg encode 8 |
| 210 | XMM8g_num, // enum 166, regnum 166, reg encode 8 |
| 211 | XMM8h_num, // enum 167, regnum 167, reg encode 8 |
| 212 | XMM8i_num, // enum 168, regnum 168, reg encode 8 |
| 213 | XMM8j_num, // enum 169, regnum 169, reg encode 8 |
| 214 | XMM8k_num, // enum 170, regnum 170, reg encode 8 |
| 215 | XMM8l_num, // enum 171, regnum 171, reg encode 8 |
| 216 | XMM8m_num, // enum 172, regnum 172, reg encode 8 |
| 217 | XMM8n_num, // enum 173, regnum 173, reg encode 8 |
| 218 | XMM8o_num, // enum 174, regnum 174, reg encode 8 |
| 219 | XMM8p_num, // enum 175, regnum 175, reg encode 8 |
| 220 | XMM9_num, // enum 176, regnum 176, reg encode 9 |
| 221 | XMM9b_num, // enum 177, regnum 177, reg encode 9 |
| 222 | XMM9c_num, // enum 178, regnum 178, reg encode 9 |
| 223 | XMM9d_num, // enum 179, regnum 179, reg encode 9 |
| 224 | XMM9e_num, // enum 180, regnum 180, reg encode 9 |
| 225 | XMM9f_num, // enum 181, regnum 181, reg encode 9 |
| 226 | XMM9g_num, // enum 182, regnum 182, reg encode 9 |
| 227 | XMM9h_num, // enum 183, regnum 183, reg encode 9 |
| 228 | XMM9i_num, // enum 184, regnum 184, reg encode 9 |
| 229 | XMM9j_num, // enum 185, regnum 185, reg encode 9 |
| 230 | XMM9k_num, // enum 186, regnum 186, reg encode 9 |
| 231 | XMM9l_num, // enum 187, regnum 187, reg encode 9 |
| 232 | XMM9m_num, // enum 188, regnum 188, reg encode 9 |
| 233 | XMM9n_num, // enum 189, regnum 189, reg encode 9 |
| 234 | XMM9o_num, // enum 190, regnum 190, reg encode 9 |
| 235 | XMM9p_num, // enum 191, regnum 191, reg encode 9 |
| 236 | XMM10_num, // enum 192, regnum 192, reg encode 10 |
| 237 | XMM10b_num, // enum 193, regnum 193, reg encode 10 |
| 238 | XMM10c_num, // enum 194, regnum 194, reg encode 10 |
| 239 | XMM10d_num, // enum 195, regnum 195, reg encode 10 |
| 240 | XMM10e_num, // enum 196, regnum 196, reg encode 10 |
| 241 | XMM10f_num, // enum 197, regnum 197, reg encode 10 |
| 242 | XMM10g_num, // enum 198, regnum 198, reg encode 10 |
| 243 | XMM10h_num, // enum 199, regnum 199, reg encode 10 |
| 244 | XMM10i_num, // enum 200, regnum 200, reg encode 10 |
| 245 | XMM10j_num, // enum 201, regnum 201, reg encode 10 |
| 246 | XMM10k_num, // enum 202, regnum 202, reg encode 10 |
| 247 | XMM10l_num, // enum 203, regnum 203, reg encode 10 |
| 248 | XMM10m_num, // enum 204, regnum 204, reg encode 10 |
| 249 | XMM10n_num, // enum 205, regnum 205, reg encode 10 |
| 250 | XMM10o_num, // enum 206, regnum 206, reg encode 10 |
| 251 | XMM10p_num, // enum 207, regnum 207, reg encode 10 |
| 252 | XMM11_num, // enum 208, regnum 208, reg encode 11 |
| 253 | XMM11b_num, // enum 209, regnum 209, reg encode 11 |
| 254 | XMM11c_num, // enum 210, regnum 210, reg encode 11 |
| 255 | XMM11d_num, // enum 211, regnum 211, reg encode 11 |
| 256 | XMM11e_num, // enum 212, regnum 212, reg encode 11 |
| 257 | XMM11f_num, // enum 213, regnum 213, reg encode 11 |
| 258 | XMM11g_num, // enum 214, regnum 214, reg encode 11 |
| 259 | XMM11h_num, // enum 215, regnum 215, reg encode 11 |
| 260 | XMM11i_num, // enum 216, regnum 216, reg encode 11 |
| 261 | XMM11j_num, // enum 217, regnum 217, reg encode 11 |
| 262 | XMM11k_num, // enum 218, regnum 218, reg encode 11 |
| 263 | XMM11l_num, // enum 219, regnum 219, reg encode 11 |
| 264 | XMM11m_num, // enum 220, regnum 220, reg encode 11 |
| 265 | XMM11n_num, // enum 221, regnum 221, reg encode 11 |
| 266 | XMM11o_num, // enum 222, regnum 222, reg encode 11 |
| 267 | XMM11p_num, // enum 223, regnum 223, reg encode 11 |
| 268 | XMM12_num, // enum 224, regnum 224, reg encode 12 |
| 269 | XMM12b_num, // enum 225, regnum 225, reg encode 12 |
| 270 | XMM12c_num, // enum 226, regnum 226, reg encode 12 |
| 271 | XMM12d_num, // enum 227, regnum 227, reg encode 12 |
| 272 | XMM12e_num, // enum 228, regnum 228, reg encode 12 |
| 273 | XMM12f_num, // enum 229, regnum 229, reg encode 12 |
| 274 | XMM12g_num, // enum 230, regnum 230, reg encode 12 |
| 275 | XMM12h_num, // enum 231, regnum 231, reg encode 12 |
| 276 | XMM12i_num, // enum 232, regnum 232, reg encode 12 |
| 277 | XMM12j_num, // enum 233, regnum 233, reg encode 12 |
| 278 | XMM12k_num, // enum 234, regnum 234, reg encode 12 |
| 279 | XMM12l_num, // enum 235, regnum 235, reg encode 12 |
| 280 | XMM12m_num, // enum 236, regnum 236, reg encode 12 |
| 281 | XMM12n_num, // enum 237, regnum 237, reg encode 12 |
| 282 | XMM12o_num, // enum 238, regnum 238, reg encode 12 |
| 283 | XMM12p_num, // enum 239, regnum 239, reg encode 12 |
| 284 | XMM13_num, // enum 240, regnum 240, reg encode 13 |
| 285 | XMM13b_num, // enum 241, regnum 241, reg encode 13 |
| 286 | XMM13c_num, // enum 242, regnum 242, reg encode 13 |
| 287 | XMM13d_num, // enum 243, regnum 243, reg encode 13 |
| 288 | XMM13e_num, // enum 244, regnum 244, reg encode 13 |
| 289 | XMM13f_num, // enum 245, regnum 245, reg encode 13 |
| 290 | XMM13g_num, // enum 246, regnum 246, reg encode 13 |
| 291 | XMM13h_num, // enum 247, regnum 247, reg encode 13 |
| 292 | XMM13i_num, // enum 248, regnum 248, reg encode 13 |
| 293 | XMM13j_num, // enum 249, regnum 249, reg encode 13 |
| 294 | XMM13k_num, // enum 250, regnum 250, reg encode 13 |
| 295 | XMM13l_num, // enum 251, regnum 251, reg encode 13 |
| 296 | XMM13m_num, // enum 252, regnum 252, reg encode 13 |
| 297 | XMM13n_num, // enum 253, regnum 253, reg encode 13 |
| 298 | XMM13o_num, // enum 254, regnum 254, reg encode 13 |
| 299 | XMM13p_num, // enum 255, regnum 255, reg encode 13 |
| 300 | XMM14_num, // enum 256, regnum 256, reg encode 14 |
| 301 | XMM14b_num, // enum 257, regnum 257, reg encode 14 |
| 302 | XMM14c_num, // enum 258, regnum 258, reg encode 14 |
| 303 | XMM14d_num, // enum 259, regnum 259, reg encode 14 |
| 304 | XMM14e_num, // enum 260, regnum 260, reg encode 14 |
| 305 | XMM14f_num, // enum 261, regnum 261, reg encode 14 |
| 306 | XMM14g_num, // enum 262, regnum 262, reg encode 14 |
| 307 | XMM14h_num, // enum 263, regnum 263, reg encode 14 |
| 308 | XMM14i_num, // enum 264, regnum 264, reg encode 14 |
| 309 | XMM14j_num, // enum 265, regnum 265, reg encode 14 |
| 310 | XMM14k_num, // enum 266, regnum 266, reg encode 14 |
| 311 | XMM14l_num, // enum 267, regnum 267, reg encode 14 |
| 312 | XMM14m_num, // enum 268, regnum 268, reg encode 14 |
| 313 | XMM14n_num, // enum 269, regnum 269, reg encode 14 |
| 314 | XMM14o_num, // enum 270, regnum 270, reg encode 14 |
| 315 | XMM14p_num, // enum 271, regnum 271, reg encode 14 |
| 316 | XMM15_num, // enum 272, regnum 272, reg encode 15 |
| 317 | XMM15b_num, // enum 273, regnum 273, reg encode 15 |
| 318 | XMM15c_num, // enum 274, regnum 274, reg encode 15 |
| 319 | XMM15d_num, // enum 275, regnum 275, reg encode 15 |
| 320 | XMM15e_num, // enum 276, regnum 276, reg encode 15 |
| 321 | XMM15f_num, // enum 277, regnum 277, reg encode 15 |
| 322 | XMM15g_num, // enum 278, regnum 278, reg encode 15 |
| 323 | XMM15h_num, // enum 279, regnum 279, reg encode 15 |
| 324 | XMM15i_num, // enum 280, regnum 280, reg encode 15 |
| 325 | XMM15j_num, // enum 281, regnum 281, reg encode 15 |
| 326 | XMM15k_num, // enum 282, regnum 282, reg encode 15 |
| 327 | XMM15l_num, // enum 283, regnum 283, reg encode 15 |
| 328 | XMM15m_num, // enum 284, regnum 284, reg encode 15 |
| 329 | XMM15n_num, // enum 285, regnum 285, reg encode 15 |
| 330 | XMM15o_num, // enum 286, regnum 286, reg encode 15 |
| 331 | XMM15p_num, // enum 287, regnum 287, reg encode 15 |
| 332 | XMM16_num, // enum 288, regnum 288, reg encode 16 |
| 333 | XMM16b_num, // enum 289, regnum 289, reg encode 16 |
| 334 | XMM16c_num, // enum 290, regnum 290, reg encode 16 |
| 335 | XMM16d_num, // enum 291, regnum 291, reg encode 16 |
| 336 | XMM16e_num, // enum 292, regnum 292, reg encode 16 |
| 337 | XMM16f_num, // enum 293, regnum 293, reg encode 16 |
| 338 | XMM16g_num, // enum 294, regnum 294, reg encode 16 |
| 339 | XMM16h_num, // enum 295, regnum 295, reg encode 16 |
| 340 | XMM16i_num, // enum 296, regnum 296, reg encode 16 |
| 341 | XMM16j_num, // enum 297, regnum 297, reg encode 16 |
| 342 | XMM16k_num, // enum 298, regnum 298, reg encode 16 |
| 343 | XMM16l_num, // enum 299, regnum 299, reg encode 16 |
| 344 | XMM16m_num, // enum 300, regnum 300, reg encode 16 |
| 345 | XMM16n_num, // enum 301, regnum 301, reg encode 16 |
| 346 | XMM16o_num, // enum 302, regnum 302, reg encode 16 |
| 347 | XMM16p_num, // enum 303, regnum 303, reg encode 16 |
| 348 | XMM17_num, // enum 304, regnum 304, reg encode 17 |
| 349 | XMM17b_num, // enum 305, regnum 305, reg encode 17 |
| 350 | XMM17c_num, // enum 306, regnum 306, reg encode 17 |
| 351 | XMM17d_num, // enum 307, regnum 307, reg encode 17 |
| 352 | XMM17e_num, // enum 308, regnum 308, reg encode 17 |
| 353 | XMM17f_num, // enum 309, regnum 309, reg encode 17 |
| 354 | XMM17g_num, // enum 310, regnum 310, reg encode 17 |
| 355 | XMM17h_num, // enum 311, regnum 311, reg encode 17 |
| 356 | XMM17i_num, // enum 312, regnum 312, reg encode 17 |
| 357 | XMM17j_num, // enum 313, regnum 313, reg encode 17 |
| 358 | XMM17k_num, // enum 314, regnum 314, reg encode 17 |
| 359 | XMM17l_num, // enum 315, regnum 315, reg encode 17 |
| 360 | XMM17m_num, // enum 316, regnum 316, reg encode 17 |
| 361 | XMM17n_num, // enum 317, regnum 317, reg encode 17 |
| 362 | XMM17o_num, // enum 318, regnum 318, reg encode 17 |
| 363 | XMM17p_num, // enum 319, regnum 319, reg encode 17 |
| 364 | XMM18_num, // enum 320, regnum 320, reg encode 18 |
| 365 | XMM18b_num, // enum 321, regnum 321, reg encode 18 |
| 366 | XMM18c_num, // enum 322, regnum 322, reg encode 18 |
| 367 | XMM18d_num, // enum 323, regnum 323, reg encode 18 |
| 368 | XMM18e_num, // enum 324, regnum 324, reg encode 18 |
| 369 | XMM18f_num, // enum 325, regnum 325, reg encode 18 |
| 370 | XMM18g_num, // enum 326, regnum 326, reg encode 18 |
| 371 | XMM18h_num, // enum 327, regnum 327, reg encode 18 |
| 372 | XMM18i_num, // enum 328, regnum 328, reg encode 18 |
| 373 | XMM18j_num, // enum 329, regnum 329, reg encode 18 |
| 374 | XMM18k_num, // enum 330, regnum 330, reg encode 18 |
| 375 | XMM18l_num, // enum 331, regnum 331, reg encode 18 |
| 376 | XMM18m_num, // enum 332, regnum 332, reg encode 18 |
| 377 | XMM18n_num, // enum 333, regnum 333, reg encode 18 |
| 378 | XMM18o_num, // enum 334, regnum 334, reg encode 18 |
| 379 | XMM18p_num, // enum 335, regnum 335, reg encode 18 |
| 380 | XMM19_num, // enum 336, regnum 336, reg encode 19 |
| 381 | XMM19b_num, // enum 337, regnum 337, reg encode 19 |
| 382 | XMM19c_num, // enum 338, regnum 338, reg encode 19 |
| 383 | XMM19d_num, // enum 339, regnum 339, reg encode 19 |
| 384 | XMM19e_num, // enum 340, regnum 340, reg encode 19 |
| 385 | XMM19f_num, // enum 341, regnum 341, reg encode 19 |
| 386 | XMM19g_num, // enum 342, regnum 342, reg encode 19 |
| 387 | XMM19h_num, // enum 343, regnum 343, reg encode 19 |
| 388 | XMM19i_num, // enum 344, regnum 344, reg encode 19 |
| 389 | XMM19j_num, // enum 345, regnum 345, reg encode 19 |
| 390 | XMM19k_num, // enum 346, regnum 346, reg encode 19 |
| 391 | XMM19l_num, // enum 347, regnum 347, reg encode 19 |
| 392 | XMM19m_num, // enum 348, regnum 348, reg encode 19 |
| 393 | XMM19n_num, // enum 349, regnum 349, reg encode 19 |
| 394 | XMM19o_num, // enum 350, regnum 350, reg encode 19 |
| 395 | XMM19p_num, // enum 351, regnum 351, reg encode 19 |
| 396 | XMM20_num, // enum 352, regnum 352, reg encode 20 |
| 397 | XMM20b_num, // enum 353, regnum 353, reg encode 20 |
| 398 | XMM20c_num, // enum 354, regnum 354, reg encode 20 |
| 399 | XMM20d_num, // enum 355, regnum 355, reg encode 20 |
| 400 | XMM20e_num, // enum 356, regnum 356, reg encode 20 |
| 401 | XMM20f_num, // enum 357, regnum 357, reg encode 20 |
| 402 | XMM20g_num, // enum 358, regnum 358, reg encode 20 |
| 403 | XMM20h_num, // enum 359, regnum 359, reg encode 20 |
| 404 | XMM20i_num, // enum 360, regnum 360, reg encode 20 |
| 405 | XMM20j_num, // enum 361, regnum 361, reg encode 20 |
| 406 | XMM20k_num, // enum 362, regnum 362, reg encode 20 |
| 407 | XMM20l_num, // enum 363, regnum 363, reg encode 20 |
| 408 | XMM20m_num, // enum 364, regnum 364, reg encode 20 |
| 409 | XMM20n_num, // enum 365, regnum 365, reg encode 20 |
| 410 | XMM20o_num, // enum 366, regnum 366, reg encode 20 |
| 411 | XMM20p_num, // enum 367, regnum 367, reg encode 20 |
| 412 | XMM21_num, // enum 368, regnum 368, reg encode 21 |
| 413 | XMM21b_num, // enum 369, regnum 369, reg encode 21 |
| 414 | XMM21c_num, // enum 370, regnum 370, reg encode 21 |
| 415 | XMM21d_num, // enum 371, regnum 371, reg encode 21 |
| 416 | XMM21e_num, // enum 372, regnum 372, reg encode 21 |
| 417 | XMM21f_num, // enum 373, regnum 373, reg encode 21 |
| 418 | XMM21g_num, // enum 374, regnum 374, reg encode 21 |
| 419 | XMM21h_num, // enum 375, regnum 375, reg encode 21 |
| 420 | XMM21i_num, // enum 376, regnum 376, reg encode 21 |
| 421 | XMM21j_num, // enum 377, regnum 377, reg encode 21 |
| 422 | XMM21k_num, // enum 378, regnum 378, reg encode 21 |
| 423 | XMM21l_num, // enum 379, regnum 379, reg encode 21 |
| 424 | XMM21m_num, // enum 380, regnum 380, reg encode 21 |
| 425 | XMM21n_num, // enum 381, regnum 381, reg encode 21 |
| 426 | XMM21o_num, // enum 382, regnum 382, reg encode 21 |
| 427 | XMM21p_num, // enum 383, regnum 383, reg encode 21 |
| 428 | XMM22_num, // enum 384, regnum 384, reg encode 22 |
| 429 | XMM22b_num, // enum 385, regnum 385, reg encode 22 |
| 430 | XMM22c_num, // enum 386, regnum 386, reg encode 22 |
| 431 | XMM22d_num, // enum 387, regnum 387, reg encode 22 |
| 432 | XMM22e_num, // enum 388, regnum 388, reg encode 22 |
| 433 | XMM22f_num, // enum 389, regnum 389, reg encode 22 |
| 434 | XMM22g_num, // enum 390, regnum 390, reg encode 22 |
| 435 | XMM22h_num, // enum 391, regnum 391, reg encode 22 |
| 436 | XMM22i_num, // enum 392, regnum 392, reg encode 22 |
| 437 | XMM22j_num, // enum 393, regnum 393, reg encode 22 |
| 438 | XMM22k_num, // enum 394, regnum 394, reg encode 22 |
| 439 | XMM22l_num, // enum 395, regnum 395, reg encode 22 |
| 440 | XMM22m_num, // enum 396, regnum 396, reg encode 22 |
| 441 | XMM22n_num, // enum 397, regnum 397, reg encode 22 |
| 442 | XMM22o_num, // enum 398, regnum 398, reg encode 22 |
| 443 | XMM22p_num, // enum 399, regnum 399, reg encode 22 |
| 444 | XMM23_num, // enum 400, regnum 400, reg encode 23 |
| 445 | XMM23b_num, // enum 401, regnum 401, reg encode 23 |
| 446 | XMM23c_num, // enum 402, regnum 402, reg encode 23 |
| 447 | XMM23d_num, // enum 403, regnum 403, reg encode 23 |
| 448 | XMM23e_num, // enum 404, regnum 404, reg encode 23 |
| 449 | XMM23f_num, // enum 405, regnum 405, reg encode 23 |
| 450 | XMM23g_num, // enum 406, regnum 406, reg encode 23 |
| 451 | XMM23h_num, // enum 407, regnum 407, reg encode 23 |
| 452 | XMM23i_num, // enum 408, regnum 408, reg encode 23 |
| 453 | XMM23j_num, // enum 409, regnum 409, reg encode 23 |
| 454 | XMM23k_num, // enum 410, regnum 410, reg encode 23 |
| 455 | XMM23l_num, // enum 411, regnum 411, reg encode 23 |
| 456 | XMM23m_num, // enum 412, regnum 412, reg encode 23 |
| 457 | XMM23n_num, // enum 413, regnum 413, reg encode 23 |
| 458 | XMM23o_num, // enum 414, regnum 414, reg encode 23 |
| 459 | XMM23p_num, // enum 415, regnum 415, reg encode 23 |
| 460 | XMM24_num, // enum 416, regnum 416, reg encode 24 |
| 461 | XMM24b_num, // enum 417, regnum 417, reg encode 24 |
| 462 | XMM24c_num, // enum 418, regnum 418, reg encode 24 |
| 463 | XMM24d_num, // enum 419, regnum 419, reg encode 24 |
| 464 | XMM24e_num, // enum 420, regnum 420, reg encode 24 |
| 465 | XMM24f_num, // enum 421, regnum 421, reg encode 24 |
| 466 | XMM24g_num, // enum 422, regnum 422, reg encode 24 |
| 467 | XMM24h_num, // enum 423, regnum 423, reg encode 24 |
| 468 | XMM24i_num, // enum 424, regnum 424, reg encode 24 |
| 469 | XMM24j_num, // enum 425, regnum 425, reg encode 24 |
| 470 | XMM24k_num, // enum 426, regnum 426, reg encode 24 |
| 471 | XMM24l_num, // enum 427, regnum 427, reg encode 24 |
| 472 | XMM24m_num, // enum 428, regnum 428, reg encode 24 |
| 473 | XMM24n_num, // enum 429, regnum 429, reg encode 24 |
| 474 | XMM24o_num, // enum 430, regnum 430, reg encode 24 |
| 475 | XMM24p_num, // enum 431, regnum 431, reg encode 24 |
| 476 | XMM25_num, // enum 432, regnum 432, reg encode 25 |
| 477 | XMM25b_num, // enum 433, regnum 433, reg encode 25 |
| 478 | XMM25c_num, // enum 434, regnum 434, reg encode 25 |
| 479 | XMM25d_num, // enum 435, regnum 435, reg encode 25 |
| 480 | XMM25e_num, // enum 436, regnum 436, reg encode 25 |
| 481 | XMM25f_num, // enum 437, regnum 437, reg encode 25 |
| 482 | XMM25g_num, // enum 438, regnum 438, reg encode 25 |
| 483 | XMM25h_num, // enum 439, regnum 439, reg encode 25 |
| 484 | XMM25i_num, // enum 440, regnum 440, reg encode 25 |
| 485 | XMM25j_num, // enum 441, regnum 441, reg encode 25 |
| 486 | XMM25k_num, // enum 442, regnum 442, reg encode 25 |
| 487 | XMM25l_num, // enum 443, regnum 443, reg encode 25 |
| 488 | XMM25m_num, // enum 444, regnum 444, reg encode 25 |
| 489 | XMM25n_num, // enum 445, regnum 445, reg encode 25 |
| 490 | XMM25o_num, // enum 446, regnum 446, reg encode 25 |
| 491 | XMM25p_num, // enum 447, regnum 447, reg encode 25 |
| 492 | XMM26_num, // enum 448, regnum 448, reg encode 26 |
| 493 | XMM26b_num, // enum 449, regnum 449, reg encode 26 |
| 494 | XMM26c_num, // enum 450, regnum 450, reg encode 26 |
| 495 | XMM26d_num, // enum 451, regnum 451, reg encode 26 |
| 496 | XMM26e_num, // enum 452, regnum 452, reg encode 26 |
| 497 | XMM26f_num, // enum 453, regnum 453, reg encode 26 |
| 498 | XMM26g_num, // enum 454, regnum 454, reg encode 26 |
| 499 | XMM26h_num, // enum 455, regnum 455, reg encode 26 |
| 500 | XMM26i_num, // enum 456, regnum 456, reg encode 26 |
| 501 | XMM26j_num, // enum 457, regnum 457, reg encode 26 |
| 502 | XMM26k_num, // enum 458, regnum 458, reg encode 26 |
| 503 | XMM26l_num, // enum 459, regnum 459, reg encode 26 |
| 504 | XMM26m_num, // enum 460, regnum 460, reg encode 26 |
| 505 | XMM26n_num, // enum 461, regnum 461, reg encode 26 |
| 506 | XMM26o_num, // enum 462, regnum 462, reg encode 26 |
| 507 | XMM26p_num, // enum 463, regnum 463, reg encode 26 |
| 508 | XMM27_num, // enum 464, regnum 464, reg encode 27 |
| 509 | XMM27b_num, // enum 465, regnum 465, reg encode 27 |
| 510 | XMM27c_num, // enum 466, regnum 466, reg encode 27 |
| 511 | XMM27d_num, // enum 467, regnum 467, reg encode 27 |
| 512 | XMM27e_num, // enum 468, regnum 468, reg encode 27 |
| 513 | XMM27f_num, // enum 469, regnum 469, reg encode 27 |
| 514 | XMM27g_num, // enum 470, regnum 470, reg encode 27 |
| 515 | XMM27h_num, // enum 471, regnum 471, reg encode 27 |
| 516 | XMM27i_num, // enum 472, regnum 472, reg encode 27 |
| 517 | XMM27j_num, // enum 473, regnum 473, reg encode 27 |
| 518 | XMM27k_num, // enum 474, regnum 474, reg encode 27 |
| 519 | XMM27l_num, // enum 475, regnum 475, reg encode 27 |
| 520 | XMM27m_num, // enum 476, regnum 476, reg encode 27 |
| 521 | XMM27n_num, // enum 477, regnum 477, reg encode 27 |
| 522 | XMM27o_num, // enum 478, regnum 478, reg encode 27 |
| 523 | XMM27p_num, // enum 479, regnum 479, reg encode 27 |
| 524 | XMM28_num, // enum 480, regnum 480, reg encode 28 |
| 525 | XMM28b_num, // enum 481, regnum 481, reg encode 28 |
| 526 | XMM28c_num, // enum 482, regnum 482, reg encode 28 |
| 527 | XMM28d_num, // enum 483, regnum 483, reg encode 28 |
| 528 | XMM28e_num, // enum 484, regnum 484, reg encode 28 |
| 529 | XMM28f_num, // enum 485, regnum 485, reg encode 28 |
| 530 | XMM28g_num, // enum 486, regnum 486, reg encode 28 |
| 531 | XMM28h_num, // enum 487, regnum 487, reg encode 28 |
| 532 | XMM28i_num, // enum 488, regnum 488, reg encode 28 |
| 533 | XMM28j_num, // enum 489, regnum 489, reg encode 28 |
| 534 | XMM28k_num, // enum 490, regnum 490, reg encode 28 |
| 535 | XMM28l_num, // enum 491, regnum 491, reg encode 28 |
| 536 | XMM28m_num, // enum 492, regnum 492, reg encode 28 |
| 537 | XMM28n_num, // enum 493, regnum 493, reg encode 28 |
| 538 | XMM28o_num, // enum 494, regnum 494, reg encode 28 |
| 539 | XMM28p_num, // enum 495, regnum 495, reg encode 28 |
| 540 | XMM29_num, // enum 496, regnum 496, reg encode 29 |
| 541 | XMM29b_num, // enum 497, regnum 497, reg encode 29 |
| 542 | XMM29c_num, // enum 498, regnum 498, reg encode 29 |
| 543 | XMM29d_num, // enum 499, regnum 499, reg encode 29 |
| 544 | XMM29e_num, // enum 500, regnum 500, reg encode 29 |
| 545 | XMM29f_num, // enum 501, regnum 501, reg encode 29 |
| 546 | XMM29g_num, // enum 502, regnum 502, reg encode 29 |
| 547 | XMM29h_num, // enum 503, regnum 503, reg encode 29 |
| 548 | XMM29i_num, // enum 504, regnum 504, reg encode 29 |
| 549 | XMM29j_num, // enum 505, regnum 505, reg encode 29 |
| 550 | XMM29k_num, // enum 506, regnum 506, reg encode 29 |
| 551 | XMM29l_num, // enum 507, regnum 507, reg encode 29 |
| 552 | XMM29m_num, // enum 508, regnum 508, reg encode 29 |
| 553 | XMM29n_num, // enum 509, regnum 509, reg encode 29 |
| 554 | XMM29o_num, // enum 510, regnum 510, reg encode 29 |
| 555 | XMM29p_num, // enum 511, regnum 511, reg encode 29 |
| 556 | XMM30_num, // enum 512, regnum 512, reg encode 30 |
| 557 | XMM30b_num, // enum 513, regnum 513, reg encode 30 |
| 558 | XMM30c_num, // enum 514, regnum 514, reg encode 30 |
| 559 | XMM30d_num, // enum 515, regnum 515, reg encode 30 |
| 560 | XMM30e_num, // enum 516, regnum 516, reg encode 30 |
| 561 | XMM30f_num, // enum 517, regnum 517, reg encode 30 |
| 562 | XMM30g_num, // enum 518, regnum 518, reg encode 30 |
| 563 | XMM30h_num, // enum 519, regnum 519, reg encode 30 |
| 564 | XMM30i_num, // enum 520, regnum 520, reg encode 30 |
| 565 | XMM30j_num, // enum 521, regnum 521, reg encode 30 |
| 566 | XMM30k_num, // enum 522, regnum 522, reg encode 30 |
| 567 | XMM30l_num, // enum 523, regnum 523, reg encode 30 |
| 568 | XMM30m_num, // enum 524, regnum 524, reg encode 30 |
| 569 | XMM30n_num, // enum 525, regnum 525, reg encode 30 |
| 570 | XMM30o_num, // enum 526, regnum 526, reg encode 30 |
| 571 | XMM30p_num, // enum 527, regnum 527, reg encode 30 |
| 572 | XMM31_num, // enum 528, regnum 528, reg encode 31 |
| 573 | XMM31b_num, // enum 529, regnum 529, reg encode 31 |
| 574 | XMM31c_num, // enum 530, regnum 530, reg encode 31 |
| 575 | XMM31d_num, // enum 531, regnum 531, reg encode 31 |
| 576 | XMM31e_num, // enum 532, regnum 532, reg encode 31 |
| 577 | XMM31f_num, // enum 533, regnum 533, reg encode 31 |
| 578 | XMM31g_num, // enum 534, regnum 534, reg encode 31 |
| 579 | XMM31h_num, // enum 535, regnum 535, reg encode 31 |
| 580 | XMM31i_num, // enum 536, regnum 536, reg encode 31 |
| 581 | XMM31j_num, // enum 537, regnum 537, reg encode 31 |
| 582 | XMM31k_num, // enum 538, regnum 538, reg encode 31 |
| 583 | XMM31l_num, // enum 539, regnum 539, reg encode 31 |
| 584 | XMM31m_num, // enum 540, regnum 540, reg encode 31 |
| 585 | XMM31n_num, // enum 541, regnum 541, reg encode 31 |
| 586 | XMM31o_num, // enum 542, regnum 542, reg encode 31 |
| 587 | XMM31p_num, // enum 543, regnum 543, reg encode 31 |
| 588 | RFLAGS_num, // enum 544, regnum 544, reg encode 16 |
| 589 | _last_Mach_Reg // 545 |
| 590 | }; |
| 591 | |
| 592 | // Size of register-mask in ints |
| 593 | #define RM_SIZE 22 |
| 594 | // Unroll factor for loops over the data in a RegMask |
| 595 | #define FORALL_BODY BODY(0) BODY(1) BODY(2) BODY(3) BODY(4) BODY(5) BODY(6) BODY(7) BODY(8) BODY(9) BODY(10) BODY(11) BODY(12) BODY(13) BODY(14) BODY(15) BODY(16) BODY(17) BODY(18) BODY(19) BODY(20) BODY(21) |
| 596 | |
| 597 | class RegMask; |
| 598 | |
| 599 | #endif // GENERATED_ADFILES_ADGLOBALS_HPP |
| 600 |
Generated while processing OpenJDK/build/linux-x86_64-server-release/hotspot/variant-server/gensrc/adfiles/ad_x86.cpp
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