| 1 | /* |
| 2 | * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved. |
| 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 | * |
| 5 | * This code is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License version 2 only, as |
| 7 | * published by the Free Software Foundation. |
| 8 | * |
| 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 12 | * version 2 for more details (a copy is included in the LICENSE file that |
| 13 | * accompanied this code). |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License version |
| 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
| 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
| 18 | * |
| 19 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
| 20 | * or visit www.oracle.com if you need additional information or have any |
| 21 | * questions. |
| 22 | * |
| 23 | */ |
| 24 | |
| 25 | #ifndef CPU_X86_DISASSEMBLER_X86_HPP |
| 26 | #define CPU_X86_DISASSEMBLER_X86_HPP |
| 27 | |
| 28 | static int pd_instruction_alignment() { |
| 29 | return 1; |
| 30 | } |
| 31 | |
| 32 | static const char* pd_cpu_opts() { |
| 33 | return "" ; |
| 34 | } |
| 35 | |
| 36 | // Returns address of n-th instruction preceding addr, |
| 37 | // NULL if no preceding instruction can be found. |
| 38 | // On CISC architectures, it is difficult to impossible to step |
| 39 | // backwards in the instruction stream. Therefore just return NULL. |
| 40 | // It might be beneficial to check "is_readable" as we do on ppc and s390. |
| 41 | static address find_prev_instr(address addr, int n_instr) { |
| 42 | return NULL; |
| 43 | } |
| 44 | |
| 45 | // special-case instruction decoding. |
| 46 | // There may be cases where the binutils disassembler doesn't do |
| 47 | // the perfect job. In those cases, decode_instruction0 may kick in |
| 48 | // and do it right. |
| 49 | // If nothing had to be done, just return "here", otherwise return "here + instr_len(here)" |
| 50 | static address decode_instruction0(address here, outputStream* st, address virtual_begin = NULL) { |
| 51 | return here; |
| 52 | } |
| 53 | |
| 54 | // platform-specific instruction annotations (like value of loaded constants) |
| 55 | static void annotate(address pc, outputStream* st) { }; |
| 56 | |
| 57 | #endif // CPU_X86_DISASSEMBLER_X86_HPP |
| 58 | |