1/* This file is autogenerated by tracetool, do not edit. */
2
3#ifndef TRACE_HW_SPARC64_GENERATED_TRACERS_H
4#define TRACE_HW_SPARC64_GENERATED_TRACERS_H
5
6#include "trace/control.h"
7
8extern TraceEvent _TRACE_EBUS_ISA_IRQ_HANDLER_EVENT;
9extern TraceEvent _TRACE_SUN4U_IOMMU_MEM_READ_EVENT;
10extern TraceEvent _TRACE_SUN4U_IOMMU_MEM_WRITE_EVENT;
11extern TraceEvent _TRACE_SUN4U_IOMMU_TRANSLATE_EVENT;
12extern TraceEvent _TRACE_SPARC64_CPU_CHECK_IRQS_RESET_IRQ_EVENT;
13extern TraceEvent _TRACE_SPARC64_CPU_CHECK_IRQS_NOSET_IRQ_EVENT;
14extern TraceEvent _TRACE_SPARC64_CPU_CHECK_IRQS_SET_IRQ_EVENT;
15extern TraceEvent _TRACE_SPARC64_CPU_CHECK_IRQS_DISABLED_EVENT;
16extern TraceEvent _TRACE_SPARC64_CPU_IVEC_RAISE_IRQ_EVENT;
17extern TraceEvent _TRACE_SPARC64_CPU_IVEC_LOWER_IRQ_EVENT;
18extern TraceEvent _TRACE_SPARC64_CPU_TICK_IRQ_DISABLED_EVENT;
19extern TraceEvent _TRACE_SPARC64_CPU_TICK_IRQ_FIRE_EVENT;
20extern TraceEvent _TRACE_SPARC64_CPU_STICK_IRQ_DISABLED_EVENT;
21extern TraceEvent _TRACE_SPARC64_CPU_STICK_IRQ_FIRE_EVENT;
22extern TraceEvent _TRACE_SPARC64_CPU_HSTICK_IRQ_DISABLED_EVENT;
23extern TraceEvent _TRACE_SPARC64_CPU_HSTICK_IRQ_FIRE_EVENT;
24extern TraceEvent _TRACE_SPARC64_CPU_TICK_SET_COUNT_EVENT;
25extern TraceEvent _TRACE_SPARC64_CPU_TICK_GET_COUNT_EVENT;
26extern TraceEvent _TRACE_SPARC64_CPU_TICK_SET_LIMIT_EVENT;
27extern TraceEvent _TRACE_SPARC64_CPU_TICK_SET_LIMIT_ZERO_EVENT;
28extern uint16_t _TRACE_EBUS_ISA_IRQ_HANDLER_DSTATE;
29extern uint16_t _TRACE_SUN4U_IOMMU_MEM_READ_DSTATE;
30extern uint16_t _TRACE_SUN4U_IOMMU_MEM_WRITE_DSTATE;
31extern uint16_t _TRACE_SUN4U_IOMMU_TRANSLATE_DSTATE;
32extern uint16_t _TRACE_SPARC64_CPU_CHECK_IRQS_RESET_IRQ_DSTATE;
33extern uint16_t _TRACE_SPARC64_CPU_CHECK_IRQS_NOSET_IRQ_DSTATE;
34extern uint16_t _TRACE_SPARC64_CPU_CHECK_IRQS_SET_IRQ_DSTATE;
35extern uint16_t _TRACE_SPARC64_CPU_CHECK_IRQS_DISABLED_DSTATE;
36extern uint16_t _TRACE_SPARC64_CPU_IVEC_RAISE_IRQ_DSTATE;
37extern uint16_t _TRACE_SPARC64_CPU_IVEC_LOWER_IRQ_DSTATE;
38extern uint16_t _TRACE_SPARC64_CPU_TICK_IRQ_DISABLED_DSTATE;
39extern uint16_t _TRACE_SPARC64_CPU_TICK_IRQ_FIRE_DSTATE;
40extern uint16_t _TRACE_SPARC64_CPU_STICK_IRQ_DISABLED_DSTATE;
41extern uint16_t _TRACE_SPARC64_CPU_STICK_IRQ_FIRE_DSTATE;
42extern uint16_t _TRACE_SPARC64_CPU_HSTICK_IRQ_DISABLED_DSTATE;
43extern uint16_t _TRACE_SPARC64_CPU_HSTICK_IRQ_FIRE_DSTATE;
44extern uint16_t _TRACE_SPARC64_CPU_TICK_SET_COUNT_DSTATE;
45extern uint16_t _TRACE_SPARC64_CPU_TICK_GET_COUNT_DSTATE;
46extern uint16_t _TRACE_SPARC64_CPU_TICK_SET_LIMIT_DSTATE;
47extern uint16_t _TRACE_SPARC64_CPU_TICK_SET_LIMIT_ZERO_DSTATE;
48#define TRACE_EBUS_ISA_IRQ_HANDLER_ENABLED 1
49#define TRACE_SUN4U_IOMMU_MEM_READ_ENABLED 1
50#define TRACE_SUN4U_IOMMU_MEM_WRITE_ENABLED 1
51#define TRACE_SUN4U_IOMMU_TRANSLATE_ENABLED 1
52#define TRACE_SPARC64_CPU_CHECK_IRQS_RESET_IRQ_ENABLED 1
53#define TRACE_SPARC64_CPU_CHECK_IRQS_NOSET_IRQ_ENABLED 1
54#define TRACE_SPARC64_CPU_CHECK_IRQS_SET_IRQ_ENABLED 1
55#define TRACE_SPARC64_CPU_CHECK_IRQS_DISABLED_ENABLED 1
56#define TRACE_SPARC64_CPU_IVEC_RAISE_IRQ_ENABLED 1
57#define TRACE_SPARC64_CPU_IVEC_LOWER_IRQ_ENABLED 1
58#define TRACE_SPARC64_CPU_TICK_IRQ_DISABLED_ENABLED 1
59#define TRACE_SPARC64_CPU_TICK_IRQ_FIRE_ENABLED 1
60#define TRACE_SPARC64_CPU_STICK_IRQ_DISABLED_ENABLED 1
61#define TRACE_SPARC64_CPU_STICK_IRQ_FIRE_ENABLED 1
62#define TRACE_SPARC64_CPU_HSTICK_IRQ_DISABLED_ENABLED 1
63#define TRACE_SPARC64_CPU_HSTICK_IRQ_FIRE_ENABLED 1
64#define TRACE_SPARC64_CPU_TICK_SET_COUNT_ENABLED 1
65#define TRACE_SPARC64_CPU_TICK_GET_COUNT_ENABLED 1
66#define TRACE_SPARC64_CPU_TICK_SET_LIMIT_ENABLED 1
67#define TRACE_SPARC64_CPU_TICK_SET_LIMIT_ZERO_ENABLED 1
68#include "qemu/log-for-trace.h"
69
70
71#define TRACE_EBUS_ISA_IRQ_HANDLER_BACKEND_DSTATE() ( \
72 trace_event_get_state_dynamic_by_id(TRACE_EBUS_ISA_IRQ_HANDLER) || \
73 false)
74
75static inline void _nocheck__trace_ebus_isa_irq_handler(int n, int level)
76{
77 if (trace_event_get_state(TRACE_EBUS_ISA_IRQ_HANDLER) && qemu_loglevel_mask(LOG_TRACE)) {
78 struct timeval _now;
79 gettimeofday(&_now, NULL);
80 qemu_log("%d@%zu.%06zu:ebus_isa_irq_handler " "Set ISA IRQ %d level %d" "\n",
81 qemu_get_thread_id(),
82 (size_t)_now.tv_sec, (size_t)_now.tv_usec
83 , n, level);
84 }
85}
86
87static inline void trace_ebus_isa_irq_handler(int n, int level)
88{
89 if (true) {
90 _nocheck__trace_ebus_isa_irq_handler(n, level);
91 }
92}
93
94#define TRACE_SUN4U_IOMMU_MEM_READ_BACKEND_DSTATE() ( \
95 trace_event_get_state_dynamic_by_id(TRACE_SUN4U_IOMMU_MEM_READ) || \
96 false)
97
98static inline void _nocheck__trace_sun4u_iommu_mem_read(uint64_t addr, uint64_t val, int size)
99{
100 if (trace_event_get_state(TRACE_SUN4U_IOMMU_MEM_READ) && qemu_loglevel_mask(LOG_TRACE)) {
101 struct timeval _now;
102 gettimeofday(&_now, NULL);
103 qemu_log("%d@%zu.%06zu:sun4u_iommu_mem_read " "addr: 0x%"PRIx64" val: 0x%"PRIx64" size: %d" "\n",
104 qemu_get_thread_id(),
105 (size_t)_now.tv_sec, (size_t)_now.tv_usec
106 , addr, val, size);
107 }
108}
109
110static inline void trace_sun4u_iommu_mem_read(uint64_t addr, uint64_t val, int size)
111{
112 if (true) {
113 _nocheck__trace_sun4u_iommu_mem_read(addr, val, size);
114 }
115}
116
117#define TRACE_SUN4U_IOMMU_MEM_WRITE_BACKEND_DSTATE() ( \
118 trace_event_get_state_dynamic_by_id(TRACE_SUN4U_IOMMU_MEM_WRITE) || \
119 false)
120
121static inline void _nocheck__trace_sun4u_iommu_mem_write(uint64_t addr, uint64_t val, int size)
122{
123 if (trace_event_get_state(TRACE_SUN4U_IOMMU_MEM_WRITE) && qemu_loglevel_mask(LOG_TRACE)) {
124 struct timeval _now;
125 gettimeofday(&_now, NULL);
126 qemu_log("%d@%zu.%06zu:sun4u_iommu_mem_write " "addr: 0x%"PRIx64" val: 0x%"PRIx64" size: %d" "\n",
127 qemu_get_thread_id(),
128 (size_t)_now.tv_sec, (size_t)_now.tv_usec
129 , addr, val, size);
130 }
131}
132
133static inline void trace_sun4u_iommu_mem_write(uint64_t addr, uint64_t val, int size)
134{
135 if (true) {
136 _nocheck__trace_sun4u_iommu_mem_write(addr, val, size);
137 }
138}
139
140#define TRACE_SUN4U_IOMMU_TRANSLATE_BACKEND_DSTATE() ( \
141 trace_event_get_state_dynamic_by_id(TRACE_SUN4U_IOMMU_TRANSLATE) || \
142 false)
143
144static inline void _nocheck__trace_sun4u_iommu_translate(uint64_t addr, uint64_t trans_addr, uint64_t tte)
145{
146 if (trace_event_get_state(TRACE_SUN4U_IOMMU_TRANSLATE) && qemu_loglevel_mask(LOG_TRACE)) {
147 struct timeval _now;
148 gettimeofday(&_now, NULL);
149 qemu_log("%d@%zu.%06zu:sun4u_iommu_translate " "xlate 0x%"PRIx64" => pa 0x%"PRIx64" tte: 0x%"PRIx64 "\n",
150 qemu_get_thread_id(),
151 (size_t)_now.tv_sec, (size_t)_now.tv_usec
152 , addr, trans_addr, tte);
153 }
154}
155
156static inline void trace_sun4u_iommu_translate(uint64_t addr, uint64_t trans_addr, uint64_t tte)
157{
158 if (true) {
159 _nocheck__trace_sun4u_iommu_translate(addr, trans_addr, tte);
160 }
161}
162
163#define TRACE_SPARC64_CPU_CHECK_IRQS_RESET_IRQ_BACKEND_DSTATE() ( \
164 trace_event_get_state_dynamic_by_id(TRACE_SPARC64_CPU_CHECK_IRQS_RESET_IRQ) || \
165 false)
166
167static inline void _nocheck__trace_sparc64_cpu_check_irqs_reset_irq(int intno)
168{
169 if (trace_event_get_state(TRACE_SPARC64_CPU_CHECK_IRQS_RESET_IRQ) && qemu_loglevel_mask(LOG_TRACE)) {
170 struct timeval _now;
171 gettimeofday(&_now, NULL);
172 qemu_log("%d@%zu.%06zu:sparc64_cpu_check_irqs_reset_irq " "Reset CPU IRQ (current interrupt 0x%x)" "\n",
173 qemu_get_thread_id(),
174 (size_t)_now.tv_sec, (size_t)_now.tv_usec
175 , intno);
176 }
177}
178
179static inline void trace_sparc64_cpu_check_irqs_reset_irq(int intno)
180{
181 if (true) {
182 _nocheck__trace_sparc64_cpu_check_irqs_reset_irq(intno);
183 }
184}
185
186#define TRACE_SPARC64_CPU_CHECK_IRQS_NOSET_IRQ_BACKEND_DSTATE() ( \
187 trace_event_get_state_dynamic_by_id(TRACE_SPARC64_CPU_CHECK_IRQS_NOSET_IRQ) || \
188 false)
189
190static inline void _nocheck__trace_sparc64_cpu_check_irqs_noset_irq(uint32_t tl, uint32_t tt, int intno)
191{
192 if (trace_event_get_state(TRACE_SPARC64_CPU_CHECK_IRQS_NOSET_IRQ) && qemu_loglevel_mask(LOG_TRACE)) {
193 struct timeval _now;
194 gettimeofday(&_now, NULL);
195 qemu_log("%d@%zu.%06zu:sparc64_cpu_check_irqs_noset_irq " "Not setting CPU IRQ: TL=%d current 0x%x >= pending 0x%x" "\n",
196 qemu_get_thread_id(),
197 (size_t)_now.tv_sec, (size_t)_now.tv_usec
198 , tl, tt, intno);
199 }
200}
201
202static inline void trace_sparc64_cpu_check_irqs_noset_irq(uint32_t tl, uint32_t tt, int intno)
203{
204 if (true) {
205 _nocheck__trace_sparc64_cpu_check_irqs_noset_irq(tl, tt, intno);
206 }
207}
208
209#define TRACE_SPARC64_CPU_CHECK_IRQS_SET_IRQ_BACKEND_DSTATE() ( \
210 trace_event_get_state_dynamic_by_id(TRACE_SPARC64_CPU_CHECK_IRQS_SET_IRQ) || \
211 false)
212
213static inline void _nocheck__trace_sparc64_cpu_check_irqs_set_irq(unsigned int i, int old, int new)
214{
215 if (trace_event_get_state(TRACE_SPARC64_CPU_CHECK_IRQS_SET_IRQ) && qemu_loglevel_mask(LOG_TRACE)) {
216 struct timeval _now;
217 gettimeofday(&_now, NULL);
218 qemu_log("%d@%zu.%06zu:sparc64_cpu_check_irqs_set_irq " "Set CPU IRQ %d old=0x%x new=0x%x" "\n",
219 qemu_get_thread_id(),
220 (size_t)_now.tv_sec, (size_t)_now.tv_usec
221 , i, old, new);
222 }
223}
224
225static inline void trace_sparc64_cpu_check_irqs_set_irq(unsigned int i, int old, int new)
226{
227 if (true) {
228 _nocheck__trace_sparc64_cpu_check_irqs_set_irq(i, old, new);
229 }
230}
231
232#define TRACE_SPARC64_CPU_CHECK_IRQS_DISABLED_BACKEND_DSTATE() ( \
233 trace_event_get_state_dynamic_by_id(TRACE_SPARC64_CPU_CHECK_IRQS_DISABLED) || \
234 false)
235
236static inline void _nocheck__trace_sparc64_cpu_check_irqs_disabled(uint32_t pil, uint32_t pil_in, uint32_t softint, int intno)
237{
238 if (trace_event_get_state(TRACE_SPARC64_CPU_CHECK_IRQS_DISABLED) && qemu_loglevel_mask(LOG_TRACE)) {
239 struct timeval _now;
240 gettimeofday(&_now, NULL);
241 qemu_log("%d@%zu.%06zu:sparc64_cpu_check_irqs_disabled " "Interrupts disabled, pil=0x%08x pil_in=0x%08x softint=0x%08x current interrupt 0x%x" "\n",
242 qemu_get_thread_id(),
243 (size_t)_now.tv_sec, (size_t)_now.tv_usec
244 , pil, pil_in, softint, intno);
245 }
246}
247
248static inline void trace_sparc64_cpu_check_irqs_disabled(uint32_t pil, uint32_t pil_in, uint32_t softint, int intno)
249{
250 if (true) {
251 _nocheck__trace_sparc64_cpu_check_irqs_disabled(pil, pil_in, softint, intno);
252 }
253}
254
255#define TRACE_SPARC64_CPU_IVEC_RAISE_IRQ_BACKEND_DSTATE() ( \
256 trace_event_get_state_dynamic_by_id(TRACE_SPARC64_CPU_IVEC_RAISE_IRQ) || \
257 false)
258
259static inline void _nocheck__trace_sparc64_cpu_ivec_raise_irq(int irq)
260{
261 if (trace_event_get_state(TRACE_SPARC64_CPU_IVEC_RAISE_IRQ) && qemu_loglevel_mask(LOG_TRACE)) {
262 struct timeval _now;
263 gettimeofday(&_now, NULL);
264 qemu_log("%d@%zu.%06zu:sparc64_cpu_ivec_raise_irq " "Raise IVEC IRQ %d" "\n",
265 qemu_get_thread_id(),
266 (size_t)_now.tv_sec, (size_t)_now.tv_usec
267 , irq);
268 }
269}
270
271static inline void trace_sparc64_cpu_ivec_raise_irq(int irq)
272{
273 if (true) {
274 _nocheck__trace_sparc64_cpu_ivec_raise_irq(irq);
275 }
276}
277
278#define TRACE_SPARC64_CPU_IVEC_LOWER_IRQ_BACKEND_DSTATE() ( \
279 trace_event_get_state_dynamic_by_id(TRACE_SPARC64_CPU_IVEC_LOWER_IRQ) || \
280 false)
281
282static inline void _nocheck__trace_sparc64_cpu_ivec_lower_irq(int irq)
283{
284 if (trace_event_get_state(TRACE_SPARC64_CPU_IVEC_LOWER_IRQ) && qemu_loglevel_mask(LOG_TRACE)) {
285 struct timeval _now;
286 gettimeofday(&_now, NULL);
287 qemu_log("%d@%zu.%06zu:sparc64_cpu_ivec_lower_irq " "Lower IVEC IRQ %d" "\n",
288 qemu_get_thread_id(),
289 (size_t)_now.tv_sec, (size_t)_now.tv_usec
290 , irq);
291 }
292}
293
294static inline void trace_sparc64_cpu_ivec_lower_irq(int irq)
295{
296 if (true) {
297 _nocheck__trace_sparc64_cpu_ivec_lower_irq(irq);
298 }
299}
300
301#define TRACE_SPARC64_CPU_TICK_IRQ_DISABLED_BACKEND_DSTATE() ( \
302 trace_event_get_state_dynamic_by_id(TRACE_SPARC64_CPU_TICK_IRQ_DISABLED) || \
303 false)
304
305static inline void _nocheck__trace_sparc64_cpu_tick_irq_disabled(void)
306{
307 if (trace_event_get_state(TRACE_SPARC64_CPU_TICK_IRQ_DISABLED) && qemu_loglevel_mask(LOG_TRACE)) {
308 struct timeval _now;
309 gettimeofday(&_now, NULL);
310 qemu_log("%d@%zu.%06zu:sparc64_cpu_tick_irq_disabled " "tick_irq: softint disabled" "\n",
311 qemu_get_thread_id(),
312 (size_t)_now.tv_sec, (size_t)_now.tv_usec
313 );
314 }
315}
316
317static inline void trace_sparc64_cpu_tick_irq_disabled(void)
318{
319 if (true) {
320 _nocheck__trace_sparc64_cpu_tick_irq_disabled();
321 }
322}
323
324#define TRACE_SPARC64_CPU_TICK_IRQ_FIRE_BACKEND_DSTATE() ( \
325 trace_event_get_state_dynamic_by_id(TRACE_SPARC64_CPU_TICK_IRQ_FIRE) || \
326 false)
327
328static inline void _nocheck__trace_sparc64_cpu_tick_irq_fire(void)
329{
330 if (trace_event_get_state(TRACE_SPARC64_CPU_TICK_IRQ_FIRE) && qemu_loglevel_mask(LOG_TRACE)) {
331 struct timeval _now;
332 gettimeofday(&_now, NULL);
333 qemu_log("%d@%zu.%06zu:sparc64_cpu_tick_irq_fire " "tick_irq: fire" "\n",
334 qemu_get_thread_id(),
335 (size_t)_now.tv_sec, (size_t)_now.tv_usec
336 );
337 }
338}
339
340static inline void trace_sparc64_cpu_tick_irq_fire(void)
341{
342 if (true) {
343 _nocheck__trace_sparc64_cpu_tick_irq_fire();
344 }
345}
346
347#define TRACE_SPARC64_CPU_STICK_IRQ_DISABLED_BACKEND_DSTATE() ( \
348 trace_event_get_state_dynamic_by_id(TRACE_SPARC64_CPU_STICK_IRQ_DISABLED) || \
349 false)
350
351static inline void _nocheck__trace_sparc64_cpu_stick_irq_disabled(void)
352{
353 if (trace_event_get_state(TRACE_SPARC64_CPU_STICK_IRQ_DISABLED) && qemu_loglevel_mask(LOG_TRACE)) {
354 struct timeval _now;
355 gettimeofday(&_now, NULL);
356 qemu_log("%d@%zu.%06zu:sparc64_cpu_stick_irq_disabled " "stick_irq: softint disabled" "\n",
357 qemu_get_thread_id(),
358 (size_t)_now.tv_sec, (size_t)_now.tv_usec
359 );
360 }
361}
362
363static inline void trace_sparc64_cpu_stick_irq_disabled(void)
364{
365 if (true) {
366 _nocheck__trace_sparc64_cpu_stick_irq_disabled();
367 }
368}
369
370#define TRACE_SPARC64_CPU_STICK_IRQ_FIRE_BACKEND_DSTATE() ( \
371 trace_event_get_state_dynamic_by_id(TRACE_SPARC64_CPU_STICK_IRQ_FIRE) || \
372 false)
373
374static inline void _nocheck__trace_sparc64_cpu_stick_irq_fire(void)
375{
376 if (trace_event_get_state(TRACE_SPARC64_CPU_STICK_IRQ_FIRE) && qemu_loglevel_mask(LOG_TRACE)) {
377 struct timeval _now;
378 gettimeofday(&_now, NULL);
379 qemu_log("%d@%zu.%06zu:sparc64_cpu_stick_irq_fire " "stick_irq: fire" "\n",
380 qemu_get_thread_id(),
381 (size_t)_now.tv_sec, (size_t)_now.tv_usec
382 );
383 }
384}
385
386static inline void trace_sparc64_cpu_stick_irq_fire(void)
387{
388 if (true) {
389 _nocheck__trace_sparc64_cpu_stick_irq_fire();
390 }
391}
392
393#define TRACE_SPARC64_CPU_HSTICK_IRQ_DISABLED_BACKEND_DSTATE() ( \
394 trace_event_get_state_dynamic_by_id(TRACE_SPARC64_CPU_HSTICK_IRQ_DISABLED) || \
395 false)
396
397static inline void _nocheck__trace_sparc64_cpu_hstick_irq_disabled(void)
398{
399 if (trace_event_get_state(TRACE_SPARC64_CPU_HSTICK_IRQ_DISABLED) && qemu_loglevel_mask(LOG_TRACE)) {
400 struct timeval _now;
401 gettimeofday(&_now, NULL);
402 qemu_log("%d@%zu.%06zu:sparc64_cpu_hstick_irq_disabled " "hstick_irq: softint disabled" "\n",
403 qemu_get_thread_id(),
404 (size_t)_now.tv_sec, (size_t)_now.tv_usec
405 );
406 }
407}
408
409static inline void trace_sparc64_cpu_hstick_irq_disabled(void)
410{
411 if (true) {
412 _nocheck__trace_sparc64_cpu_hstick_irq_disabled();
413 }
414}
415
416#define TRACE_SPARC64_CPU_HSTICK_IRQ_FIRE_BACKEND_DSTATE() ( \
417 trace_event_get_state_dynamic_by_id(TRACE_SPARC64_CPU_HSTICK_IRQ_FIRE) || \
418 false)
419
420static inline void _nocheck__trace_sparc64_cpu_hstick_irq_fire(void)
421{
422 if (trace_event_get_state(TRACE_SPARC64_CPU_HSTICK_IRQ_FIRE) && qemu_loglevel_mask(LOG_TRACE)) {
423 struct timeval _now;
424 gettimeofday(&_now, NULL);
425 qemu_log("%d@%zu.%06zu:sparc64_cpu_hstick_irq_fire " "hstick_irq: fire" "\n",
426 qemu_get_thread_id(),
427 (size_t)_now.tv_sec, (size_t)_now.tv_usec
428 );
429 }
430}
431
432static inline void trace_sparc64_cpu_hstick_irq_fire(void)
433{
434 if (true) {
435 _nocheck__trace_sparc64_cpu_hstick_irq_fire();
436 }
437}
438
439#define TRACE_SPARC64_CPU_TICK_SET_COUNT_BACKEND_DSTATE() ( \
440 trace_event_get_state_dynamic_by_id(TRACE_SPARC64_CPU_TICK_SET_COUNT) || \
441 false)
442
443static inline void _nocheck__trace_sparc64_cpu_tick_set_count(const char * name, uint64_t real_count, const char * npt, void * p)
444{
445 if (trace_event_get_state(TRACE_SPARC64_CPU_TICK_SET_COUNT) && qemu_loglevel_mask(LOG_TRACE)) {
446 struct timeval _now;
447 gettimeofday(&_now, NULL);
448 qemu_log("%d@%zu.%06zu:sparc64_cpu_tick_set_count " "%s set_count count=0x%"PRIx64" (npt %s) p=%p" "\n",
449 qemu_get_thread_id(),
450 (size_t)_now.tv_sec, (size_t)_now.tv_usec
451 , name, real_count, npt, p);
452 }
453}
454
455static inline void trace_sparc64_cpu_tick_set_count(const char * name, uint64_t real_count, const char * npt, void * p)
456{
457 if (true) {
458 _nocheck__trace_sparc64_cpu_tick_set_count(name, real_count, npt, p);
459 }
460}
461
462#define TRACE_SPARC64_CPU_TICK_GET_COUNT_BACKEND_DSTATE() ( \
463 trace_event_get_state_dynamic_by_id(TRACE_SPARC64_CPU_TICK_GET_COUNT) || \
464 false)
465
466static inline void _nocheck__trace_sparc64_cpu_tick_get_count(const char * name, uint64_t real_count, const char * npt, void * p)
467{
468 if (trace_event_get_state(TRACE_SPARC64_CPU_TICK_GET_COUNT) && qemu_loglevel_mask(LOG_TRACE)) {
469 struct timeval _now;
470 gettimeofday(&_now, NULL);
471 qemu_log("%d@%zu.%06zu:sparc64_cpu_tick_get_count " "%s get_count count=0x%"PRIx64" (npt %s) p=%p" "\n",
472 qemu_get_thread_id(),
473 (size_t)_now.tv_sec, (size_t)_now.tv_usec
474 , name, real_count, npt, p);
475 }
476}
477
478static inline void trace_sparc64_cpu_tick_get_count(const char * name, uint64_t real_count, const char * npt, void * p)
479{
480 if (true) {
481 _nocheck__trace_sparc64_cpu_tick_get_count(name, real_count, npt, p);
482 }
483}
484
485#define TRACE_SPARC64_CPU_TICK_SET_LIMIT_BACKEND_DSTATE() ( \
486 trace_event_get_state_dynamic_by_id(TRACE_SPARC64_CPU_TICK_SET_LIMIT) || \
487 false)
488
489static inline void _nocheck__trace_sparc64_cpu_tick_set_limit(const char * name, uint64_t real_limit, const char * dis, void * p, uint64_t limit, uint64_t t, uint64_t dt)
490{
491 if (trace_event_get_state(TRACE_SPARC64_CPU_TICK_SET_LIMIT) && qemu_loglevel_mask(LOG_TRACE)) {
492 struct timeval _now;
493 gettimeofday(&_now, NULL);
494 qemu_log("%d@%zu.%06zu:sparc64_cpu_tick_set_limit " "%s set_limit limit=0x%"PRIx64 " (%s) p=%p called with limit=0x%"PRIx64" at 0x%"PRIx64" (delta=0x%"PRIx64")" "\n",
495 qemu_get_thread_id(),
496 (size_t)_now.tv_sec, (size_t)_now.tv_usec
497 , name, real_limit, dis, p, limit, t, dt);
498 }
499}
500
501static inline void trace_sparc64_cpu_tick_set_limit(const char * name, uint64_t real_limit, const char * dis, void * p, uint64_t limit, uint64_t t, uint64_t dt)
502{
503 if (true) {
504 _nocheck__trace_sparc64_cpu_tick_set_limit(name, real_limit, dis, p, limit, t, dt);
505 }
506}
507
508#define TRACE_SPARC64_CPU_TICK_SET_LIMIT_ZERO_BACKEND_DSTATE() ( \
509 trace_event_get_state_dynamic_by_id(TRACE_SPARC64_CPU_TICK_SET_LIMIT_ZERO) || \
510 false)
511
512static inline void _nocheck__trace_sparc64_cpu_tick_set_limit_zero(const char * name)
513{
514 if (trace_event_get_state(TRACE_SPARC64_CPU_TICK_SET_LIMIT_ZERO) && qemu_loglevel_mask(LOG_TRACE)) {
515 struct timeval _now;
516 gettimeofday(&_now, NULL);
517 qemu_log("%d@%zu.%06zu:sparc64_cpu_tick_set_limit_zero " "%s set_limit limit=ZERO - not starting timer" "\n",
518 qemu_get_thread_id(),
519 (size_t)_now.tv_sec, (size_t)_now.tv_usec
520 , name);
521 }
522}
523
524static inline void trace_sparc64_cpu_tick_set_limit_zero(const char * name)
525{
526 if (true) {
527 _nocheck__trace_sparc64_cpu_tick_set_limit_zero(name);
528 }
529}
530#endif /* TRACE_HW_SPARC64_GENERATED_TRACERS_H */
531