1#include "qemu/osdep.h"
2#include "hw/boards.h"
3#include "migration/vmstate.h"
4#include "hw/acpi/cpu.h"
5#include "qapi/error.h"
6#include "qapi/qapi-events-misc.h"
7#include "trace.h"
8#include "sysemu/numa.h"
9
10#define ACPI_CPU_HOTPLUG_REG_LEN 12
11#define ACPI_CPU_SELECTOR_OFFSET_WR 0
12#define ACPI_CPU_FLAGS_OFFSET_RW 4
13#define ACPI_CPU_CMD_OFFSET_WR 5
14#define ACPI_CPU_CMD_DATA_OFFSET_RW 8
15
16enum {
17 CPHP_GET_NEXT_CPU_WITH_EVENT_CMD = 0,
18 CPHP_OST_EVENT_CMD = 1,
19 CPHP_OST_STATUS_CMD = 2,
20 CPHP_CMD_MAX
21};
22
23static ACPIOSTInfo *acpi_cpu_device_status(int idx, AcpiCpuStatus *cdev)
24{
25 ACPIOSTInfo *info = g_new0(ACPIOSTInfo, 1);
26
27 info->slot_type = ACPI_SLOT_TYPE_CPU;
28 info->slot = g_strdup_printf("%d", idx);
29 info->source = cdev->ost_event;
30 info->status = cdev->ost_status;
31 if (cdev->cpu) {
32 DeviceState *dev = DEVICE(cdev->cpu);
33 if (dev->id) {
34 info->device = g_strdup(dev->id);
35 info->has_device = true;
36 }
37 }
38 return info;
39}
40
41void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list)
42{
43 int i;
44
45 for (i = 0; i < cpu_st->dev_count; i++) {
46 ACPIOSTInfoList *elem = g_new0(ACPIOSTInfoList, 1);
47 elem->value = acpi_cpu_device_status(i, &cpu_st->devs[i]);
48 elem->next = NULL;
49 **list = elem;
50 *list = &elem->next;
51 }
52}
53
54static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size)
55{
56 uint64_t val = 0;
57 CPUHotplugState *cpu_st = opaque;
58 AcpiCpuStatus *cdev;
59
60 if (cpu_st->selector >= cpu_st->dev_count) {
61 return val;
62 }
63
64 cdev = &cpu_st->devs[cpu_st->selector];
65 switch (addr) {
66 case ACPI_CPU_FLAGS_OFFSET_RW: /* pack and return is_* fields */
67 val |= cdev->cpu ? 1 : 0;
68 val |= cdev->is_inserting ? 2 : 0;
69 val |= cdev->is_removing ? 4 : 0;
70 trace_cpuhp_acpi_read_flags(cpu_st->selector, val);
71 break;
72 case ACPI_CPU_CMD_DATA_OFFSET_RW:
73 switch (cpu_st->command) {
74 case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD:
75 val = cpu_st->selector;
76 break;
77 default:
78 break;
79 }
80 trace_cpuhp_acpi_read_cmd_data(cpu_st->selector, val);
81 break;
82 default:
83 break;
84 }
85 return val;
86}
87
88static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data,
89 unsigned int size)
90{
91 CPUHotplugState *cpu_st = opaque;
92 AcpiCpuStatus *cdev;
93 ACPIOSTInfo *info;
94
95 assert(cpu_st->dev_count);
96
97 if (addr) {
98 if (cpu_st->selector >= cpu_st->dev_count) {
99 trace_cpuhp_acpi_invalid_idx_selected(cpu_st->selector);
100 return;
101 }
102 }
103
104 switch (addr) {
105 case ACPI_CPU_SELECTOR_OFFSET_WR: /* current CPU selector */
106 cpu_st->selector = data;
107 trace_cpuhp_acpi_write_idx(cpu_st->selector);
108 break;
109 case ACPI_CPU_FLAGS_OFFSET_RW: /* set is_* fields */
110 cdev = &cpu_st->devs[cpu_st->selector];
111 if (data & 2) { /* clear insert event */
112 cdev->is_inserting = false;
113 trace_cpuhp_acpi_clear_inserting_evt(cpu_st->selector);
114 } else if (data & 4) { /* clear remove event */
115 cdev->is_removing = false;
116 trace_cpuhp_acpi_clear_remove_evt(cpu_st->selector);
117 } else if (data & 8) {
118 DeviceState *dev = NULL;
119 HotplugHandler *hotplug_ctrl = NULL;
120
121 if (!cdev->cpu || cdev->cpu == first_cpu) {
122 trace_cpuhp_acpi_ejecting_invalid_cpu(cpu_st->selector);
123 break;
124 }
125
126 trace_cpuhp_acpi_ejecting_cpu(cpu_st->selector);
127 dev = DEVICE(cdev->cpu);
128 hotplug_ctrl = qdev_get_hotplug_handler(dev);
129 hotplug_handler_unplug(hotplug_ctrl, dev, NULL);
130 object_unparent(OBJECT(dev));
131 }
132 break;
133 case ACPI_CPU_CMD_OFFSET_WR:
134 trace_cpuhp_acpi_write_cmd(cpu_st->selector, data);
135 if (data < CPHP_CMD_MAX) {
136 cpu_st->command = data;
137 if (cpu_st->command == CPHP_GET_NEXT_CPU_WITH_EVENT_CMD) {
138 uint32_t iter = cpu_st->selector;
139
140 do {
141 cdev = &cpu_st->devs[iter];
142 if (cdev->is_inserting || cdev->is_removing) {
143 cpu_st->selector = iter;
144 trace_cpuhp_acpi_cpu_has_events(cpu_st->selector,
145 cdev->is_inserting, cdev->is_removing);
146 break;
147 }
148 iter = iter + 1 < cpu_st->dev_count ? iter + 1 : 0;
149 } while (iter != cpu_st->selector);
150 }
151 }
152 break;
153 case ACPI_CPU_CMD_DATA_OFFSET_RW:
154 switch (cpu_st->command) {
155 case CPHP_OST_EVENT_CMD: {
156 cdev = &cpu_st->devs[cpu_st->selector];
157 cdev->ost_event = data;
158 trace_cpuhp_acpi_write_ost_ev(cpu_st->selector, cdev->ost_event);
159 break;
160 }
161 case CPHP_OST_STATUS_CMD: {
162 cdev = &cpu_st->devs[cpu_st->selector];
163 cdev->ost_status = data;
164 info = acpi_cpu_device_status(cpu_st->selector, cdev);
165 qapi_event_send_acpi_device_ost(info);
166 qapi_free_ACPIOSTInfo(info);
167 trace_cpuhp_acpi_write_ost_status(cpu_st->selector,
168 cdev->ost_status);
169 break;
170 }
171 default:
172 break;
173 }
174 break;
175 default:
176 break;
177 }
178}
179
180static const MemoryRegionOps cpu_hotplug_ops = {
181 .read = cpu_hotplug_rd,
182 .write = cpu_hotplug_wr,
183 .endianness = DEVICE_LITTLE_ENDIAN,
184 .valid = {
185 .min_access_size = 1,
186 .max_access_size = 4,
187 },
188};
189
190void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner,
191 CPUHotplugState *state, hwaddr base_addr)
192{
193 MachineState *machine = MACHINE(qdev_get_machine());
194 MachineClass *mc = MACHINE_GET_CLASS(machine);
195 const CPUArchIdList *id_list;
196 int i;
197
198 assert(mc->possible_cpu_arch_ids);
199 id_list = mc->possible_cpu_arch_ids(machine);
200 state->dev_count = id_list->len;
201 state->devs = g_new0(typeof(*state->devs), state->dev_count);
202 for (i = 0; i < id_list->len; i++) {
203 state->devs[i].cpu = CPU(id_list->cpus[i].cpu);
204 state->devs[i].arch_id = id_list->cpus[i].arch_id;
205 }
206 memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state,
207 "acpi-mem-hotplug", ACPI_CPU_HOTPLUG_REG_LEN);
208 memory_region_add_subregion(as, base_addr, &state->ctrl_reg);
209}
210
211static AcpiCpuStatus *get_cpu_status(CPUHotplugState *cpu_st, DeviceState *dev)
212{
213 CPUClass *k = CPU_GET_CLASS(dev);
214 uint64_t cpu_arch_id = k->get_arch_id(CPU(dev));
215 int i;
216
217 for (i = 0; i < cpu_st->dev_count; i++) {
218 if (cpu_arch_id == cpu_st->devs[i].arch_id) {
219 return &cpu_st->devs[i];
220 }
221 }
222 return NULL;
223}
224
225void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
226 CPUHotplugState *cpu_st, DeviceState *dev, Error **errp)
227{
228 AcpiCpuStatus *cdev;
229
230 cdev = get_cpu_status(cpu_st, dev);
231 if (!cdev) {
232 return;
233 }
234
235 cdev->cpu = CPU(dev);
236 if (dev->hotplugged) {
237 cdev->is_inserting = true;
238 acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
239 }
240}
241
242void acpi_cpu_unplug_request_cb(HotplugHandler *hotplug_dev,
243 CPUHotplugState *cpu_st,
244 DeviceState *dev, Error **errp)
245{
246 AcpiCpuStatus *cdev;
247
248 cdev = get_cpu_status(cpu_st, dev);
249 if (!cdev) {
250 return;
251 }
252
253 cdev->is_removing = true;
254 acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
255}
256
257void acpi_cpu_unplug_cb(CPUHotplugState *cpu_st,
258 DeviceState *dev, Error **errp)
259{
260 AcpiCpuStatus *cdev;
261
262 cdev = get_cpu_status(cpu_st, dev);
263 if (!cdev) {
264 return;
265 }
266
267 cdev->cpu = NULL;
268}
269
270static const VMStateDescription vmstate_cpuhp_sts = {
271 .name = "CPU hotplug device state",
272 .version_id = 1,
273 .minimum_version_id = 1,
274 .minimum_version_id_old = 1,
275 .fields = (VMStateField[]) {
276 VMSTATE_BOOL(is_inserting, AcpiCpuStatus),
277 VMSTATE_BOOL(is_removing, AcpiCpuStatus),
278 VMSTATE_UINT32(ost_event, AcpiCpuStatus),
279 VMSTATE_UINT32(ost_status, AcpiCpuStatus),
280 VMSTATE_END_OF_LIST()
281 }
282};
283
284const VMStateDescription vmstate_cpu_hotplug = {
285 .name = "CPU hotplug state",
286 .version_id = 1,
287 .minimum_version_id = 1,
288 .minimum_version_id_old = 1,
289 .fields = (VMStateField[]) {
290 VMSTATE_UINT32(selector, CPUHotplugState),
291 VMSTATE_UINT8(command, CPUHotplugState),
292 VMSTATE_STRUCT_VARRAY_POINTER_UINT32(devs, CPUHotplugState, dev_count,
293 vmstate_cpuhp_sts, AcpiCpuStatus),
294 VMSTATE_END_OF_LIST()
295 }
296};
297
298#define CPU_NAME_FMT "C%.03X"
299#define CPUHP_RES_DEVICE "PRES"
300#define CPU_LOCK "CPLK"
301#define CPU_STS_METHOD "CSTA"
302#define CPU_SCAN_METHOD "CSCN"
303#define CPU_NOTIFY_METHOD "CTFY"
304#define CPU_EJECT_METHOD "CEJ0"
305#define CPU_OST_METHOD "COST"
306
307#define CPU_ENABLED "CPEN"
308#define CPU_SELECTOR "CSEL"
309#define CPU_COMMAND "CCMD"
310#define CPU_DATA "CDAT"
311#define CPU_INSERT_EVENT "CINS"
312#define CPU_REMOVE_EVENT "CRMV"
313#define CPU_EJECT_EVENT "CEJ0"
314
315void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
316 hwaddr io_base,
317 const char *res_root,
318 const char *event_handler_method)
319{
320 Aml *ifctx;
321 Aml *field;
322 Aml *method;
323 Aml *cpu_ctrl_dev;
324 Aml *cpus_dev;
325 Aml *zero = aml_int(0);
326 Aml *one = aml_int(1);
327 Aml *sb_scope = aml_scope("_SB");
328 MachineClass *mc = MACHINE_GET_CLASS(machine);
329 const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine);
330 char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root);
331 Object *obj = object_resolve_path_type("", TYPE_ACPI_DEVICE_IF, NULL);
332 AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj);
333 AcpiDeviceIf *adev = ACPI_DEVICE_IF(obj);
334
335 cpu_ctrl_dev = aml_device("%s", cphp_res_path);
336 {
337 Aml *crs;
338
339 aml_append(cpu_ctrl_dev,
340 aml_name_decl("_HID", aml_eisaid("PNP0A06")));
341 aml_append(cpu_ctrl_dev,
342 aml_name_decl("_UID", aml_string("CPU Hotplug resources")));
343 aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0));
344
345 crs = aml_resource_template();
346 aml_append(crs, aml_io(AML_DECODE16, io_base, io_base, 1,
347 ACPI_CPU_HOTPLUG_REG_LEN));
348 aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs));
349
350 /* declare CPU hotplug MMIO region with related access fields */
351 aml_append(cpu_ctrl_dev,
352 aml_operation_region("PRST", AML_SYSTEM_IO, aml_int(io_base),
353 ACPI_CPU_HOTPLUG_REG_LEN));
354
355 field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK,
356 AML_WRITE_AS_ZEROS);
357 aml_append(field, aml_reserved_field(ACPI_CPU_FLAGS_OFFSET_RW * 8));
358 /* 1 if enabled, read only */
359 aml_append(field, aml_named_field(CPU_ENABLED, 1));
360 /* (read) 1 if has a insert event. (write) 1 to clear event */
361 aml_append(field, aml_named_field(CPU_INSERT_EVENT, 1));
362 /* (read) 1 if has a remove event. (write) 1 to clear event */
363 aml_append(field, aml_named_field(CPU_REMOVE_EVENT, 1));
364 /* initiates device eject, write only */
365 aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1));
366 aml_append(field, aml_reserved_field(4));
367 aml_append(field, aml_named_field(CPU_COMMAND, 8));
368 aml_append(cpu_ctrl_dev, field);
369
370 field = aml_field("PRST", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE);
371 /* CPU selector, write only */
372 aml_append(field, aml_named_field(CPU_SELECTOR, 32));
373 /* flags + cmd + 2byte align */
374 aml_append(field, aml_reserved_field(4 * 8));
375 aml_append(field, aml_named_field(CPU_DATA, 32));
376 aml_append(cpu_ctrl_dev, field);
377
378 if (opts.has_legacy_cphp) {
379 method = aml_method("_INI", 0, AML_SERIALIZED);
380 /* switch off legacy CPU hotplug HW and use new one,
381 * on reboot system is in new mode and writing 0
382 * in CPU_SELECTOR selects BSP, which is NOP at
383 * the time _INI is called */
384 aml_append(method, aml_store(zero, aml_name(CPU_SELECTOR)));
385 aml_append(cpu_ctrl_dev, method);
386 }
387 }
388 aml_append(sb_scope, cpu_ctrl_dev);
389
390 cpus_dev = aml_device("\\_SB.CPUS");
391 {
392 int i;
393 Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK);
394 Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR);
395 Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED);
396 Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND);
397 Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA);
398 Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT);
399 Aml *rm_evt = aml_name("%s.%s", cphp_res_path, CPU_REMOVE_EVENT);
400 Aml *ej_evt = aml_name("%s.%s", cphp_res_path, CPU_EJECT_EVENT);
401
402 aml_append(cpus_dev, aml_name_decl("_HID", aml_string("ACPI0010")));
403 aml_append(cpus_dev, aml_name_decl("_CID", aml_eisaid("PNP0A05")));
404
405 method = aml_method(CPU_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
406 for (i = 0; i < arch_ids->len; i++) {
407 Aml *cpu = aml_name(CPU_NAME_FMT, i);
408 Aml *uid = aml_arg(0);
409 Aml *event = aml_arg(1);
410
411 ifctx = aml_if(aml_equal(uid, aml_int(i)));
412 {
413 aml_append(ifctx, aml_notify(cpu, event));
414 }
415 aml_append(method, ifctx);
416 }
417 aml_append(cpus_dev, method);
418
419 method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED);
420 {
421 Aml *idx = aml_arg(0);
422 Aml *sta = aml_local(0);
423
424 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
425 aml_append(method, aml_store(idx, cpu_selector));
426 aml_append(method, aml_store(zero, sta));
427 ifctx = aml_if(aml_equal(is_enabled, one));
428 {
429 aml_append(ifctx, aml_store(aml_int(0xF), sta));
430 }
431 aml_append(method, ifctx);
432 aml_append(method, aml_release(ctrl_lock));
433 aml_append(method, aml_return(sta));
434 }
435 aml_append(cpus_dev, method);
436
437 method = aml_method(CPU_EJECT_METHOD, 1, AML_SERIALIZED);
438 {
439 Aml *idx = aml_arg(0);
440
441 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
442 aml_append(method, aml_store(idx, cpu_selector));
443 aml_append(method, aml_store(one, ej_evt));
444 aml_append(method, aml_release(ctrl_lock));
445 }
446 aml_append(cpus_dev, method);
447
448 method = aml_method(CPU_SCAN_METHOD, 0, AML_SERIALIZED);
449 {
450 Aml *else_ctx;
451 Aml *while_ctx;
452 Aml *has_event = aml_local(0);
453 Aml *dev_chk = aml_int(1);
454 Aml *eject_req = aml_int(3);
455 Aml *next_cpu_cmd = aml_int(CPHP_GET_NEXT_CPU_WITH_EVENT_CMD);
456
457 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
458 aml_append(method, aml_store(one, has_event));
459 while_ctx = aml_while(aml_equal(has_event, one));
460 {
461 /* clear loop exit condition, ins_evt/rm_evt checks
462 * will set it to 1 while next_cpu_cmd returns a CPU
463 * with events */
464 aml_append(while_ctx, aml_store(zero, has_event));
465 aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd));
466 ifctx = aml_if(aml_equal(ins_evt, one));
467 {
468 aml_append(ifctx,
469 aml_call2(CPU_NOTIFY_METHOD, cpu_data, dev_chk));
470 aml_append(ifctx, aml_store(one, ins_evt));
471 aml_append(ifctx, aml_store(one, has_event));
472 }
473 aml_append(while_ctx, ifctx);
474 else_ctx = aml_else();
475 ifctx = aml_if(aml_equal(rm_evt, one));
476 {
477 aml_append(ifctx,
478 aml_call2(CPU_NOTIFY_METHOD, cpu_data, eject_req));
479 aml_append(ifctx, aml_store(one, rm_evt));
480 aml_append(ifctx, aml_store(one, has_event));
481 }
482 aml_append(else_ctx, ifctx);
483 aml_append(while_ctx, else_ctx);
484 }
485 aml_append(method, while_ctx);
486 aml_append(method, aml_release(ctrl_lock));
487 }
488 aml_append(cpus_dev, method);
489
490 method = aml_method(CPU_OST_METHOD, 4, AML_SERIALIZED);
491 {
492 Aml *uid = aml_arg(0);
493 Aml *ev_cmd = aml_int(CPHP_OST_EVENT_CMD);
494 Aml *st_cmd = aml_int(CPHP_OST_STATUS_CMD);
495
496 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
497 aml_append(method, aml_store(uid, cpu_selector));
498 aml_append(method, aml_store(ev_cmd, cpu_cmd));
499 aml_append(method, aml_store(aml_arg(1), cpu_data));
500 aml_append(method, aml_store(st_cmd, cpu_cmd));
501 aml_append(method, aml_store(aml_arg(2), cpu_data));
502 aml_append(method, aml_release(ctrl_lock));
503 }
504 aml_append(cpus_dev, method);
505
506 /* build Processor object for each processor */
507 for (i = 0; i < arch_ids->len; i++) {
508 Aml *dev;
509 Aml *uid = aml_int(i);
510 GArray *madt_buf = g_array_new(0, 1, 1);
511 int arch_id = arch_ids->cpus[i].arch_id;
512
513 if (opts.acpi_1_compatible && arch_id < 255) {
514 dev = aml_processor(i, 0, 0, CPU_NAME_FMT, i);
515 } else {
516 dev = aml_device(CPU_NAME_FMT, i);
517 aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007")));
518 aml_append(dev, aml_name_decl("_UID", uid));
519 }
520
521 method = aml_method("_STA", 0, AML_SERIALIZED);
522 aml_append(method, aml_return(aml_call1(CPU_STS_METHOD, uid)));
523 aml_append(dev, method);
524
525 /* build _MAT object */
526 assert(adevc && adevc->madt_cpu);
527 adevc->madt_cpu(adev, i, arch_ids, madt_buf);
528 switch (madt_buf->data[0]) {
529 case ACPI_APIC_PROCESSOR: {
530 AcpiMadtProcessorApic *apic = (void *)madt_buf->data;
531 apic->flags = cpu_to_le32(1);
532 break;
533 }
534 case ACPI_APIC_LOCAL_X2APIC: {
535 AcpiMadtProcessorX2Apic *apic = (void *)madt_buf->data;
536 apic->flags = cpu_to_le32(1);
537 break;
538 }
539 default:
540 assert(0);
541 }
542 aml_append(dev, aml_name_decl("_MAT",
543 aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data)));
544 g_array_free(madt_buf, true);
545
546 if (CPU(arch_ids->cpus[i].cpu) != first_cpu) {
547 method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
548 aml_append(method, aml_call1(CPU_EJECT_METHOD, uid));
549 aml_append(dev, method);
550 }
551
552 method = aml_method("_OST", 3, AML_SERIALIZED);
553 aml_append(method,
554 aml_call4(CPU_OST_METHOD, uid, aml_arg(0),
555 aml_arg(1), aml_arg(2))
556 );
557 aml_append(dev, method);
558
559 /* Linux guests discard SRAT info for non-present CPUs
560 * as a result _PXM is required for all CPUs which might
561 * be hot-plugged. For simplicity, add it for all CPUs.
562 */
563 if (arch_ids->cpus[i].props.has_node_id) {
564 aml_append(dev, aml_name_decl("_PXM",
565 aml_int(arch_ids->cpus[i].props.node_id)));
566 }
567
568 aml_append(cpus_dev, dev);
569 }
570 }
571 aml_append(sb_scope, cpus_dev);
572 aml_append(table, sb_scope);
573
574 method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED);
575 aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD));
576 aml_append(table, method);
577
578 g_free(cphp_res_path);
579}
580