1 | /* |
2 | * QEMU Alpha PCI support functions. |
3 | * |
4 | * Some of this isn't very Alpha specific at all. |
5 | * |
6 | * ??? Sparse memory access not implemented. |
7 | */ |
8 | |
9 | #include "qemu/osdep.h" |
10 | #include "alpha_sys.h" |
11 | #include "qemu/log.h" |
12 | #include "trace.h" |
13 | |
14 | |
15 | /* Fallback for unassigned PCI I/O operations. Avoids MCHK. */ |
16 | |
17 | static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size) |
18 | { |
19 | return 0; |
20 | } |
21 | |
22 | static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size) |
23 | { |
24 | } |
25 | |
26 | const MemoryRegionOps alpha_pci_ignore_ops = { |
27 | .read = ignore_read, |
28 | .write = ignore_write, |
29 | .endianness = DEVICE_LITTLE_ENDIAN, |
30 | .valid = { |
31 | .min_access_size = 1, |
32 | .max_access_size = 8, |
33 | }, |
34 | .impl = { |
35 | .min_access_size = 1, |
36 | .max_access_size = 8, |
37 | }, |
38 | }; |
39 | |
40 | |
41 | /* PCI config space reads/writes, to byte-word addressable memory. */ |
42 | static uint64_t bw_conf1_read(void *opaque, hwaddr addr, |
43 | unsigned size) |
44 | { |
45 | PCIBus *b = opaque; |
46 | return pci_data_read(b, addr, size); |
47 | } |
48 | |
49 | static void bw_conf1_write(void *opaque, hwaddr addr, |
50 | uint64_t val, unsigned size) |
51 | { |
52 | PCIBus *b = opaque; |
53 | pci_data_write(b, addr, val, size); |
54 | } |
55 | |
56 | const MemoryRegionOps alpha_pci_conf1_ops = { |
57 | .read = bw_conf1_read, |
58 | .write = bw_conf1_write, |
59 | .endianness = DEVICE_LITTLE_ENDIAN, |
60 | .impl = { |
61 | .min_access_size = 1, |
62 | .max_access_size = 4, |
63 | }, |
64 | }; |
65 | |
66 | /* PCI/EISA Interrupt Acknowledge Cycle. */ |
67 | |
68 | static uint64_t iack_read(void *opaque, hwaddr addr, unsigned size) |
69 | { |
70 | return pic_read_irq(isa_pic); |
71 | } |
72 | |
73 | static void special_write(void *opaque, hwaddr addr, |
74 | uint64_t val, unsigned size) |
75 | { |
76 | trace_alpha_pci_iack_write(); |
77 | } |
78 | |
79 | const MemoryRegionOps alpha_pci_iack_ops = { |
80 | .read = iack_read, |
81 | .write = special_write, |
82 | .endianness = DEVICE_LITTLE_ENDIAN, |
83 | .valid = { |
84 | .min_access_size = 4, |
85 | .max_access_size = 4, |
86 | }, |
87 | .impl = { |
88 | .min_access_size = 4, |
89 | .max_access_size = 4, |
90 | }, |
91 | }; |
92 | |