1 | /* |
2 | * QEMU ISA MM VGA Emulator. |
3 | * |
4 | * Copyright (c) 2003 Fabrice Bellard |
5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
7 | * of this software and associated documentation files (the "Software"), to deal |
8 | * in the Software without restriction, including without limitation the rights |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
10 | * copies of the Software, and to permit persons to whom the Software is |
11 | * furnished to do so, subject to the following conditions: |
12 | * |
13 | * The above copyright notice and this permission notice shall be included in |
14 | * all copies or substantial portions of the Software. |
15 | * |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
22 | * THE SOFTWARE. |
23 | */ |
24 | |
25 | #include "qemu/osdep.h" |
26 | #include "qemu/bitops.h" |
27 | #include "qemu/units.h" |
28 | #include "migration/vmstate.h" |
29 | #include "hw/display/vga.h" |
30 | #include "vga_int.h" |
31 | #include "ui/pixel_ops.h" |
32 | |
33 | #define VGA_RAM_SIZE (8 * MiB) |
34 | |
35 | typedef struct ISAVGAMMState { |
36 | VGACommonState vga; |
37 | int it_shift; |
38 | } ISAVGAMMState; |
39 | |
40 | /* Memory mapped interface */ |
41 | static uint64_t vga_mm_read(void *opaque, hwaddr addr, unsigned size) |
42 | { |
43 | ISAVGAMMState *s = opaque; |
44 | |
45 | return vga_ioport_read(&s->vga, addr >> s->it_shift) & |
46 | MAKE_64BIT_MASK(0, size * 8); |
47 | } |
48 | |
49 | static void vga_mm_write(void *opaque, hwaddr addr, uint64_t value, |
50 | unsigned size) |
51 | { |
52 | ISAVGAMMState *s = opaque; |
53 | |
54 | vga_ioport_write(&s->vga, addr >> s->it_shift, |
55 | value & MAKE_64BIT_MASK(0, size * 8)); |
56 | } |
57 | |
58 | static const MemoryRegionOps vga_mm_ctrl_ops = { |
59 | .read = vga_mm_read, |
60 | .write = vga_mm_write, |
61 | .valid.min_access_size = 1, |
62 | .valid.max_access_size = 4, |
63 | .impl.min_access_size = 1, |
64 | .impl.max_access_size = 4, |
65 | .endianness = DEVICE_NATIVE_ENDIAN, |
66 | }; |
67 | |
68 | static void vga_mm_init(ISAVGAMMState *s, hwaddr vram_base, |
69 | hwaddr ctrl_base, int it_shift, |
70 | MemoryRegion *address_space) |
71 | { |
72 | MemoryRegion *s_ioport_ctrl, *vga_io_memory; |
73 | |
74 | s->it_shift = it_shift; |
75 | s_ioport_ctrl = g_malloc(sizeof(*s_ioport_ctrl)); |
76 | memory_region_init_io(s_ioport_ctrl, NULL, &vga_mm_ctrl_ops, s, |
77 | "vga-mm-ctrl" , 0x100000); |
78 | memory_region_set_flush_coalesced(s_ioport_ctrl); |
79 | |
80 | vga_io_memory = g_malloc(sizeof(*vga_io_memory)); |
81 | /* XXX: endianness? */ |
82 | memory_region_init_io(vga_io_memory, NULL, &vga_mem_ops, &s->vga, |
83 | "vga-mem" , 0x20000); |
84 | |
85 | vmstate_register(NULL, 0, &vmstate_vga_common, s); |
86 | |
87 | memory_region_add_subregion(address_space, ctrl_base, s_ioport_ctrl); |
88 | s->vga.bank_offset = 0; |
89 | memory_region_add_subregion(address_space, |
90 | vram_base + 0x000a0000, vga_io_memory); |
91 | memory_region_set_coalescing(vga_io_memory); |
92 | } |
93 | |
94 | int isa_vga_mm_init(hwaddr vram_base, |
95 | hwaddr ctrl_base, int it_shift, |
96 | MemoryRegion *address_space) |
97 | { |
98 | ISAVGAMMState *s; |
99 | |
100 | s = g_malloc0(sizeof(*s)); |
101 | |
102 | s->vga.vram_size_mb = VGA_RAM_SIZE / MiB; |
103 | s->vga.global_vmstate = true; |
104 | vga_common_init(&s->vga, NULL); |
105 | vga_mm_init(s, vram_base, ctrl_base, it_shift, address_space); |
106 | |
107 | s->vga.con = graphic_console_init(NULL, 0, s->vga.hw_ops, s); |
108 | |
109 | vga_init_vbe(&s->vga, NULL, address_space); |
110 | return 0; |
111 | } |
112 | |