1 | /* |
2 | * Copyright (c) 2006-2008 Openedhand Ltd. |
3 | * Written by Andrzej Zaborowski <balrog@zabor.org> |
4 | * |
5 | * This program is free software; you can redistribute it and/or |
6 | * modify it under the terms of the GNU General Public License as |
7 | * published by the Free Software Foundation; either version 2 or |
8 | * (at your option) version 3 of the License. |
9 | * |
10 | * This program is distributed in the hope that it will be useful, |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
13 | * GNU General Public License for more details. |
14 | * |
15 | * You should have received a copy of the GNU General Public License along |
16 | * with this program; if not, see <http://www.gnu.org/licenses/>. |
17 | */ |
18 | |
19 | #include "qemu/osdep.h" |
20 | #include "hw/irq.h" |
21 | #include "hw/arm/sharpsl.h" |
22 | #include "hw/sysbus.h" |
23 | #include "migration/vmstate.h" |
24 | #include "qemu/module.h" |
25 | |
26 | #undef REG_FMT |
27 | #define REG_FMT "0x%02lx" |
28 | |
29 | /* SCOOP devices */ |
30 | |
31 | #define TYPE_SCOOP "scoop" |
32 | #define SCOOP(obj) OBJECT_CHECK(ScoopInfo, (obj), TYPE_SCOOP) |
33 | |
34 | typedef struct ScoopInfo ScoopInfo; |
35 | struct ScoopInfo { |
36 | SysBusDevice parent_obj; |
37 | |
38 | qemu_irq handler[16]; |
39 | MemoryRegion iomem; |
40 | uint16_t status; |
41 | uint16_t power; |
42 | uint32_t gpio_level; |
43 | uint32_t gpio_dir; |
44 | uint32_t prev_level; |
45 | |
46 | uint16_t mcr; |
47 | uint16_t cdr; |
48 | uint16_t ccr; |
49 | uint16_t irr; |
50 | uint16_t imr; |
51 | uint16_t isr; |
52 | }; |
53 | |
54 | #define SCOOP_MCR 0x00 |
55 | #define SCOOP_CDR 0x04 |
56 | #define SCOOP_CSR 0x08 |
57 | #define SCOOP_CPR 0x0c |
58 | #define SCOOP_CCR 0x10 |
59 | #define SCOOP_IRR_IRM 0x14 |
60 | #define SCOOP_IMR 0x18 |
61 | #define SCOOP_ISR 0x1c |
62 | #define SCOOP_GPCR 0x20 |
63 | #define SCOOP_GPWR 0x24 |
64 | #define SCOOP_GPRR 0x28 |
65 | |
66 | static inline void scoop_gpio_handler_update(ScoopInfo *s) { |
67 | uint32_t level, diff; |
68 | int bit; |
69 | level = s->gpio_level & s->gpio_dir; |
70 | |
71 | for (diff = s->prev_level ^ level; diff; diff ^= 1 << bit) { |
72 | bit = ctz32(diff); |
73 | qemu_set_irq(s->handler[bit], (level >> bit) & 1); |
74 | } |
75 | |
76 | s->prev_level = level; |
77 | } |
78 | |
79 | static uint64_t scoop_read(void *opaque, hwaddr addr, |
80 | unsigned size) |
81 | { |
82 | ScoopInfo *s = (ScoopInfo *) opaque; |
83 | |
84 | switch (addr & 0x3f) { |
85 | case SCOOP_MCR: |
86 | return s->mcr; |
87 | case SCOOP_CDR: |
88 | return s->cdr; |
89 | case SCOOP_CSR: |
90 | return s->status; |
91 | case SCOOP_CPR: |
92 | return s->power; |
93 | case SCOOP_CCR: |
94 | return s->ccr; |
95 | case SCOOP_IRR_IRM: |
96 | return s->irr; |
97 | case SCOOP_IMR: |
98 | return s->imr; |
99 | case SCOOP_ISR: |
100 | return s->isr; |
101 | case SCOOP_GPCR: |
102 | return s->gpio_dir; |
103 | case SCOOP_GPWR: |
104 | case SCOOP_GPRR: |
105 | return s->gpio_level; |
106 | default: |
107 | zaurus_printf("Bad register offset " REG_FMT "\n" , (unsigned long)addr); |
108 | } |
109 | |
110 | return 0; |
111 | } |
112 | |
113 | static void scoop_write(void *opaque, hwaddr addr, |
114 | uint64_t value, unsigned size) |
115 | { |
116 | ScoopInfo *s = (ScoopInfo *) opaque; |
117 | value &= 0xffff; |
118 | |
119 | switch (addr & 0x3f) { |
120 | case SCOOP_MCR: |
121 | s->mcr = value; |
122 | break; |
123 | case SCOOP_CDR: |
124 | s->cdr = value; |
125 | break; |
126 | case SCOOP_CPR: |
127 | s->power = value; |
128 | if (value & 0x80) |
129 | s->power |= 0x8040; |
130 | break; |
131 | case SCOOP_CCR: |
132 | s->ccr = value; |
133 | break; |
134 | case SCOOP_IRR_IRM: |
135 | s->irr = value; |
136 | break; |
137 | case SCOOP_IMR: |
138 | s->imr = value; |
139 | break; |
140 | case SCOOP_ISR: |
141 | s->isr = value; |
142 | break; |
143 | case SCOOP_GPCR: |
144 | s->gpio_dir = value; |
145 | scoop_gpio_handler_update(s); |
146 | break; |
147 | case SCOOP_GPWR: |
148 | case SCOOP_GPRR: /* GPRR is probably R/O in real HW */ |
149 | s->gpio_level = value & s->gpio_dir; |
150 | scoop_gpio_handler_update(s); |
151 | break; |
152 | default: |
153 | zaurus_printf("Bad register offset " REG_FMT "\n" , (unsigned long)addr); |
154 | } |
155 | } |
156 | |
157 | static const MemoryRegionOps scoop_ops = { |
158 | .read = scoop_read, |
159 | .write = scoop_write, |
160 | .endianness = DEVICE_NATIVE_ENDIAN, |
161 | }; |
162 | |
163 | static void scoop_gpio_set(void *opaque, int line, int level) |
164 | { |
165 | ScoopInfo *s = (ScoopInfo *) opaque; |
166 | |
167 | if (level) |
168 | s->gpio_level |= (1 << line); |
169 | else |
170 | s->gpio_level &= ~(1 << line); |
171 | } |
172 | |
173 | static void scoop_init(Object *obj) |
174 | { |
175 | DeviceState *dev = DEVICE(obj); |
176 | ScoopInfo *s = SCOOP(obj); |
177 | SysBusDevice *sbd = SYS_BUS_DEVICE(obj); |
178 | |
179 | s->status = 0x02; |
180 | qdev_init_gpio_out(dev, s->handler, 16); |
181 | qdev_init_gpio_in(dev, scoop_gpio_set, 16); |
182 | memory_region_init_io(&s->iomem, obj, &scoop_ops, s, "scoop" , 0x1000); |
183 | |
184 | sysbus_init_mmio(sbd, &s->iomem); |
185 | } |
186 | |
187 | static int scoop_post_load(void *opaque, int version_id) |
188 | { |
189 | ScoopInfo *s = (ScoopInfo *) opaque; |
190 | int i; |
191 | uint32_t level; |
192 | |
193 | level = s->gpio_level & s->gpio_dir; |
194 | |
195 | for (i = 0; i < 16; i++) { |
196 | qemu_set_irq(s->handler[i], (level >> i) & 1); |
197 | } |
198 | |
199 | s->prev_level = level; |
200 | |
201 | return 0; |
202 | } |
203 | |
204 | static bool is_version_0 (void *opaque, int version_id) |
205 | { |
206 | return version_id == 0; |
207 | } |
208 | |
209 | static bool vmstate_scoop_validate(void *opaque, int version_id) |
210 | { |
211 | ScoopInfo *s = opaque; |
212 | |
213 | return !(s->prev_level & 0xffff0000) && |
214 | !(s->gpio_level & 0xffff0000) && |
215 | !(s->gpio_dir & 0xffff0000); |
216 | } |
217 | |
218 | static const VMStateDescription vmstate_scoop_regs = { |
219 | .name = "scoop" , |
220 | .version_id = 1, |
221 | .minimum_version_id = 0, |
222 | .post_load = scoop_post_load, |
223 | .fields = (VMStateField[]) { |
224 | VMSTATE_UINT16(status, ScoopInfo), |
225 | VMSTATE_UINT16(power, ScoopInfo), |
226 | VMSTATE_UINT32(gpio_level, ScoopInfo), |
227 | VMSTATE_UINT32(gpio_dir, ScoopInfo), |
228 | VMSTATE_UINT32(prev_level, ScoopInfo), |
229 | VMSTATE_VALIDATE("irq levels are 16 bit" , vmstate_scoop_validate), |
230 | VMSTATE_UINT16(mcr, ScoopInfo), |
231 | VMSTATE_UINT16(cdr, ScoopInfo), |
232 | VMSTATE_UINT16(ccr, ScoopInfo), |
233 | VMSTATE_UINT16(irr, ScoopInfo), |
234 | VMSTATE_UINT16(imr, ScoopInfo), |
235 | VMSTATE_UINT16(isr, ScoopInfo), |
236 | VMSTATE_UNUSED_TEST(is_version_0, 2), |
237 | VMSTATE_END_OF_LIST(), |
238 | }, |
239 | }; |
240 | |
241 | static void scoop_sysbus_class_init(ObjectClass *klass, void *data) |
242 | { |
243 | DeviceClass *dc = DEVICE_CLASS(klass); |
244 | |
245 | dc->desc = "Scoop2 Sharp custom ASIC" ; |
246 | dc->vmsd = &vmstate_scoop_regs; |
247 | } |
248 | |
249 | static const TypeInfo scoop_sysbus_info = { |
250 | .name = TYPE_SCOOP, |
251 | .parent = TYPE_SYS_BUS_DEVICE, |
252 | .instance_size = sizeof(ScoopInfo), |
253 | .instance_init = scoop_init, |
254 | .class_init = scoop_sysbus_class_init, |
255 | }; |
256 | |
257 | static void scoop_register_types(void) |
258 | { |
259 | type_register_static(&scoop_sysbus_info); |
260 | } |
261 | |
262 | type_init(scoop_register_types) |
263 | |
264 | /* Write the bootloader parameters memory area. */ |
265 | |
266 | #define MAGIC_CHG(a, b, c, d) ((d << 24) | (c << 16) | (b << 8) | a) |
267 | |
268 | static struct QEMU_PACKED sl_param_info { |
269 | uint32_t comadj_keyword; |
270 | int32_t comadj; |
271 | |
272 | uint32_t uuid_keyword; |
273 | char uuid[16]; |
274 | |
275 | uint32_t touch_keyword; |
276 | int32_t touch_xp; |
277 | int32_t touch_yp; |
278 | int32_t touch_xd; |
279 | int32_t touch_yd; |
280 | |
281 | uint32_t adadj_keyword; |
282 | int32_t adadj; |
283 | |
284 | uint32_t phad_keyword; |
285 | int32_t phadadj; |
286 | } zaurus_bootparam = { |
287 | .comadj_keyword = MAGIC_CHG('C', 'M', 'A', 'D'), |
288 | .comadj = 125, |
289 | .uuid_keyword = MAGIC_CHG('U', 'U', 'I', 'D'), |
290 | .uuid = { -1 }, |
291 | .touch_keyword = MAGIC_CHG('T', 'U', 'C', 'H'), |
292 | .touch_xp = -1, |
293 | .adadj_keyword = MAGIC_CHG('B', 'V', 'A', 'D'), |
294 | .adadj = -1, |
295 | .phad_keyword = MAGIC_CHG('P', 'H', 'A', 'D'), |
296 | .phadadj = 0x01, |
297 | }; |
298 | |
299 | void sl_bootparam_write(hwaddr ptr) |
300 | { |
301 | cpu_physical_memory_write(ptr, &zaurus_bootparam, |
302 | sizeof(struct sl_param_info)); |
303 | } |
304 | |