1 | /* |
2 | * QEMU HP-PARISC PCI support functions. |
3 | * |
4 | */ |
5 | |
6 | #include "qemu/osdep.h" |
7 | #include "hppa_sys.h" |
8 | #include "qemu/log.h" |
9 | #include "trace.h" |
10 | |
11 | |
12 | /* Fallback for unassigned PCI I/O operations. Avoids MCHK. */ |
13 | |
14 | static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size) |
15 | { |
16 | return 0; |
17 | } |
18 | |
19 | static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size) |
20 | { |
21 | } |
22 | |
23 | const MemoryRegionOps hppa_pci_ignore_ops = { |
24 | .read = ignore_read, |
25 | .write = ignore_write, |
26 | .endianness = DEVICE_BIG_ENDIAN, |
27 | .valid = { |
28 | .min_access_size = 1, |
29 | .max_access_size = 8, |
30 | }, |
31 | .impl = { |
32 | .min_access_size = 1, |
33 | .max_access_size = 8, |
34 | }, |
35 | }; |
36 | |
37 | |
38 | /* PCI config space reads/writes, to byte-word addressable memory. */ |
39 | static uint64_t bw_conf1_read(void *opaque, hwaddr addr, |
40 | unsigned size) |
41 | { |
42 | PCIBus *b = opaque; |
43 | return pci_data_read(b, addr, size); |
44 | } |
45 | |
46 | static void bw_conf1_write(void *opaque, hwaddr addr, |
47 | uint64_t val, unsigned size) |
48 | { |
49 | PCIBus *b = opaque; |
50 | pci_data_write(b, addr, val, size); |
51 | } |
52 | |
53 | const MemoryRegionOps hppa_pci_conf1_ops = { |
54 | .read = bw_conf1_read, |
55 | .write = bw_conf1_write, |
56 | .endianness = DEVICE_BIG_ENDIAN, |
57 | .impl = { |
58 | .min_access_size = 1, |
59 | .max_access_size = 4, |
60 | }, |
61 | }; |
62 | |
63 | /* PCI/EISA Interrupt Acknowledge Cycle. */ |
64 | |
65 | static uint64_t iack_read(void *opaque, hwaddr addr, unsigned size) |
66 | { |
67 | return pic_read_irq(isa_pic); |
68 | } |
69 | |
70 | static void special_write(void *opaque, hwaddr addr, |
71 | uint64_t val, unsigned size) |
72 | { |
73 | trace_hppa_pci_iack_write(); |
74 | } |
75 | |
76 | const MemoryRegionOps hppa_pci_iack_ops = { |
77 | .read = iack_read, |
78 | .write = special_write, |
79 | .endianness = DEVICE_BIG_ENDIAN, |
80 | .valid = { |
81 | .min_access_size = 4, |
82 | .max_access_size = 4, |
83 | }, |
84 | .impl = { |
85 | .min_access_size = 4, |
86 | .max_access_size = 4, |
87 | }, |
88 | }; |
89 | |