1 | /* |
2 | * ARM Versatile I2C controller |
3 | * |
4 | * Copyright (c) 2006-2007 CodeSourcery. |
5 | * Copyright (c) 2012 Oskar Andero <oskar.andero@gmail.com> |
6 | * |
7 | * This file is derived from hw/realview.c by Paul Brook |
8 | * |
9 | * This program is free software; you can redistribute it and/or |
10 | * modify it under the terms of the GNU General Public License |
11 | * as published by the Free Software Foundation; either version 2 |
12 | * of the License, or (at your option) any later version. |
13 | * |
14 | * This program is distributed in the hope that it will be useful, |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
17 | * GNU General Public License for more details. |
18 | * |
19 | * You should have received a copy of the GNU General Public License |
20 | * along with this program; if not, see <http://www.gnu.org/licenses/>. |
21 | * |
22 | */ |
23 | |
24 | #include "qemu/osdep.h" |
25 | #include "hw/sysbus.h" |
26 | #include "hw/i2c/bitbang_i2c.h" |
27 | #include "qemu/log.h" |
28 | #include "qemu/module.h" |
29 | |
30 | #define TYPE_VERSATILE_I2C "versatile_i2c" |
31 | #define VERSATILE_I2C(obj) \ |
32 | OBJECT_CHECK(VersatileI2CState, (obj), TYPE_VERSATILE_I2C) |
33 | |
34 | typedef struct VersatileI2CState { |
35 | SysBusDevice parent_obj; |
36 | |
37 | MemoryRegion iomem; |
38 | bitbang_i2c_interface bitbang; |
39 | int out; |
40 | int in; |
41 | } VersatileI2CState; |
42 | |
43 | static uint64_t versatile_i2c_read(void *opaque, hwaddr offset, |
44 | unsigned size) |
45 | { |
46 | VersatileI2CState *s = (VersatileI2CState *)opaque; |
47 | |
48 | if (offset == 0) { |
49 | return (s->out & 1) | (s->in << 1); |
50 | } else { |
51 | qemu_log_mask(LOG_GUEST_ERROR, |
52 | "%s: Bad offset 0x%x\n" , __func__, (int)offset); |
53 | return -1; |
54 | } |
55 | } |
56 | |
57 | static void versatile_i2c_write(void *opaque, hwaddr offset, |
58 | uint64_t value, unsigned size) |
59 | { |
60 | VersatileI2CState *s = (VersatileI2CState *)opaque; |
61 | |
62 | switch (offset) { |
63 | case 0: |
64 | s->out |= value & 3; |
65 | break; |
66 | case 4: |
67 | s->out &= ~value; |
68 | break; |
69 | default: |
70 | qemu_log_mask(LOG_GUEST_ERROR, |
71 | "%s: Bad offset 0x%x\n" , __func__, (int)offset); |
72 | } |
73 | bitbang_i2c_set(&s->bitbang, BITBANG_I2C_SCL, (s->out & 1) != 0); |
74 | s->in = bitbang_i2c_set(&s->bitbang, BITBANG_I2C_SDA, (s->out & 2) != 0); |
75 | } |
76 | |
77 | static const MemoryRegionOps versatile_i2c_ops = { |
78 | .read = versatile_i2c_read, |
79 | .write = versatile_i2c_write, |
80 | .endianness = DEVICE_NATIVE_ENDIAN, |
81 | }; |
82 | |
83 | static void versatile_i2c_init(Object *obj) |
84 | { |
85 | DeviceState *dev = DEVICE(obj); |
86 | VersatileI2CState *s = VERSATILE_I2C(obj); |
87 | SysBusDevice *sbd = SYS_BUS_DEVICE(obj); |
88 | I2CBus *bus; |
89 | |
90 | bus = i2c_init_bus(dev, "i2c" ); |
91 | bitbang_i2c_init(&s->bitbang, bus); |
92 | memory_region_init_io(&s->iomem, obj, &versatile_i2c_ops, s, |
93 | "versatile_i2c" , 0x1000); |
94 | sysbus_init_mmio(sbd, &s->iomem); |
95 | } |
96 | |
97 | static const TypeInfo versatile_i2c_info = { |
98 | .name = TYPE_VERSATILE_I2C, |
99 | .parent = TYPE_SYS_BUS_DEVICE, |
100 | .instance_size = sizeof(VersatileI2CState), |
101 | .instance_init = versatile_i2c_init, |
102 | }; |
103 | |
104 | static void versatile_i2c_register_types(void) |
105 | { |
106 | type_register_static(&versatile_i2c_info); |
107 | } |
108 | |
109 | type_init(versatile_i2c_register_types) |
110 | |