1/*
2 * Xilinx Zynq MPSoC PMU (Power Management Unit) emulation
3 *
4 * Copyright (C) 2017 Xilinx Inc
5 * Written by Alistair Francis <alistair.francis@xilinx.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
16 */
17
18#include "qemu/osdep.h"
19#include "qapi/error.h"
20#include "exec/address-spaces.h"
21#include "hw/boards.h"
22#include "cpu.h"
23#include "boot.h"
24
25#include "hw/intc/xlnx-zynqmp-ipi.h"
26#include "hw/intc/xlnx-pmu-iomod-intc.h"
27
28/* Define the PMU device */
29
30#define TYPE_XLNX_ZYNQMP_PMU_SOC "xlnx,zynqmp-pmu-soc"
31#define XLNX_ZYNQMP_PMU_SOC(obj) OBJECT_CHECK(XlnxZynqMPPMUSoCState, (obj), \
32 TYPE_XLNX_ZYNQMP_PMU_SOC)
33
34#define XLNX_ZYNQMP_PMU_ROM_SIZE 0x8000
35#define XLNX_ZYNQMP_PMU_ROM_ADDR 0xFFD00000
36#define XLNX_ZYNQMP_PMU_RAM_ADDR 0xFFDC0000
37
38#define XLNX_ZYNQMP_PMU_INTC_ADDR 0xFFD40000
39
40#define XLNX_ZYNQMP_PMU_NUM_IPIS 4
41
42static const uint64_t ipi_addr[XLNX_ZYNQMP_PMU_NUM_IPIS] = {
43 0xFF340000, 0xFF350000, 0xFF360000, 0xFF370000,
44};
45static const uint64_t ipi_irq[XLNX_ZYNQMP_PMU_NUM_IPIS] = {
46 19, 20, 21, 22,
47};
48
49typedef struct XlnxZynqMPPMUSoCState {
50 /*< private >*/
51 DeviceState parent_obj;
52
53 /*< public >*/
54 MicroBlazeCPU cpu;
55 XlnxPMUIOIntc intc;
56 XlnxZynqMPIPI ipi[XLNX_ZYNQMP_PMU_NUM_IPIS];
57} XlnxZynqMPPMUSoCState;
58
59
60static void xlnx_zynqmp_pmu_soc_init(Object *obj)
61{
62 XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(obj);
63
64 object_initialize_child(obj, "pmu-cpu", &s->cpu, sizeof(s->cpu),
65 TYPE_MICROBLAZE_CPU, &error_abort, NULL);
66
67 sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc),
68 TYPE_XLNX_PMU_IO_INTC);
69
70 /* Create the IPI device */
71 for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) {
72 char *name = g_strdup_printf("ipi%d", i);
73 sysbus_init_child_obj(obj, name, &s->ipi[i],
74 sizeof(XlnxZynqMPIPI), TYPE_XLNX_ZYNQMP_IPI);
75 g_free(name);
76 }
77}
78
79static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
80{
81 XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(dev);
82 Error *err = NULL;
83
84 object_property_set_uint(OBJECT(&s->cpu), XLNX_ZYNQMP_PMU_ROM_ADDR,
85 "base-vectors", &error_abort);
86 object_property_set_bool(OBJECT(&s->cpu), true, "use-stack-protection",
87 &error_abort);
88 object_property_set_uint(OBJECT(&s->cpu), 0, "use-fpu", &error_abort);
89 object_property_set_uint(OBJECT(&s->cpu), 0, "use-hw-mul", &error_abort);
90 object_property_set_bool(OBJECT(&s->cpu), true, "use-barrel",
91 &error_abort);
92 object_property_set_bool(OBJECT(&s->cpu), true, "use-msr-instr",
93 &error_abort);
94 object_property_set_bool(OBJECT(&s->cpu), true, "use-pcmp-instr",
95 &error_abort);
96 object_property_set_bool(OBJECT(&s->cpu), false, "use-mmu", &error_abort);
97 object_property_set_bool(OBJECT(&s->cpu), true, "endianness",
98 &error_abort);
99 object_property_set_str(OBJECT(&s->cpu), "8.40.b", "version",
100 &error_abort);
101 object_property_set_uint(OBJECT(&s->cpu), 0, "pvr", &error_abort);
102 object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
103 if (err) {
104 error_propagate(errp, err);
105 return;
106 }
107
108 object_property_set_uint(OBJECT(&s->intc), 0x10, "intc-intr-size",
109 &error_abort);
110 object_property_set_uint(OBJECT(&s->intc), 0x0, "intc-level-edge",
111 &error_abort);
112 object_property_set_uint(OBJECT(&s->intc), 0xffff, "intc-positive",
113 &error_abort);
114 object_property_set_bool(OBJECT(&s->intc), true, "realized", &err);
115 if (err) {
116 error_propagate(errp, err);
117 return;
118 }
119 sysbus_mmio_map(SYS_BUS_DEVICE(&s->intc), 0, XLNX_ZYNQMP_PMU_INTC_ADDR);
120 sysbus_connect_irq(SYS_BUS_DEVICE(&s->intc), 0,
121 qdev_get_gpio_in(DEVICE(&s->cpu), MB_CPU_IRQ));
122
123 /* Connect the IPI device */
124 for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) {
125 object_property_set_bool(OBJECT(&s->ipi[i]), true, "realized",
126 &error_abort);
127 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ipi[i]), 0, ipi_addr[i]);
128 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ipi[i]), 0,
129 qdev_get_gpio_in(DEVICE(&s->intc), ipi_irq[i]));
130 }
131}
132
133static void xlnx_zynqmp_pmu_soc_class_init(ObjectClass *oc, void *data)
134{
135 DeviceClass *dc = DEVICE_CLASS(oc);
136
137 dc->realize = xlnx_zynqmp_pmu_soc_realize;
138}
139
140static const TypeInfo xlnx_zynqmp_pmu_soc_type_info = {
141 .name = TYPE_XLNX_ZYNQMP_PMU_SOC,
142 .parent = TYPE_DEVICE,
143 .instance_size = sizeof(XlnxZynqMPPMUSoCState),
144 .instance_init = xlnx_zynqmp_pmu_soc_init,
145 .class_init = xlnx_zynqmp_pmu_soc_class_init,
146};
147
148static void xlnx_zynqmp_pmu_soc_register_types(void)
149{
150 type_register_static(&xlnx_zynqmp_pmu_soc_type_info);
151}
152
153type_init(xlnx_zynqmp_pmu_soc_register_types)
154
155/* Define the PMU Machine */
156
157static void xlnx_zynqmp_pmu_init(MachineState *machine)
158{
159 XlnxZynqMPPMUSoCState *pmu = g_new0(XlnxZynqMPPMUSoCState, 1);
160 MemoryRegion *address_space_mem = get_system_memory();
161 MemoryRegion *pmu_rom = g_new(MemoryRegion, 1);
162 MemoryRegion *pmu_ram = g_new(MemoryRegion, 1);
163
164 /* Create the ROM */
165 memory_region_init_rom(pmu_rom, NULL, "xlnx-zynqmp-pmu.rom",
166 XLNX_ZYNQMP_PMU_ROM_SIZE, &error_fatal);
167 memory_region_add_subregion(address_space_mem, XLNX_ZYNQMP_PMU_ROM_ADDR,
168 pmu_rom);
169
170 /* Create the RAM */
171 memory_region_init_ram(pmu_ram, NULL, "xlnx-zynqmp-pmu.ram",
172 machine->ram_size, &error_fatal);
173 memory_region_add_subregion(address_space_mem, XLNX_ZYNQMP_PMU_RAM_ADDR,
174 pmu_ram);
175
176 /* Create the PMU device */
177 object_initialize_child(OBJECT(machine), "pmu", pmu,
178 sizeof(XlnxZynqMPPMUSoCState),
179 TYPE_XLNX_ZYNQMP_PMU_SOC, &error_abort, NULL);
180 object_property_set_bool(OBJECT(pmu), true, "realized", &error_fatal);
181
182 /* Load the kernel */
183 microblaze_load_kernel(&pmu->cpu, XLNX_ZYNQMP_PMU_RAM_ADDR,
184 machine->ram_size,
185 machine->initrd_filename,
186 machine->dtb,
187 NULL);
188}
189
190static void xlnx_zynqmp_pmu_machine_init(MachineClass *mc)
191{
192 mc->desc = "Xilinx ZynqMP PMU machine";
193 mc->init = xlnx_zynqmp_pmu_init;
194}
195
196DEFINE_MACHINE("xlnx-zynqmp-pmu", xlnx_zynqmp_pmu_machine_init)
197
198