1/*
2 * QEMU RISC-V PMP (Physical Memory Protection)
3 *
4 * Author: Daire McNamara, daire.mcnamara@emdalo.com
5 * Ivan Griffin, ivan.griffin@emdalo.com
6 *
7 * This provides a RISC-V Physical Memory Protection interface
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms and conditions of the GNU General Public License,
11 * version 2 or later, as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * more details.
17 *
18 * You should have received a copy of the GNU General Public License along with
19 * this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#ifndef RISCV_PMP_H
23#define RISCV_PMP_H
24
25typedef enum {
26 PMP_READ = 1 << 0,
27 PMP_WRITE = 1 << 1,
28 PMP_EXEC = 1 << 2,
29 PMP_LOCK = 1 << 7
30} pmp_priv_t;
31
32typedef enum {
33 PMP_AMATCH_OFF, /* Null (off) */
34 PMP_AMATCH_TOR, /* Top of Range */
35 PMP_AMATCH_NA4, /* Naturally aligned four-byte region */
36 PMP_AMATCH_NAPOT /* Naturally aligned power-of-two region */
37} pmp_am_t;
38
39typedef struct {
40 target_ulong addr_reg;
41 uint8_t cfg_reg;
42} pmp_entry_t;
43
44typedef struct {
45 target_ulong sa;
46 target_ulong ea;
47} pmp_addr_t;
48
49typedef struct {
50 pmp_entry_t pmp[MAX_RISCV_PMPS];
51 pmp_addr_t addr[MAX_RISCV_PMPS];
52 uint32_t num_rules;
53} pmp_table_t;
54
55void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_index,
56 target_ulong val);
57target_ulong pmpcfg_csr_read(CPURISCVState *env, uint32_t reg_index);
58void pmpaddr_csr_write(CPURISCVState *env, uint32_t addr_index,
59 target_ulong val);
60target_ulong pmpaddr_csr_read(CPURISCVState *env, uint32_t addr_index);
61bool pmp_hart_has_privs(CPURISCVState *env, target_ulong addr,
62 target_ulong size, pmp_priv_t priv, target_ulong mode);
63
64#endif
65