1 | /* ------------------------------------------------------------------ */ |
2 | /* WARNING: relative order of tokens is important. */ |
3 | |
4 | /* register */ |
5 | DEF_ASM(al) |
6 | DEF_ASM(cl) |
7 | DEF_ASM(dl) |
8 | DEF_ASM(bl) |
9 | DEF_ASM(ah) |
10 | DEF_ASM(ch) |
11 | DEF_ASM(dh) |
12 | DEF_ASM(bh) |
13 | DEF_ASM(ax) |
14 | DEF_ASM(cx) |
15 | DEF_ASM(dx) |
16 | DEF_ASM(bx) |
17 | DEF_ASM(sp) |
18 | DEF_ASM(bp) |
19 | DEF_ASM(si) |
20 | DEF_ASM(di) |
21 | DEF_ASM(eax) |
22 | DEF_ASM(ecx) |
23 | DEF_ASM(edx) |
24 | DEF_ASM(ebx) |
25 | DEF_ASM(esp) |
26 | DEF_ASM(ebp) |
27 | DEF_ASM(esi) |
28 | DEF_ASM(edi) |
29 | #ifdef TCC_TARGET_X86_64 |
30 | DEF_ASM(rax) |
31 | DEF_ASM(rcx) |
32 | DEF_ASM(rdx) |
33 | DEF_ASM(rbx) |
34 | DEF_ASM(rsp) |
35 | DEF_ASM(rbp) |
36 | DEF_ASM(rsi) |
37 | DEF_ASM(rdi) |
38 | #endif |
39 | DEF_ASM(mm0) |
40 | DEF_ASM(mm1) |
41 | DEF_ASM(mm2) |
42 | DEF_ASM(mm3) |
43 | DEF_ASM(mm4) |
44 | DEF_ASM(mm5) |
45 | DEF_ASM(mm6) |
46 | DEF_ASM(mm7) |
47 | DEF_ASM(xmm0) |
48 | DEF_ASM(xmm1) |
49 | DEF_ASM(xmm2) |
50 | DEF_ASM(xmm3) |
51 | DEF_ASM(xmm4) |
52 | DEF_ASM(xmm5) |
53 | DEF_ASM(xmm6) |
54 | DEF_ASM(xmm7) |
55 | DEF_ASM(cr0) |
56 | DEF_ASM(cr1) |
57 | DEF_ASM(cr2) |
58 | DEF_ASM(cr3) |
59 | DEF_ASM(cr4) |
60 | DEF_ASM(cr5) |
61 | DEF_ASM(cr6) |
62 | DEF_ASM(cr7) |
63 | DEF_ASM(tr0) |
64 | DEF_ASM(tr1) |
65 | DEF_ASM(tr2) |
66 | DEF_ASM(tr3) |
67 | DEF_ASM(tr4) |
68 | DEF_ASM(tr5) |
69 | DEF_ASM(tr6) |
70 | DEF_ASM(tr7) |
71 | DEF_ASM(db0) |
72 | DEF_ASM(db1) |
73 | DEF_ASM(db2) |
74 | DEF_ASM(db3) |
75 | DEF_ASM(db4) |
76 | DEF_ASM(db5) |
77 | DEF_ASM(db6) |
78 | DEF_ASM(db7) |
79 | DEF_ASM(dr0) |
80 | DEF_ASM(dr1) |
81 | DEF_ASM(dr2) |
82 | DEF_ASM(dr3) |
83 | DEF_ASM(dr4) |
84 | DEF_ASM(dr5) |
85 | DEF_ASM(dr6) |
86 | DEF_ASM(dr7) |
87 | DEF_ASM(es) |
88 | DEF_ASM(cs) |
89 | DEF_ASM(ss) |
90 | DEF_ASM(ds) |
91 | DEF_ASM(fs) |
92 | DEF_ASM(gs) |
93 | DEF_ASM(st) |
94 | DEF_ASM(rip) |
95 | |
96 | #ifdef TCC_TARGET_X86_64 |
97 | /* The four low parts of sp/bp/si/di that exist only on |
98 | x86-64 (encoding aliased to ah,ch,dh,dh when not using REX). */ |
99 | DEF_ASM(spl) |
100 | DEF_ASM(bpl) |
101 | DEF_ASM(sil) |
102 | DEF_ASM(dil) |
103 | #endif |
104 | /* generic two operands */ |
105 | DEF_BWLX(mov) |
106 | |
107 | DEF_BWLX(add) |
108 | DEF_BWLX(or) |
109 | DEF_BWLX(adc) |
110 | DEF_BWLX(sbb) |
111 | DEF_BWLX(and) |
112 | DEF_BWLX(sub) |
113 | DEF_BWLX(xor) |
114 | DEF_BWLX(cmp) |
115 | |
116 | /* unary ops */ |
117 | DEF_BWLX(inc) |
118 | DEF_BWLX(dec) |
119 | DEF_BWLX(not) |
120 | DEF_BWLX(neg) |
121 | DEF_BWLX(mul) |
122 | DEF_BWLX(imul) |
123 | DEF_BWLX(div) |
124 | DEF_BWLX(idiv) |
125 | |
126 | DEF_BWLX(xchg) |
127 | DEF_BWLX(test) |
128 | |
129 | /* shifts */ |
130 | DEF_BWLX(rol) |
131 | DEF_BWLX(ror) |
132 | DEF_BWLX(rcl) |
133 | DEF_BWLX(rcr) |
134 | DEF_BWLX(shl) |
135 | DEF_BWLX(shr) |
136 | DEF_BWLX(sar) |
137 | |
138 | DEF_WLX(shld) |
139 | DEF_WLX(shrd) |
140 | |
141 | DEF_ASM(pushw) |
142 | DEF_ASM(pushl) |
143 | #ifdef TCC_TARGET_X86_64 |
144 | DEF_ASM(pushq) |
145 | #endif |
146 | DEF_ASM(push) |
147 | |
148 | DEF_ASM(popw) |
149 | DEF_ASM(popl) |
150 | #ifdef TCC_TARGET_X86_64 |
151 | DEF_ASM(popq) |
152 | #endif |
153 | DEF_ASM(pop) |
154 | |
155 | DEF_BWL(in) |
156 | DEF_BWL(out) |
157 | |
158 | DEF_WLX(movzb) |
159 | DEF_ASM(movzwl) |
160 | DEF_ASM(movsbw) |
161 | DEF_ASM(movsbl) |
162 | DEF_ASM(movswl) |
163 | #ifdef TCC_TARGET_X86_64 |
164 | DEF_ASM(movsbq) |
165 | DEF_ASM(movswq) |
166 | DEF_ASM(movzwq) |
167 | DEF_ASM(movslq) |
168 | #endif |
169 | |
170 | DEF_WLX(lea) |
171 | |
172 | DEF_ASM(les) |
173 | DEF_ASM(lds) |
174 | DEF_ASM(lss) |
175 | DEF_ASM(lfs) |
176 | DEF_ASM(lgs) |
177 | |
178 | DEF_ASM(call) |
179 | DEF_ASM(jmp) |
180 | DEF_ASM(lcall) |
181 | DEF_ASM(ljmp) |
182 | |
183 | DEF_ASMTEST(j,) |
184 | |
185 | DEF_ASMTEST(set,) |
186 | DEF_ASMTEST(set,b) |
187 | DEF_ASMTEST(cmov,) |
188 | |
189 | DEF_WLX(bsf) |
190 | DEF_WLX(bsr) |
191 | DEF_WLX(bt) |
192 | DEF_WLX(bts) |
193 | DEF_WLX(btr) |
194 | DEF_WLX(btc) |
195 | |
196 | DEF_WLX(lar) |
197 | DEF_WLX(lsl) |
198 | |
199 | /* generic FP ops */ |
200 | DEF_FP(add) |
201 | DEF_FP(mul) |
202 | |
203 | DEF_ASM(fcom) |
204 | DEF_ASM(fcom_1) /* non existent op, just to have a regular table */ |
205 | DEF_FP1(com) |
206 | |
207 | DEF_FP(comp) |
208 | DEF_FP(sub) |
209 | DEF_FP(subr) |
210 | DEF_FP(div) |
211 | DEF_FP(divr) |
212 | |
213 | DEF_BWLX(xadd) |
214 | DEF_BWLX(cmpxchg) |
215 | |
216 | /* string ops */ |
217 | DEF_BWLX(cmps) |
218 | DEF_BWLX(scmp) |
219 | DEF_BWL(ins) |
220 | DEF_BWL(outs) |
221 | DEF_BWLX(lods) |
222 | DEF_BWLX(slod) |
223 | DEF_BWLX(movs) |
224 | DEF_BWLX(smov) |
225 | DEF_BWLX(scas) |
226 | DEF_BWLX(ssca) |
227 | DEF_BWLX(stos) |
228 | DEF_BWLX(ssto) |
229 | |
230 | /* generic asm ops */ |
231 | #define ALT(x) |
232 | #define DEF_ASM_OP0(name, opcode) DEF_ASM(name) |
233 | #define DEF_ASM_OP0L(name, opcode, group, instr_type) |
234 | #define DEF_ASM_OP1(name, opcode, group, instr_type, op0) |
235 | #define DEF_ASM_OP2(name, opcode, group, instr_type, op0, op1) |
236 | #define DEF_ASM_OP3(name, opcode, group, instr_type, op0, op1, op2) |
237 | #ifdef TCC_TARGET_X86_64 |
238 | # include "x86_64-asm.h" |
239 | #else |
240 | # include "i386-asm.h" |
241 | #endif |
242 | |
243 | #define ALT(x) |
244 | #define DEF_ASM_OP0(name, opcode) |
245 | #define DEF_ASM_OP0L(name, opcode, group, instr_type) DEF_ASM(name) |
246 | #define DEF_ASM_OP1(name, opcode, group, instr_type, op0) DEF_ASM(name) |
247 | #define DEF_ASM_OP2(name, opcode, group, instr_type, op0, op1) DEF_ASM(name) |
248 | #define DEF_ASM_OP3(name, opcode, group, instr_type, op0, op1, op2) DEF_ASM(name) |
249 | #ifdef TCC_TARGET_X86_64 |
250 | # include "x86_64-asm.h" |
251 | #else |
252 | # include "i386-asm.h" |
253 | #endif |
254 | |