1#ifndef CAPSTONE_ENGINE_H
2#define CAPSTONE_ENGINE_H
3
4/* Capstone Disassembly Engine */
5/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2016 */
6
7#ifdef __cplusplus
8extern "C" {
9#endif
10
11#include <stdarg.h>
12
13#if defined(CAPSTONE_HAS_OSXKERNEL)
14#include <libkern/libkern.h>
15#else
16#include <stdlib.h>
17#include <stdio.h>
18#endif
19
20#include "platform.h"
21
22#ifdef _MSC_VER
23#pragma warning(disable:4201)
24#pragma warning(disable:4100)
25#define CAPSTONE_API __cdecl
26#ifdef CAPSTONE_SHARED
27#define CAPSTONE_EXPORT __declspec(dllexport)
28#else // defined(CAPSTONE_STATIC)
29#define CAPSTONE_EXPORT
30#endif
31#else
32#define CAPSTONE_API
33#if defined(__GNUC__) && !defined(CAPSTONE_STATIC)
34#define CAPSTONE_EXPORT __attribute__((visibility("default")))
35#else // defined(CAPSTONE_STATIC)
36#define CAPSTONE_EXPORT
37#endif
38#endif
39
40#ifdef __GNUC__
41#define CAPSTONE_DEPRECATED __attribute__((deprecated))
42#elif defined(_MSC_VER)
43#define CAPSTONE_DEPRECATED __declspec(deprecated)
44#else
45#pragma message("WARNING: You need to implement CAPSTONE_DEPRECATED for this compiler")
46#define CAPSTONE_DEPRECATED
47#endif
48
49// Capstone API version
50#define CS_API_MAJOR 4
51#define CS_API_MINOR 0
52
53// Version for bleeding edge code of the Github's "next" branch.
54// Use this if you want the absolutely latest development code.
55// This version number will be bumped up whenever we have a new major change.
56#define CS_NEXT_VERSION 5
57
58// Capstone package version
59#define CS_VERSION_MAJOR CS_API_MAJOR
60#define CS_VERSION_MINOR CS_API_MINOR
61#define CS_VERSION_EXTRA 2
62
63/// Macro to create combined version which can be compared to
64/// result of cs_version() API.
65#define CS_MAKE_VERSION(major, minor) ((major << 8) + minor)
66
67/// Maximum size of an instruction mnemonic string.
68#define CS_MNEMONIC_SIZE 32
69
70// Handle using with all API
71typedef size_t csh;
72
73/// Architecture type
74typedef enum cs_arch {
75 CS_ARCH_ARM = 0, ///< ARM architecture (including Thumb, Thumb-2)
76 CS_ARCH_ARM64, ///< ARM-64, also called AArch64
77 CS_ARCH_MIPS, ///< Mips architecture
78 CS_ARCH_X86, ///< X86 architecture (including x86 & x86-64)
79 CS_ARCH_PPC, ///< PowerPC architecture
80 CS_ARCH_SPARC, ///< Sparc architecture
81 CS_ARCH_SYSZ, ///< SystemZ architecture
82 CS_ARCH_XCORE, ///< XCore architecture
83 CS_ARCH_M68K, ///< 68K architecture
84 CS_ARCH_TMS320C64X, ///< TMS320C64x architecture
85 CS_ARCH_M680X, ///< 680X architecture
86 CS_ARCH_EVM, ///< Ethereum architecture
87 CS_ARCH_MAX,
88 CS_ARCH_ALL = 0xFFFF, // All architectures - for cs_support()
89} cs_arch;
90
91// Support value to verify diet mode of the engine.
92// If cs_support(CS_SUPPORT_DIET) return True, the engine was compiled
93// in diet mode.
94#define CS_SUPPORT_DIET (CS_ARCH_ALL + 1)
95
96// Support value to verify X86 reduce mode of the engine.
97// If cs_support(CS_SUPPORT_X86_REDUCE) return True, the engine was compiled
98// in X86 reduce mode.
99#define CS_SUPPORT_X86_REDUCE (CS_ARCH_ALL + 2)
100
101/// Mode type
102typedef enum cs_mode {
103 CS_MODE_LITTLE_ENDIAN = 0, ///< little-endian mode (default mode)
104 CS_MODE_ARM = 0, ///< 32-bit ARM
105 CS_MODE_16 = 1 << 1, ///< 16-bit mode (X86)
106 CS_MODE_32 = 1 << 2, ///< 32-bit mode (X86)
107 CS_MODE_64 = 1 << 3, ///< 64-bit mode (X86, PPC)
108 CS_MODE_THUMB = 1 << 4, ///< ARM's Thumb mode, including Thumb-2
109 CS_MODE_MCLASS = 1 << 5, ///< ARM's Cortex-M series
110 CS_MODE_V8 = 1 << 6, ///< ARMv8 A32 encodings for ARM
111 CS_MODE_MICRO = 1 << 4, ///< MicroMips mode (MIPS)
112 CS_MODE_MIPS3 = 1 << 5, ///< Mips III ISA
113 CS_MODE_MIPS32R6 = 1 << 6, ///< Mips32r6 ISA
114 CS_MODE_MIPS2 = 1 << 7, ///< Mips II ISA
115 CS_MODE_V9 = 1 << 4, ///< SparcV9 mode (Sparc)
116 CS_MODE_QPX = 1 << 4, ///< Quad Processing eXtensions mode (PPC)
117 CS_MODE_M68K_000 = 1 << 1, ///< M68K 68000 mode
118 CS_MODE_M68K_010 = 1 << 2, ///< M68K 68010 mode
119 CS_MODE_M68K_020 = 1 << 3, ///< M68K 68020 mode
120 CS_MODE_M68K_030 = 1 << 4, ///< M68K 68030 mode
121 CS_MODE_M68K_040 = 1 << 5, ///< M68K 68040 mode
122 CS_MODE_M68K_060 = 1 << 6, ///< M68K 68060 mode
123 CS_MODE_BIG_ENDIAN = 1 << 31, ///< big-endian mode
124 CS_MODE_MIPS32 = CS_MODE_32, ///< Mips32 ISA (Mips)
125 CS_MODE_MIPS64 = CS_MODE_64, ///< Mips64 ISA (Mips)
126 CS_MODE_M680X_6301 = 1 << 1, ///< M680X Hitachi 6301,6303 mode
127 CS_MODE_M680X_6309 = 1 << 2, ///< M680X Hitachi 6309 mode
128 CS_MODE_M680X_6800 = 1 << 3, ///< M680X Motorola 6800,6802 mode
129 CS_MODE_M680X_6801 = 1 << 4, ///< M680X Motorola 6801,6803 mode
130 CS_MODE_M680X_6805 = 1 << 5, ///< M680X Motorola/Freescale 6805 mode
131 CS_MODE_M680X_6808 = 1 << 6, ///< M680X Motorola/Freescale/NXP 68HC08 mode
132 CS_MODE_M680X_6809 = 1 << 7, ///< M680X Motorola 6809 mode
133 CS_MODE_M680X_6811 = 1 << 8, ///< M680X Motorola/Freescale/NXP 68HC11 mode
134 CS_MODE_M680X_CPU12 = 1 << 9, ///< M680X Motorola/Freescale/NXP CPU12
135 ///< used on M68HC12/HCS12
136 CS_MODE_M680X_HCS08 = 1 << 10, ///< M680X Freescale/NXP HCS08 mode
137} cs_mode;
138
139typedef void* (CAPSTONE_API *cs_malloc_t)(size_t size);
140typedef void* (CAPSTONE_API *cs_calloc_t)(size_t nmemb, size_t size);
141typedef void* (CAPSTONE_API *cs_realloc_t)(void *ptr, size_t size);
142typedef void (CAPSTONE_API *cs_free_t)(void *ptr);
143typedef int (CAPSTONE_API *cs_vsnprintf_t)(char *str, size_t size, const char *format, va_list ap);
144
145
146/// User-defined dynamic memory related functions: malloc/calloc/realloc/free/vsnprintf()
147/// By default, Capstone uses system's malloc(), calloc(), realloc(), free() & vsnprintf().
148typedef struct cs_opt_mem {
149 cs_malloc_t malloc;
150 cs_calloc_t calloc;
151 cs_realloc_t realloc;
152 cs_free_t free;
153 cs_vsnprintf_t vsnprintf;
154} cs_opt_mem;
155
156/// Customize mnemonic for instructions with alternative name.
157/// To reset existing customized instruction to its default mnemonic,
158/// call cs_option(CS_OPT_MNEMONIC) again with the same @id and NULL value
159/// for @mnemonic.
160typedef struct cs_opt_mnem {
161 /// ID of instruction to be customized.
162 unsigned int id;
163 /// Customized instruction mnemonic.
164 const char *mnemonic;
165} cs_opt_mnem;
166
167/// Runtime option for the disassembled engine
168typedef enum cs_opt_type {
169 CS_OPT_INVALID = 0, ///< No option specified
170 CS_OPT_SYNTAX, ///< Assembly output syntax
171 CS_OPT_DETAIL, ///< Break down instruction structure into details
172 CS_OPT_MODE, ///< Change engine's mode at run-time
173 CS_OPT_MEM, ///< User-defined dynamic memory related functions
174 CS_OPT_SKIPDATA, ///< Skip data when disassembling. Then engine is in SKIPDATA mode.
175 CS_OPT_SKIPDATA_SETUP, ///< Setup user-defined function for SKIPDATA option
176 CS_OPT_MNEMONIC, ///< Customize instruction mnemonic
177 CS_OPT_UNSIGNED, ///< print immediate operands in unsigned form
178} cs_opt_type;
179
180/// Runtime option value (associated with option type above)
181typedef enum cs_opt_value {
182 CS_OPT_OFF = 0, ///< Turn OFF an option - default for CS_OPT_DETAIL, CS_OPT_SKIPDATA, CS_OPT_UNSIGNED.
183 CS_OPT_ON = 3, ///< Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA).
184 CS_OPT_SYNTAX_DEFAULT = 0, ///< Default asm syntax (CS_OPT_SYNTAX).
185 CS_OPT_SYNTAX_INTEL, ///< X86 Intel asm syntax - default on X86 (CS_OPT_SYNTAX).
186 CS_OPT_SYNTAX_ATT, ///< X86 ATT asm syntax (CS_OPT_SYNTAX).
187 CS_OPT_SYNTAX_NOREGNAME, ///< Prints register name with only number (CS_OPT_SYNTAX)
188 CS_OPT_SYNTAX_MASM, ///< X86 Intel Masm syntax (CS_OPT_SYNTAX).
189} cs_opt_value;
190
191/// Common instruction operand types - to be consistent across all architectures.
192typedef enum cs_op_type {
193 CS_OP_INVALID = 0, ///< uninitialized/invalid operand.
194 CS_OP_REG, ///< Register operand.
195 CS_OP_IMM, ///< Immediate operand.
196 CS_OP_MEM, ///< Memory operand.
197 CS_OP_FP, ///< Floating-Point operand.
198} cs_op_type;
199
200/// Common instruction operand access types - to be consistent across all architectures.
201/// It is possible to combine access types, for example: CS_AC_READ | CS_AC_WRITE
202typedef enum cs_ac_type {
203 CS_AC_INVALID = 0, ///< Uninitialized/invalid access type.
204 CS_AC_READ = 1 << 0, ///< Operand read from memory or register.
205 CS_AC_WRITE = 1 << 1, ///< Operand write to memory or register.
206} cs_ac_type;
207
208/// Common instruction groups - to be consistent across all architectures.
209typedef enum cs_group_type {
210 CS_GRP_INVALID = 0, ///< uninitialized/invalid group.
211 CS_GRP_JUMP, ///< all jump instructions (conditional+direct+indirect jumps)
212 CS_GRP_CALL, ///< all call instructions
213 CS_GRP_RET, ///< all return instructions
214 CS_GRP_INT, ///< all interrupt instructions (int+syscall)
215 CS_GRP_IRET, ///< all interrupt return instructions
216 CS_GRP_PRIVILEGE, ///< all privileged instructions
217 CS_GRP_BRANCH_RELATIVE, ///< all relative branching instructions
218} cs_group_type;
219
220/**
221 User-defined callback function for SKIPDATA option.
222 See tests/test_skipdata.c for sample code demonstrating this API.
223
224 @code: the input buffer containing code to be disassembled.
225 This is the same buffer passed to cs_disasm().
226 @code_size: size (in bytes) of the above @code buffer.
227 @offset: the position of the currently-examining byte in the input
228 buffer @code mentioned above.
229 @user_data: user-data passed to cs_option() via @user_data field in
230 cs_opt_skipdata struct below.
231
232 @return: return number of bytes to skip, or 0 to immediately stop disassembling.
233*/
234typedef size_t (CAPSTONE_API *cs_skipdata_cb_t)(const uint8_t *code, size_t code_size, size_t offset, void *user_data);
235
236/// User-customized setup for SKIPDATA option
237typedef struct cs_opt_skipdata {
238 /// Capstone considers data to skip as special "instructions".
239 /// User can specify the string for this instruction's "mnemonic" here.
240 /// By default (if @mnemonic is NULL), Capstone use ".byte".
241 const char *mnemonic;
242
243 /// User-defined callback function to be called when Capstone hits data.
244 /// If the returned value from this callback is positive (>0), Capstone
245 /// will skip exactly that number of bytes & continue. Otherwise, if
246 /// the callback returns 0, Capstone stops disassembling and returns
247 /// immediately from cs_disasm()
248 /// NOTE: if this callback pointer is NULL, Capstone would skip a number
249 /// of bytes depending on architectures, as following:
250 /// Arm: 2 bytes (Thumb mode) or 4 bytes.
251 /// Arm64: 4 bytes.
252 /// Mips: 4 bytes.
253 /// M680x: 1 byte.
254 /// PowerPC: 4 bytes.
255 /// Sparc: 4 bytes.
256 /// SystemZ: 2 bytes.
257 /// X86: 1 bytes.
258 /// XCore: 2 bytes.
259 /// EVM: 1 bytes.
260 cs_skipdata_cb_t callback; // default value is NULL
261
262 /// User-defined data to be passed to @callback function pointer.
263 void *user_data;
264} cs_opt_skipdata;
265
266
267#include "arm.h"
268#include "arm64.h"
269#include "m68k.h"
270#include "mips.h"
271#include "ppc.h"
272#include "sparc.h"
273#include "systemz.h"
274#include "x86.h"
275#include "xcore.h"
276#include "tms320c64x.h"
277#include "m680x.h"
278#include "evm.h"
279
280/// NOTE: All information in cs_detail is only available when CS_OPT_DETAIL = CS_OPT_ON
281/// Initialized as memset(., 0, offsetof(cs_detail, ARCH)+sizeof(cs_ARCH))
282/// by ARCH_getInstruction in arch/ARCH/ARCHDisassembler.c
283/// if cs_detail changes, in particular if a field is added after the union,
284/// then update arch/ARCH/ARCHDisassembler.c accordingly
285typedef struct cs_detail {
286 uint16_t regs_read[12]; ///< list of implicit registers read by this insn
287 uint8_t regs_read_count; ///< number of implicit registers read by this insn
288
289 uint16_t regs_write[20]; ///< list of implicit registers modified by this insn
290 uint8_t regs_write_count; ///< number of implicit registers modified by this insn
291
292 uint8_t groups[8]; ///< list of group this instruction belong to
293 uint8_t groups_count; ///< number of groups this insn belongs to
294
295 /// Architecture-specific instruction info
296 union {
297 cs_x86 x86; ///< X86 architecture, including 16-bit, 32-bit & 64-bit mode
298 cs_arm64 arm64; ///< ARM64 architecture (aka AArch64)
299 cs_arm arm; ///< ARM architecture (including Thumb/Thumb2)
300 cs_m68k m68k; ///< M68K architecture
301 cs_mips mips; ///< MIPS architecture
302 cs_ppc ppc; ///< PowerPC architecture
303 cs_sparc sparc; ///< Sparc architecture
304 cs_sysz sysz; ///< SystemZ architecture
305 cs_xcore xcore; ///< XCore architecture
306 cs_tms320c64x tms320c64x; ///< TMS320C64x architecture
307 cs_m680x m680x; ///< M680X architecture
308 cs_evm evm; ///< Ethereum architecture
309 };
310} cs_detail;
311
312/// Detail information of disassembled instruction
313typedef struct cs_insn {
314 /// Instruction ID (basically a numeric ID for the instruction mnemonic)
315 /// Find the instruction id in the '[ARCH]_insn' enum in the header file
316 /// of corresponding architecture, such as 'arm_insn' in arm.h for ARM,
317 /// 'x86_insn' in x86.h for X86, etc...
318 /// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
319 /// NOTE: in Skipdata mode, "data" instruction has 0 for this id field.
320 unsigned int id;
321
322 /// Address (EIP) of this instruction
323 /// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
324 uint64_t address;
325
326 /// Size of this instruction
327 /// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
328 uint16_t size;
329
330 /// Machine bytes of this instruction, with number of bytes indicated by @size above
331 /// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
332 uint8_t bytes[16];
333
334 /// Ascii text of instruction mnemonic
335 /// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
336 char mnemonic[CS_MNEMONIC_SIZE];
337
338 /// Ascii text of instruction operands
339 /// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
340 char op_str[160];
341
342 /// Pointer to cs_detail.
343 /// NOTE: detail pointer is only valid when both requirements below are met:
344 /// (1) CS_OP_DETAIL = CS_OPT_ON
345 /// (2) Engine is not in Skipdata mode (CS_OP_SKIPDATA option set to CS_OPT_ON)
346 ///
347 /// NOTE 2: when in Skipdata mode, or when detail mode is OFF, even if this pointer
348 /// is not NULL, its content is still irrelevant.
349 cs_detail *detail;
350} cs_insn;
351
352
353/// Calculate the offset of a disassembled instruction in its buffer, given its position
354/// in its array of disassembled insn
355/// NOTE: this macro works with position (>=1), not index
356#define CS_INSN_OFFSET(insns, post) (insns[post - 1].address - insns[0].address)
357
358
359/// All type of errors encountered by Capstone API.
360/// These are values returned by cs_errno()
361typedef enum cs_err {
362 CS_ERR_OK = 0, ///< No error: everything was fine
363 CS_ERR_MEM, ///< Out-Of-Memory error: cs_open(), cs_disasm(), cs_disasm_iter()
364 CS_ERR_ARCH, ///< Unsupported architecture: cs_open()
365 CS_ERR_HANDLE, ///< Invalid handle: cs_op_count(), cs_op_index()
366 CS_ERR_CSH, ///< Invalid csh argument: cs_close(), cs_errno(), cs_option()
367 CS_ERR_MODE, ///< Invalid/unsupported mode: cs_open()
368 CS_ERR_OPTION, ///< Invalid/unsupported option: cs_option()
369 CS_ERR_DETAIL, ///< Information is unavailable because detail option is OFF
370 CS_ERR_MEMSETUP, ///< Dynamic memory management uninitialized (see CS_OPT_MEM)
371 CS_ERR_VERSION, ///< Unsupported version (bindings)
372 CS_ERR_DIET, ///< Access irrelevant data in "diet" engine
373 CS_ERR_SKIPDATA, ///< Access irrelevant data for "data" instruction in SKIPDATA mode
374 CS_ERR_X86_ATT, ///< X86 AT&T syntax is unsupported (opt-out at compile time)
375 CS_ERR_X86_INTEL, ///< X86 Intel syntax is unsupported (opt-out at compile time)
376 CS_ERR_X86_MASM, ///< X86 Masm syntax is unsupported (opt-out at compile time)
377} cs_err;
378
379/**
380 Return combined API version & major and minor version numbers.
381
382 @major: major number of API version
383 @minor: minor number of API version
384
385 @return hexical number as (major << 8 | minor), which encodes both
386 major & minor versions.
387 NOTE: This returned value can be compared with version number made
388 with macro CS_MAKE_VERSION
389
390 For example, second API version would return 1 in @major, and 1 in @minor
391 The return value would be 0x0101
392
393 NOTE: if you only care about returned value, but not major and minor values,
394 set both @major & @minor arguments to NULL.
395*/
396CAPSTONE_EXPORT
397unsigned int CAPSTONE_API cs_version(int *major, int *minor);
398
399
400/**
401 This API can be used to either ask for archs supported by this library,
402 or check to see if the library was compile with 'diet' option (or called
403 in 'diet' mode).
404
405 To check if a particular arch is supported by this library, set @query to
406 arch mode (CS_ARCH_* value).
407 To verify if this library supports all the archs, use CS_ARCH_ALL.
408
409 To check if this library is in 'diet' mode, set @query to CS_SUPPORT_DIET.
410
411 @return True if this library supports the given arch, or in 'diet' mode.
412*/
413CAPSTONE_EXPORT
414bool CAPSTONE_API cs_support(int query);
415
416/**
417 Initialize CS handle: this must be done before any usage of CS.
418
419 @arch: architecture type (CS_ARCH_*)
420 @mode: hardware mode. This is combined of CS_MODE_*
421 @handle: pointer to handle, which will be updated at return time
422
423 @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum
424 for detailed error).
425*/
426CAPSTONE_EXPORT
427cs_err CAPSTONE_API cs_open(cs_arch arch, cs_mode mode, csh *handle);
428
429/**
430 Close CS handle: MUST do to release the handle when it is not used anymore.
431 NOTE: this must be only called when there is no longer usage of Capstone,
432 not even access to cs_insn array. The reason is the this API releases some
433 cached memory, thus access to any Capstone API after cs_close() might crash
434 your application.
435
436 In fact,this API invalidate @handle by ZERO out its value (i.e *handle = 0).
437
438 @handle: pointer to a handle returned by cs_open()
439
440 @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum
441 for detailed error).
442*/
443CAPSTONE_EXPORT
444cs_err CAPSTONE_API cs_close(csh *handle);
445
446/**
447 Set option for disassembling engine at runtime
448
449 @handle: handle returned by cs_open()
450 @type: type of option to be set
451 @value: option value corresponding with @type
452
453 @return: CS_ERR_OK on success, or other value on failure.
454 Refer to cs_err enum for detailed error.
455
456 NOTE: in the case of CS_OPT_MEM, handle's value can be anything,
457 so that cs_option(handle, CS_OPT_MEM, value) can (i.e must) be called
458 even before cs_open()
459*/
460CAPSTONE_EXPORT
461cs_err CAPSTONE_API cs_option(csh handle, cs_opt_type type, size_t value);
462
463/**
464 Report the last error number when some API function fail.
465 Like glibc's errno, cs_errno might not retain its old value once accessed.
466
467 @handle: handle returned by cs_open()
468
469 @return: error code of cs_err enum type (CS_ERR_*, see above)
470*/
471CAPSTONE_EXPORT
472cs_err CAPSTONE_API cs_errno(csh handle);
473
474
475/**
476 Return a string describing given error code.
477
478 @code: error code (see CS_ERR_* above)
479
480 @return: returns a pointer to a string that describes the error code
481 passed in the argument @code
482*/
483CAPSTONE_EXPORT
484const char * CAPSTONE_API cs_strerror(cs_err code);
485
486/**
487 Disassemble binary code, given the code buffer, size, address and number
488 of instructions to be decoded.
489 This API dynamically allocate memory to contain disassembled instruction.
490 Resulting instructions will be put into @*insn
491
492 NOTE 1: this API will automatically determine memory needed to contain
493 output disassembled instructions in @insn.
494
495 NOTE 2: caller must free the allocated memory itself to avoid memory leaking.
496
497 NOTE 3: for system with scarce memory to be dynamically allocated such as
498 OS kernel or firmware, the API cs_disasm_iter() might be a better choice than
499 cs_disasm(). The reason is that with cs_disasm(), based on limited available
500 memory, we have to calculate in advance how many instructions to be disassembled,
501 which complicates things. This is especially troublesome for the case @count=0,
502 when cs_disasm() runs uncontrollably (until either end of input buffer, or
503 when it encounters an invalid instruction).
504
505 @handle: handle returned by cs_open()
506 @code: buffer containing raw binary code to be disassembled.
507 @code_size: size of the above code buffer.
508 @address: address of the first instruction in given raw code buffer.
509 @insn: array of instructions filled in by this API.
510 NOTE: @insn will be allocated by this function, and should be freed
511 with cs_free() API.
512 @count: number of instructions to be disassembled, or 0 to get all of them
513
514 @return: the number of successfully disassembled instructions,
515 or 0 if this function failed to disassemble the given code
516
517 On failure, call cs_errno() for error code.
518*/
519CAPSTONE_EXPORT
520size_t CAPSTONE_API cs_disasm(csh handle,
521 const uint8_t *code, size_t code_size,
522 uint64_t address,
523 size_t count,
524 cs_insn **insn);
525
526/**
527 Deprecated function - to be retired in the next version!
528 Use cs_disasm() instead of cs_disasm_ex()
529*/
530CAPSTONE_EXPORT
531CAPSTONE_DEPRECATED
532size_t CAPSTONE_API cs_disasm_ex(csh handle,
533 const uint8_t *code, size_t code_size,
534 uint64_t address,
535 size_t count,
536 cs_insn **insn);
537
538/**
539 Free memory allocated by cs_malloc() or cs_disasm() (argument @insn)
540
541 @insn: pointer returned by @insn argument in cs_disasm() or cs_malloc()
542 @count: number of cs_insn structures returned by cs_disasm(), or 1
543 to free memory allocated by cs_malloc().
544*/
545CAPSTONE_EXPORT
546void CAPSTONE_API cs_free(cs_insn *insn, size_t count);
547
548
549/**
550 Allocate memory for 1 instruction to be used by cs_disasm_iter().
551
552 @handle: handle returned by cs_open()
553
554 NOTE: when no longer in use, you can reclaim the memory allocated for
555 this instruction with cs_free(insn, 1)
556*/
557CAPSTONE_EXPORT
558cs_insn * CAPSTONE_API cs_malloc(csh handle);
559
560/**
561 Fast API to disassemble binary code, given the code buffer, size, address
562 and number of instructions to be decoded.
563 This API puts the resulting instruction into a given cache in @insn.
564 See tests/test_iter.c for sample code demonstrating this API.
565
566 NOTE 1: this API will update @code, @size & @address to point to the next
567 instruction in the input buffer. Therefore, it is convenient to use
568 cs_disasm_iter() inside a loop to quickly iterate all the instructions.
569 While decoding one instruction at a time can also be achieved with
570 cs_disasm(count=1), some benchmarks shown that cs_disasm_iter() can be 30%
571 faster on random input.
572
573 NOTE 2: the cache in @insn can be created with cs_malloc() API.
574
575 NOTE 3: for system with scarce memory to be dynamically allocated such as
576 OS kernel or firmware, this API is recommended over cs_disasm(), which
577 allocates memory based on the number of instructions to be disassembled.
578 The reason is that with cs_disasm(), based on limited available memory,
579 we have to calculate in advance how many instructions to be disassembled,
580 which complicates things. This is especially troublesome for the case
581 @count=0, when cs_disasm() runs uncontrollably (until either end of input
582 buffer, or when it encounters an invalid instruction).
583
584 @handle: handle returned by cs_open()
585 @code: buffer containing raw binary code to be disassembled
586 @size: size of above code
587 @address: address of the first insn in given raw code buffer
588 @insn: pointer to instruction to be filled in by this API.
589
590 @return: true if this API successfully decode 1 instruction,
591 or false otherwise.
592
593 On failure, call cs_errno() for error code.
594*/
595CAPSTONE_EXPORT
596bool CAPSTONE_API cs_disasm_iter(csh handle,
597 const uint8_t **code, size_t *size,
598 uint64_t *address, cs_insn *insn);
599
600/**
601 Return friendly name of register in a string.
602 Find the instruction id from header file of corresponding architecture (arm.h for ARM,
603 x86.h for X86, ...)
604
605 WARN: when in 'diet' mode, this API is irrelevant because engine does not
606 store register name.
607
608 @handle: handle returned by cs_open()
609 @reg_id: register id
610
611 @return: string name of the register, or NULL if @reg_id is invalid.
612*/
613CAPSTONE_EXPORT
614const char * CAPSTONE_API cs_reg_name(csh handle, unsigned int reg_id);
615
616/**
617 Return friendly name of an instruction in a string.
618 Find the instruction id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
619
620 WARN: when in 'diet' mode, this API is irrelevant because the engine does not
621 store instruction name.
622
623 @handle: handle returned by cs_open()
624 @insn_id: instruction id
625
626 @return: string name of the instruction, or NULL if @insn_id is invalid.
627*/
628CAPSTONE_EXPORT
629const char * CAPSTONE_API cs_insn_name(csh handle, unsigned int insn_id);
630
631/**
632 Return friendly name of a group id (that an instruction can belong to)
633 Find the group id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
634
635 WARN: when in 'diet' mode, this API is irrelevant because the engine does not
636 store group name.
637
638 @handle: handle returned by cs_open()
639 @group_id: group id
640
641 @return: string name of the group, or NULL if @group_id is invalid.
642*/
643CAPSTONE_EXPORT
644const char * CAPSTONE_API cs_group_name(csh handle, unsigned int group_id);
645
646/**
647 Check if a disassembled instruction belong to a particular group.
648 Find the group id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
649 Internally, this simply verifies if @group_id matches any member of insn->groups array.
650
651 NOTE: this API is only valid when detail option is ON (which is OFF by default).
652
653 WARN: when in 'diet' mode, this API is irrelevant because the engine does not
654 update @groups array.
655
656 @handle: handle returned by cs_open()
657 @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
658 @group_id: group that you want to check if this instruction belong to.
659
660 @return: true if this instruction indeed belongs to the given group, or false otherwise.
661*/
662CAPSTONE_EXPORT
663bool CAPSTONE_API cs_insn_group(csh handle, const cs_insn *insn, unsigned int group_id);
664
665/**
666 Check if a disassembled instruction IMPLICITLY used a particular register.
667 Find the register id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
668 Internally, this simply verifies if @reg_id matches any member of insn->regs_read array.
669
670 NOTE: this API is only valid when detail option is ON (which is OFF by default)
671
672 WARN: when in 'diet' mode, this API is irrelevant because the engine does not
673 update @regs_read array.
674
675 @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
676 @reg_id: register that you want to check if this instruction used it.
677
678 @return: true if this instruction indeed implicitly used the given register, or false otherwise.
679*/
680CAPSTONE_EXPORT
681bool CAPSTONE_API cs_reg_read(csh handle, const cs_insn *insn, unsigned int reg_id);
682
683/**
684 Check if a disassembled instruction IMPLICITLY modified a particular register.
685 Find the register id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
686 Internally, this simply verifies if @reg_id matches any member of insn->regs_write array.
687
688 NOTE: this API is only valid when detail option is ON (which is OFF by default)
689
690 WARN: when in 'diet' mode, this API is irrelevant because the engine does not
691 update @regs_write array.
692
693 @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
694 @reg_id: register that you want to check if this instruction modified it.
695
696 @return: true if this instruction indeed implicitly modified the given register, or false otherwise.
697*/
698CAPSTONE_EXPORT
699bool CAPSTONE_API cs_reg_write(csh handle, const cs_insn *insn, unsigned int reg_id);
700
701/**
702 Count the number of operands of a given type.
703 Find the operand type in header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
704
705 NOTE: this API is only valid when detail option is ON (which is OFF by default)
706
707 @handle: handle returned by cs_open()
708 @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
709 @op_type: Operand type to be found.
710
711 @return: number of operands of given type @op_type in instruction @insn,
712 or -1 on failure.
713*/
714CAPSTONE_EXPORT
715int CAPSTONE_API cs_op_count(csh handle, const cs_insn *insn, unsigned int op_type);
716
717/**
718 Retrieve the position of operand of given type in <arch>.operands[] array.
719 Later, the operand can be accessed using the returned position.
720 Find the operand type in header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
721
722 NOTE: this API is only valid when detail option is ON (which is OFF by default)
723
724 @handle: handle returned by cs_open()
725 @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
726 @op_type: Operand type to be found.
727 @position: position of the operand to be found. This must be in the range
728 [1, cs_op_count(handle, insn, op_type)]
729
730 @return: index of operand of given type @op_type in <arch>.operands[] array
731 in instruction @insn, or -1 on failure.
732*/
733CAPSTONE_EXPORT
734int CAPSTONE_API cs_op_index(csh handle, const cs_insn *insn, unsigned int op_type,
735 unsigned int position);
736
737/// Type of array to keep the list of registers
738typedef uint16_t cs_regs[64];
739
740/**
741 Retrieve all the registers accessed by an instruction, either explicitly or
742 implicitly.
743
744 WARN: when in 'diet' mode, this API is irrelevant because engine does not
745 store registers.
746
747 @handle: handle returned by cs_open()
748 @insn: disassembled instruction structure returned from cs_disasm() or cs_disasm_iter()
749 @regs_read: on return, this array contains all registers read by instruction.
750 @regs_read_count: number of registers kept inside @regs_read array.
751 @regs_write: on return, this array contains all registers written by instruction.
752 @regs_write_count: number of registers kept inside @regs_write array.
753
754 @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum
755 for detailed error).
756*/
757CAPSTONE_EXPORT
758cs_err CAPSTONE_API cs_regs_access(csh handle, const cs_insn *insn,
759 cs_regs regs_read, uint8_t *regs_read_count,
760 cs_regs regs_write, uint8_t *regs_write_count);
761
762#ifdef __cplusplus
763}
764#endif
765
766#endif
767