1/*
2 * Copyright (c) 2008-2015, NVIDIA CORPORATION. All rights reserved.
3 *
4 * NVIDIA CORPORATION and its licensors retain all intellectual property
5 * and proprietary rights in and to this software, related documentation
6 * and any modifications thereto. Any use, reproduction, disclosure or
7 * distribution of this software and related documentation without an express
8 * license agreement from NVIDIA CORPORATION is strictly prohibited.
9 */
10
11#ifndef PX_GPU_COPY_DESC_H
12#define PX_GPU_COPY_DESC_H
13
14#include "foundation/Px.h"
15
16#ifndef PX_DOXYGEN
17namespace physx
18{
19#endif
20
21PX_PUSH_PACK_DEFAULT
22
23/**
24 * \brief Input descriptor for the GpuDispatcher's built-in copy kernel
25 *
26 * All host memory involved in copy transactions must be page-locked.
27 * If more than one descriptor is passed to the copy kernel in one launch,
28 * the descriptors themselves must be in page-locked memory.
29 */
30struct PxGpuCopyDesc
31{
32 /**
33 * \brief Input descriptor for the GpuDispatcher's built-in copy kernel
34 */
35 enum CopyType
36 {
37 HostToDevice,
38 DeviceToHost,
39 DeviceToDevice,
40 DeviceMemset32
41 };
42
43 size_t dest; //!< the destination
44 size_t source; //!< the source (32bit value when type == DeviceMemset)
45 size_t bytes; //!< the size in bytes
46 CopyType type; //!< the memory transaction type
47
48 /**
49 * \brief Copy is optimally performed as 64bit words, requires 64bit alignment. But it can
50 * gracefully degrade to 32bit copies if necessary
51 */
52 PX_INLINE bool isValid()
53 {
54 bool ok = true;
55 ok &= ((dest & 0x3) == 0);
56 ok &= ((type == DeviceMemset32) || (source & 0x3) == 0);
57 ok &= ((bytes & 0x3) == 0);
58 return ok;
59 }
60};
61
62PX_POP_PACK
63
64#ifndef PX_DOXYGEN
65} // end physx namespace
66#endif
67
68#endif
69