1//===-------------------------- DwarfInstructions.hpp ---------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//
8// Processor specific interpretation of DWARF unwind info.
9//
10//===----------------------------------------------------------------------===//
11
12#ifndef __DWARF_INSTRUCTIONS_HPP__
13#define __DWARF_INSTRUCTIONS_HPP__
14
15#include <stdint.h>
16#include <stdio.h>
17#include <stdlib.h>
18
19#include <unistd.h>
20#include <sys/syscall.h>
21
22#include "dwarf2.h"
23#include "Registers.hpp"
24#include "DwarfParser.hpp"
25#include "config.h"
26
27
28namespace libunwind {
29
30
31/// DwarfInstructions maps abtract DWARF unwind instructions to a particular
32/// architecture
33template <typename A, typename R>
34class DwarfInstructions {
35public:
36 typedef typename A::pint_t pint_t;
37 typedef typename A::sint_t sint_t;
38
39 static int stepWithDwarf(A &addressSpace, pint_t pc, pint_t fdeStart,
40 R &registers);
41
42private:
43
44 enum {
45 DW_X86_64_RET_ADDR = 16
46 };
47
48 enum {
49 DW_X86_RET_ADDR = 8
50 };
51
52 typedef typename CFI_Parser<A>::FDE_Info FDE_Info;
53 typedef typename CFI_Parser<A>::CIE_Info CIE_Info;
54
55 static pint_t evaluateExpression(pint_t expression, A &addressSpace,
56 const R &registers,
57 pint_t initialStackValue);
58 static pint_t getSavedRegister(A &addressSpace, const R &registers,
59 pint_t cfa, const RegisterLocation &savedReg);
60 static double getSavedFloatRegister(A &addressSpace, const R &registers,
61 pint_t cfa, const RegisterLocation &savedReg);
62 static v128 getSavedVectorRegister(A &addressSpace, const R &registers,
63 pint_t cfa, const RegisterLocation &savedReg);
64
65 static pint_t getCFA(A &addressSpace, const PrologInfo &prolog,
66 const R &registers) {
67if (prolog.cfaRegister != 0) {
68 pint_t cfa = (pint_t)((sint_t)registers.getRegister((int)prolog.cfaRegister) +
69 prolog.cfaRegisterOffset);
70#if defined(__x86_64__)
71 if (prolog.cfaRegister == UNW_X86_64_RSP)
72 cfa -= prolog.spExtraArgSize;
73#endif
74 return cfa;
75 }
76
77 if (prolog.cfaExpression != 0)
78 return evaluateExpression((pint_t)prolog.cfaExpression, addressSpace,
79 registers, 0);
80 assert(0 && "getCFA(): unknown location");
81 __builtin_unreachable();
82 }
83};
84
85
86template <typename A, typename R>
87typename A::pint_t DwarfInstructions<A, R>::getSavedRegister(
88 A &addressSpace, const R &registers, pint_t cfa,
89 const RegisterLocation &savedReg) {
90 switch (savedReg.location) {
91 case kRegisterInCFA:
92 return (pint_t)addressSpace.getRegister(cfa + (pint_t)savedReg.value);
93
94 case kRegisterAtExpression:
95 return (pint_t)addressSpace.getRegister(evaluateExpression(
96 (pint_t)savedReg.value, addressSpace, registers, cfa));
97
98 case kRegisterIsExpression:
99 return evaluateExpression((pint_t)savedReg.value, addressSpace,
100 registers, cfa);
101
102 case kRegisterInRegister:
103 return registers.getRegister((int)savedReg.value);
104
105 case kRegisterUnused:
106 case kRegisterOffsetFromCFA:
107 // FIX ME
108 break;
109 }
110 _LIBUNWIND_ABORT("unsupported restore location for register");
111}
112
113template <typename A, typename R>
114double DwarfInstructions<A, R>::getSavedFloatRegister(
115 A &addressSpace, const R &registers, pint_t cfa,
116 const RegisterLocation &savedReg) {
117 switch (savedReg.location) {
118 case kRegisterInCFA:
119 return addressSpace.getDouble(cfa + (pint_t)savedReg.value);
120
121 case kRegisterAtExpression:
122 return addressSpace.getDouble(
123 evaluateExpression((pint_t)savedReg.value, addressSpace,
124 registers, cfa));
125
126 case kRegisterIsExpression:
127 case kRegisterUnused:
128 case kRegisterOffsetFromCFA:
129 case kRegisterInRegister:
130 // FIX ME
131 break;
132 }
133 _LIBUNWIND_ABORT("unsupported restore location for float register");
134}
135
136template <typename A, typename R>
137v128 DwarfInstructions<A, R>::getSavedVectorRegister(
138 A &addressSpace, const R &registers, pint_t cfa,
139 const RegisterLocation &savedReg) {
140 switch (savedReg.location) {
141 case kRegisterInCFA:
142 return addressSpace.getVector(cfa + (pint_t)savedReg.value);
143
144 case kRegisterAtExpression:
145 return addressSpace.getVector(
146 evaluateExpression((pint_t)savedReg.value, addressSpace,
147 registers, cfa));
148
149 case kRegisterIsExpression:
150 case kRegisterUnused:
151 case kRegisterOffsetFromCFA:
152 case kRegisterInRegister:
153 // FIX ME
154 break;
155 }
156 _LIBUNWIND_ABORT("unsupported restore location for vector register");
157}
158
159template <typename A, typename R>
160int DwarfInstructions<A, R>::stepWithDwarf(A &addressSpace, pint_t pc,
161 pint_t fdeStart, R &registers) {
162 FDE_Info fdeInfo;
163 CIE_Info cieInfo;
164 if (CFI_Parser<A>::decodeFDE(addressSpace, fdeStart, &fdeInfo,
165 &cieInfo) == NULL) {
166 PrologInfo prolog;
167 if (CFI_Parser<A>::parseFDEInstructions(addressSpace, fdeInfo, cieInfo, pc,
168 R::getArch(), &prolog)) {
169 // get pointer to cfa (architecture specific)
170 pint_t cfa = getCFA(addressSpace, prolog, registers);
171
172 // Check validity of the CFA.
173 // This is a very dirty hack (inspired by original libunwind version).
174 // Motivation: sometimes libunwind parse wrong value instead of CFA.
175 // We check that memory address belongs to our process by issuing "mincore" syscall.
176 // Actually we don't care if the address is in core or not, we only check return code.
177 // If Address Sanitizer will argue, replace syscall to inline assembly.
178 {
179 unsigned char mincore_res = 0;
180 if (0 != syscall(SYS_mincore, (void*)(cfa / 4096 * 4096), 1, &mincore_res))
181 return UNW_EBADFRAME;
182 }
183
184 // restore registers that DWARF says were saved
185 R newRegisters = registers;
186 pint_t returnAddress = 0;
187 const int lastReg = R::lastDwarfRegNum();
188 assert(static_cast<int>(kMaxRegisterNumber) >= lastReg &&
189 "register range too large");
190 assert(lastReg >= (int)cieInfo.returnAddressRegister &&
191 "register range does not contain return address register");
192 for (int i = 0; i <= lastReg; ++i) {
193 if (prolog.savedRegisters[i].location != kRegisterUnused) {
194 if (registers.validFloatRegister(i))
195 newRegisters.setFloatRegister(
196 i, getSavedFloatRegister(addressSpace, registers, cfa,
197 prolog.savedRegisters[i]));
198 else if (registers.validVectorRegister(i))
199 newRegisters.setVectorRegister(
200 i, getSavedVectorRegister(addressSpace, registers, cfa,
201 prolog.savedRegisters[i]));
202 else if (i == (int)cieInfo.returnAddressRegister)
203 returnAddress = getSavedRegister(addressSpace, registers, cfa,
204 prolog.savedRegisters[i]);
205 else if (registers.validRegister(i))
206 newRegisters.setRegister(
207 i, getSavedRegister(addressSpace, registers, cfa,
208 prolog.savedRegisters[i]));
209 else
210 return UNW_EBADREG;
211 }
212 }
213
214 // By definition, the CFA is the stack pointer at the call site, so
215 // restoring SP means setting it to CFA.
216 newRegisters.setSP(cfa);
217
218#if defined(_LIBUNWIND_TARGET_AARCH64)
219 // If the target is aarch64 then the return address may have been signed
220 // using the v8.3 pointer authentication extensions. The original
221 // return address needs to be authenticated before the return address is
222 // restored. autia1716 is used instead of autia as autia1716 assembles
223 // to a NOP on pre-v8.3a architectures.
224 if ((R::getArch() == REGISTERS_ARM64) &&
225 prolog.savedRegisters[UNW_ARM64_RA_SIGN_STATE].value) {
226#if !defined(_LIBUNWIND_IS_NATIVE_ONLY)
227 return UNW_ECROSSRASIGNING;
228#else
229 register unsigned long long x17 __asm("x17") = returnAddress;
230 register unsigned long long x16 __asm("x16") = cfa;
231
232 // These are the autia1716/autib1716 instructions. The hint instructions
233 // are used here as gcc does not assemble autia1716/autib1716 for pre
234 // armv8.3a targets.
235 if (cieInfo.addressesSignedWithBKey)
236 asm("hint 0xe" : "+r"(x17) : "r"(x16)); // autib1716
237 else
238 asm("hint 0xc" : "+r"(x17) : "r"(x16)); // autia1716
239 returnAddress = x17;
240#endif
241 }
242#endif
243
244#if defined(_LIBUNWIND_TARGET_SPARC)
245 if (R::getArch() == REGISTERS_SPARC) {
246 // Skip call site instruction and delay slot
247 returnAddress += 8;
248 // Skip unimp instruction if function returns a struct
249 if ((addressSpace.get32(returnAddress) & 0xC1C00000) == 0)
250 returnAddress += 4;
251 }
252#endif
253
254 // Return address is address after call site instruction, so setting IP to
255 // that does simualates a return.
256 newRegisters.setIP(returnAddress);
257
258 // Simulate the step by replacing the register set with the new ones.
259 registers = newRegisters;
260
261 return UNW_STEP_SUCCESS;
262 }
263 }
264 return UNW_EBADFRAME;
265}
266
267template <typename A, typename R>
268typename A::pint_t
269DwarfInstructions<A, R>::evaluateExpression(pint_t expression, A &addressSpace,
270 const R &registers,
271 pint_t initialStackValue) {
272 const bool log = false;
273 pint_t p = expression;
274 pint_t expressionEnd = expression + 20; // temp, until len read
275 pint_t length = (pint_t)addressSpace.getULEB128(p, expressionEnd);
276 expressionEnd = p + length;
277 if (log)
278 fprintf(stderr, "evaluateExpression(): length=%" PRIu64 "\n",
279 (uint64_t)length);
280 pint_t stack[100];
281 pint_t *sp = stack;
282 *(++sp) = initialStackValue;
283
284 while (p < expressionEnd) {
285 if (log) {
286 for (pint_t *t = sp; t > stack; --t) {
287 fprintf(stderr, "sp[] = 0x%" PRIx64 "\n", (uint64_t)(*t));
288 }
289 }
290 uint8_t opcode = addressSpace.get8(p++);
291 sint_t svalue, svalue2;
292 pint_t value;
293 uint32_t reg;
294 switch (opcode) {
295 case DW_OP_addr:
296 // push immediate address sized value
297 value = addressSpace.getP(p);
298 p += sizeof(pint_t);
299 *(++sp) = value;
300 if (log)
301 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
302 break;
303
304 case DW_OP_deref:
305 // pop stack, dereference, push result
306 value = *sp--;
307 *(++sp) = addressSpace.getP(value);
308 if (log)
309 fprintf(stderr, "dereference 0x%" PRIx64 "\n", (uint64_t)value);
310 break;
311
312 case DW_OP_const1u:
313 // push immediate 1 byte value
314 value = addressSpace.get8(p);
315 p += 1;
316 *(++sp) = value;
317 if (log)
318 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
319 break;
320
321 case DW_OP_const1s:
322 // push immediate 1 byte signed value
323 svalue = (int8_t) addressSpace.get8(p);
324 p += 1;
325 *(++sp) = (pint_t)svalue;
326 if (log)
327 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)svalue);
328 break;
329
330 case DW_OP_const2u:
331 // push immediate 2 byte value
332 value = addressSpace.get16(p);
333 p += 2;
334 *(++sp) = value;
335 if (log)
336 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
337 break;
338
339 case DW_OP_const2s:
340 // push immediate 2 byte signed value
341 svalue = (int16_t) addressSpace.get16(p);
342 p += 2;
343 *(++sp) = (pint_t)svalue;
344 if (log)
345 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)svalue);
346 break;
347
348 case DW_OP_const4u:
349 // push immediate 4 byte value
350 value = addressSpace.get32(p);
351 p += 4;
352 *(++sp) = value;
353 if (log)
354 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
355 break;
356
357 case DW_OP_const4s:
358 // push immediate 4 byte signed value
359 svalue = (int32_t)addressSpace.get32(p);
360 p += 4;
361 *(++sp) = (pint_t)svalue;
362 if (log)
363 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)svalue);
364 break;
365
366 case DW_OP_const8u:
367 // push immediate 8 byte value
368 value = (pint_t)addressSpace.get64(p);
369 p += 8;
370 *(++sp) = value;
371 if (log)
372 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
373 break;
374
375 case DW_OP_const8s:
376 // push immediate 8 byte signed value
377 value = (pint_t)addressSpace.get64(p);
378 p += 8;
379 *(++sp) = value;
380 if (log)
381 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
382 break;
383
384 case DW_OP_constu:
385 // push immediate ULEB128 value
386 value = (pint_t)addressSpace.getULEB128(p, expressionEnd);
387 *(++sp) = value;
388 if (log)
389 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
390 break;
391
392 case DW_OP_consts:
393 // push immediate SLEB128 value
394 svalue = (sint_t)addressSpace.getSLEB128(p, expressionEnd);
395 *(++sp) = (pint_t)svalue;
396 if (log)
397 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)svalue);
398 break;
399
400 case DW_OP_dup:
401 // push top of stack
402 value = *sp;
403 *(++sp) = value;
404 if (log)
405 fprintf(stderr, "duplicate top of stack\n");
406 break;
407
408 case DW_OP_drop:
409 // pop
410 --sp;
411 if (log)
412 fprintf(stderr, "pop top of stack\n");
413 break;
414
415 case DW_OP_over:
416 // dup second
417 value = sp[-1];
418 *(++sp) = value;
419 if (log)
420 fprintf(stderr, "duplicate second in stack\n");
421 break;
422
423 case DW_OP_pick:
424 // pick from
425 reg = addressSpace.get8(p);
426 p += 1;
427 value = sp[-reg];
428 *(++sp) = value;
429 if (log)
430 fprintf(stderr, "duplicate %d in stack\n", reg);
431 break;
432
433 case DW_OP_swap:
434 // swap top two
435 value = sp[0];
436 sp[0] = sp[-1];
437 sp[-1] = value;
438 if (log)
439 fprintf(stderr, "swap top of stack\n");
440 break;
441
442 case DW_OP_rot:
443 // rotate top three
444 value = sp[0];
445 sp[0] = sp[-1];
446 sp[-1] = sp[-2];
447 sp[-2] = value;
448 if (log)
449 fprintf(stderr, "rotate top three of stack\n");
450 break;
451
452 case DW_OP_xderef:
453 // pop stack, dereference, push result
454 value = *sp--;
455 *sp = *((pint_t*)value);
456 if (log)
457 fprintf(stderr, "x-dereference 0x%" PRIx64 "\n", (uint64_t)value);
458 break;
459
460 case DW_OP_abs:
461 svalue = (sint_t)*sp;
462 if (svalue < 0)
463 *sp = (pint_t)(-svalue);
464 if (log)
465 fprintf(stderr, "abs\n");
466 break;
467
468 case DW_OP_and:
469 value = *sp--;
470 *sp &= value;
471 if (log)
472 fprintf(stderr, "and\n");
473 break;
474
475 case DW_OP_div:
476 svalue = (sint_t)(*sp--);
477 svalue2 = (sint_t)*sp;
478 *sp = (pint_t)(svalue2 / svalue);
479 if (log)
480 fprintf(stderr, "div\n");
481 break;
482
483 case DW_OP_minus:
484 value = *sp--;
485 *sp = *sp - value;
486 if (log)
487 fprintf(stderr, "minus\n");
488 break;
489
490 case DW_OP_mod:
491 svalue = (sint_t)(*sp--);
492 svalue2 = (sint_t)*sp;
493 *sp = (pint_t)(svalue2 % svalue);
494 if (log)
495 fprintf(stderr, "module\n");
496 break;
497
498 case DW_OP_mul:
499 svalue = (sint_t)(*sp--);
500 svalue2 = (sint_t)*sp;
501 *sp = (pint_t)(svalue2 * svalue);
502 if (log)
503 fprintf(stderr, "mul\n");
504 break;
505
506 case DW_OP_neg:
507 *sp = 0 - *sp;
508 if (log)
509 fprintf(stderr, "neg\n");
510 break;
511
512 case DW_OP_not:
513 svalue = (sint_t)(*sp);
514 *sp = (pint_t)(~svalue);
515 if (log)
516 fprintf(stderr, "not\n");
517 break;
518
519 case DW_OP_or:
520 value = *sp--;
521 *sp |= value;
522 if (log)
523 fprintf(stderr, "or\n");
524 break;
525
526 case DW_OP_plus:
527 value = *sp--;
528 *sp += value;
529 if (log)
530 fprintf(stderr, "plus\n");
531 break;
532
533 case DW_OP_plus_uconst:
534 // pop stack, add uelb128 constant, push result
535 *sp += static_cast<pint_t>(addressSpace.getULEB128(p, expressionEnd));
536 if (log)
537 fprintf(stderr, "add constant\n");
538 break;
539
540 case DW_OP_shl:
541 value = *sp--;
542 *sp = *sp << value;
543 if (log)
544 fprintf(stderr, "shift left\n");
545 break;
546
547 case DW_OP_shr:
548 value = *sp--;
549 *sp = *sp >> value;
550 if (log)
551 fprintf(stderr, "shift left\n");
552 break;
553
554 case DW_OP_shra:
555 value = *sp--;
556 svalue = (sint_t)*sp;
557 *sp = (pint_t)(svalue >> value);
558 if (log)
559 fprintf(stderr, "shift left arithmetric\n");
560 break;
561
562 case DW_OP_xor:
563 value = *sp--;
564 *sp ^= value;
565 if (log)
566 fprintf(stderr, "xor\n");
567 break;
568
569 case DW_OP_skip:
570 svalue = (int16_t) addressSpace.get16(p);
571 p += 2;
572 p = (pint_t)((sint_t)p + svalue);
573 if (log)
574 fprintf(stderr, "skip %" PRIu64 "\n", (uint64_t)svalue);
575 break;
576
577 case DW_OP_bra:
578 svalue = (int16_t) addressSpace.get16(p);
579 p += 2;
580 if (*sp--)
581 p = (pint_t)((sint_t)p + svalue);
582 if (log)
583 fprintf(stderr, "bra %" PRIu64 "\n", (uint64_t)svalue);
584 break;
585
586 case DW_OP_eq:
587 value = *sp--;
588 *sp = (*sp == value);
589 if (log)
590 fprintf(stderr, "eq\n");
591 break;
592
593 case DW_OP_ge:
594 value = *sp--;
595 *sp = (*sp >= value);
596 if (log)
597 fprintf(stderr, "ge\n");
598 break;
599
600 case DW_OP_gt:
601 value = *sp--;
602 *sp = (*sp > value);
603 if (log)
604 fprintf(stderr, "gt\n");
605 break;
606
607 case DW_OP_le:
608 value = *sp--;
609 *sp = (*sp <= value);
610 if (log)
611 fprintf(stderr, "le\n");
612 break;
613
614 case DW_OP_lt:
615 value = *sp--;
616 *sp = (*sp < value);
617 if (log)
618 fprintf(stderr, "lt\n");
619 break;
620
621 case DW_OP_ne:
622 value = *sp--;
623 *sp = (*sp != value);
624 if (log)
625 fprintf(stderr, "ne\n");
626 break;
627
628 case DW_OP_lit0:
629 case DW_OP_lit1:
630 case DW_OP_lit2:
631 case DW_OP_lit3:
632 case DW_OP_lit4:
633 case DW_OP_lit5:
634 case DW_OP_lit6:
635 case DW_OP_lit7:
636 case DW_OP_lit8:
637 case DW_OP_lit9:
638 case DW_OP_lit10:
639 case DW_OP_lit11:
640 case DW_OP_lit12:
641 case DW_OP_lit13:
642 case DW_OP_lit14:
643 case DW_OP_lit15:
644 case DW_OP_lit16:
645 case DW_OP_lit17:
646 case DW_OP_lit18:
647 case DW_OP_lit19:
648 case DW_OP_lit20:
649 case DW_OP_lit21:
650 case DW_OP_lit22:
651 case DW_OP_lit23:
652 case DW_OP_lit24:
653 case DW_OP_lit25:
654 case DW_OP_lit26:
655 case DW_OP_lit27:
656 case DW_OP_lit28:
657 case DW_OP_lit29:
658 case DW_OP_lit30:
659 case DW_OP_lit31:
660 value = static_cast<pint_t>(opcode - DW_OP_lit0);
661 *(++sp) = value;
662 if (log)
663 fprintf(stderr, "push literal 0x%" PRIx64 "\n", (uint64_t)value);
664 break;
665
666 case DW_OP_reg0:
667 case DW_OP_reg1:
668 case DW_OP_reg2:
669 case DW_OP_reg3:
670 case DW_OP_reg4:
671 case DW_OP_reg5:
672 case DW_OP_reg6:
673 case DW_OP_reg7:
674 case DW_OP_reg8:
675 case DW_OP_reg9:
676 case DW_OP_reg10:
677 case DW_OP_reg11:
678 case DW_OP_reg12:
679 case DW_OP_reg13:
680 case DW_OP_reg14:
681 case DW_OP_reg15:
682 case DW_OP_reg16:
683 case DW_OP_reg17:
684 case DW_OP_reg18:
685 case DW_OP_reg19:
686 case DW_OP_reg20:
687 case DW_OP_reg21:
688 case DW_OP_reg22:
689 case DW_OP_reg23:
690 case DW_OP_reg24:
691 case DW_OP_reg25:
692 case DW_OP_reg26:
693 case DW_OP_reg27:
694 case DW_OP_reg28:
695 case DW_OP_reg29:
696 case DW_OP_reg30:
697 case DW_OP_reg31:
698 reg = static_cast<uint32_t>(opcode - DW_OP_reg0);
699 *(++sp) = registers.getRegister((int)reg);
700 if (log)
701 fprintf(stderr, "push reg %d\n", reg);
702 break;
703
704 case DW_OP_regx:
705 reg = static_cast<uint32_t>(addressSpace.getULEB128(p, expressionEnd));
706 *(++sp) = registers.getRegister((int)reg);
707 if (log)
708 fprintf(stderr, "push reg %d + 0x%" PRIx64 "\n", reg, (uint64_t)svalue);
709 break;
710
711 case DW_OP_breg0:
712 case DW_OP_breg1:
713 case DW_OP_breg2:
714 case DW_OP_breg3:
715 case DW_OP_breg4:
716 case DW_OP_breg5:
717 case DW_OP_breg6:
718 case DW_OP_breg7:
719 case DW_OP_breg8:
720 case DW_OP_breg9:
721 case DW_OP_breg10:
722 case DW_OP_breg11:
723 case DW_OP_breg12:
724 case DW_OP_breg13:
725 case DW_OP_breg14:
726 case DW_OP_breg15:
727 case DW_OP_breg16:
728 case DW_OP_breg17:
729 case DW_OP_breg18:
730 case DW_OP_breg19:
731 case DW_OP_breg20:
732 case DW_OP_breg21:
733 case DW_OP_breg22:
734 case DW_OP_breg23:
735 case DW_OP_breg24:
736 case DW_OP_breg25:
737 case DW_OP_breg26:
738 case DW_OP_breg27:
739 case DW_OP_breg28:
740 case DW_OP_breg29:
741 case DW_OP_breg30:
742 case DW_OP_breg31:
743 reg = static_cast<uint32_t>(opcode - DW_OP_breg0);
744 svalue = (sint_t)addressSpace.getSLEB128(p, expressionEnd);
745 svalue += static_cast<sint_t>(registers.getRegister((int)reg));
746 *(++sp) = (pint_t)(svalue);
747 if (log)
748 fprintf(stderr, "push reg %d + 0x%" PRIx64 "\n", reg, (uint64_t)svalue);
749 break;
750
751 case DW_OP_bregx:
752 reg = static_cast<uint32_t>(addressSpace.getULEB128(p, expressionEnd));
753 svalue = (sint_t)addressSpace.getSLEB128(p, expressionEnd);
754 svalue += static_cast<sint_t>(registers.getRegister((int)reg));
755 *(++sp) = (pint_t)(svalue);
756 if (log)
757 fprintf(stderr, "push reg %d + 0x%" PRIx64 "\n", reg, (uint64_t)svalue);
758 break;
759
760 case DW_OP_fbreg:
761 _LIBUNWIND_ABORT("DW_OP_fbreg not implemented");
762 break;
763
764 case DW_OP_piece:
765 _LIBUNWIND_ABORT("DW_OP_piece not implemented");
766 break;
767
768 case DW_OP_deref_size:
769 // pop stack, dereference, push result
770 value = *sp--;
771 switch (addressSpace.get8(p++)) {
772 case 1:
773 value = addressSpace.get8(value);
774 break;
775 case 2:
776 value = addressSpace.get16(value);
777 break;
778 case 4:
779 value = addressSpace.get32(value);
780 break;
781 case 8:
782 value = (pint_t)addressSpace.get64(value);
783 break;
784 default:
785 _LIBUNWIND_ABORT("DW_OP_deref_size with bad size");
786 }
787 *(++sp) = value;
788 if (log)
789 fprintf(stderr, "sized dereference 0x%" PRIx64 "\n", (uint64_t)value);
790 break;
791
792 case DW_OP_xderef_size:
793 case DW_OP_nop:
794 case DW_OP_push_object_addres:
795 case DW_OP_call2:
796 case DW_OP_call4:
797 case DW_OP_call_ref:
798 default:
799 _LIBUNWIND_ABORT("DWARF opcode not implemented");
800 }
801
802 }
803 if (log)
804 fprintf(stderr, "expression evaluates to 0x%" PRIx64 "\n", (uint64_t)*sp);
805 return *sp;
806}
807
808
809
810} // namespace libunwind
811
812#endif // __DWARF_INSTRUCTIONS_HPP__
813