1 | // Licensed to the .NET Foundation under one or more agreements. |
2 | // The .NET Foundation licenses this file to you under the MIT license. |
3 | // See the LICENSE file in the project root for more information. |
4 | |
5 | #ifndef _HW_INTIRNSIC_ARM64_H_ |
6 | #define _HW_INTIRNSIC_ARM64_H_ |
7 | |
8 | #ifdef FEATURE_HW_INTRINSICS |
9 | |
10 | struct HWIntrinsicInfo |
11 | { |
12 | // Forms are used to gather inrinsics with similar characteristics |
13 | // Generally instructions with the same form will be treated |
14 | // identically by the Importer, LSRA, Lowering, and CodeGen |
15 | enum Form |
16 | { |
17 | // Shared forms |
18 | IsSupported, // The IsSupported property will use this form |
19 | Unsupported, // Any intrisic which is unsupported and must throw PlatformNotSupportException will use this form |
20 | // Non SIMD forms |
21 | UnaryOp, // Non SIMD intrinsics which take a single argument |
22 | CrcOp, // Crc intrinsics. |
23 | Sha1RotateOp, // SHA1 Hash Rotate intrinsics. Takes hash index unsigned int and returns unsigned int. |
24 | |
25 | // SIMD common forms |
26 | SimdBinaryOp, // SIMD intrinsics which take two vector operands and return a vector |
27 | SimdUnaryOp, // SIMD intrinsics which take one vector operand and return a vector |
28 | SimdBinaryRMWOp, // Same as SimdBinaryOp , with first source vector used as destination vector also. |
29 | SimdTernaryRMWOp, // SIMD intrinsics which take three vector operands and return a vector , |
30 | // with destination vector same as first source vector |
31 | // SIMD custom forms |
32 | , // SIMD intrinsics which take one vector operand and a lane index and return an element |
33 | SimdInsertOp, // SIMD intrinsics which take one vector operand and a lane index and value and return a vector |
34 | SimdSelectOp, // BitwiseSelect intrinsic which takes three vector operands and returns a vector |
35 | SimdSetAllOp, // Simd intrinsics which take one numeric operand and return a vector |
36 | Sha1HashOp // SIMD instrisics for SHA1 Hash operations. Takes two vectors and hash index and returns vector |
37 | }; |
38 | |
39 | // Flags will be used to handle secondary meta-data which will help |
40 | // Reduce the number of forms |
41 | enum Flags |
42 | { |
43 | None = 0, |
44 | LowerCmpUZero = (1UL << 0), // Unsigned zero compare form must be lowered |
45 | }; |
46 | |
47 | NamedIntrinsic id; |
48 | const char* name; |
49 | uint64_t isaflags; |
50 | Form form; |
51 | Flags flags; |
52 | instruction instrs[3]; |
53 | |
54 | static const HWIntrinsicInfo& lookup(NamedIntrinsic id); |
55 | static int lookupNumArgs(const GenTreeHWIntrinsic* node); |
56 | |
57 | static bool isFullyImplementedIsa(InstructionSet isa); |
58 | static bool isScalarIsa(InstructionSet isa); |
59 | |
60 | // Member lookup |
61 | |
62 | static NamedIntrinsic lookupId(NamedIntrinsic id) |
63 | { |
64 | return lookup(id).id; |
65 | } |
66 | |
67 | static const char* lookupName(NamedIntrinsic id) |
68 | { |
69 | return lookup(id).name; |
70 | } |
71 | }; |
72 | |
73 | #endif // FEATURE_HW_INTRINSICS |
74 | #endif // _HW_INTIRNSIC_ARM64_H_ |
75 | |