1/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * Mupen64plus - device.h *
3 * Mupen64Plus homepage: https://mupen64plus.org/ *
4 * Copyright (C) 2016 Bobby Smiles *
5 * *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
10 * *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
15 * *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
21
22#ifndef M64P_DEVICE_DEVICE_H
23#define M64P_DEVICE_DEVICE_H
24
25#include <stddef.h>
26#include <stdint.h>
27
28#include "cart/cart.h"
29#include "controllers/game_controller.h"
30#include "controllers/paks/biopak.h"
31#include "controllers/paks/mempak.h"
32#include "controllers/paks/rumblepak.h"
33#include "controllers/paks/transferpak.h"
34#include "dd/dd_controller.h"
35#include "gb/gb_cart.h"
36#include "memory/memory.h"
37#include "pif/pif.h"
38#include "r4300/r4300_core.h"
39#include "rcp/ai/ai_controller.h"
40#include "rcp/mi/mi_controller.h"
41#include "rcp/pi/pi_controller.h"
42#include "rcp/rdp/rdp_core.h"
43#include "rcp/ri/ri_controller.h"
44#include "rcp/rsp/rsp_core.h"
45#include "rcp/si/si_controller.h"
46#include "rcp/vi/vi_controller.h"
47#include "rdram/rdram.h"
48
49struct audio_out_backend_interface;
50struct clock_backend_interface;
51struct storage_backend_interface;
52struct joybus_device_interface;
53
54enum { GAME_CONTROLLERS_COUNT = 4 };
55
56/* memory map constants */
57#define MM_RDRAM_DRAM UINT32_C(0x00000000)
58#define MM_RDRAM_REGS UINT32_C(0x03f00000)
59
60#define MM_RSP_MEM UINT32_C(0x04000000)
61#define MM_RSP_REGS UINT32_C(0x04040000)
62#define MM_RSP_REGS2 UINT32_C(0x04080000)
63#define MM_DPC_REGS UINT32_C(0x04100000)
64#define MM_DPS_REGS UINT32_C(0x04200000)
65#define MM_MI_REGS UINT32_C(0x04300000)
66#define MM_VI_REGS UINT32_C(0x04400000)
67#define MM_AI_REGS UINT32_C(0x04500000)
68#define MM_PI_REGS UINT32_C(0x04600000)
69#define MM_RI_REGS UINT32_C(0x04700000)
70#define MM_SI_REGS UINT32_C(0x04800000)
71
72#define MM_DOM2_ADDR1 UINT32_C(0x05000000)
73#define MM_DD_C2S_BUFFER UINT32_C(0x05000000)
74#define MM_DD_DS_BUFFER UINT32_C(0x05000400)
75#define MM_DD_REGS UINT32_C(0x05000500)
76#define MM_DD_MS_RAM UINT32_C(0x05000580)
77#define MM_DD_ROM UINT32_C(0x06000000)
78
79#define MM_DOM2_ADDR2 UINT32_C(0x08000000)
80
81#define MM_CART_ROM UINT32_C(0x10000000) /* dom1 addr2 */
82#define MM_PIF_MEM UINT32_C(0x1fc00000)
83#define MM_CART_DOM3 UINT32_C(0x1fd00000) /* dom2 addr2 */
84
85/* Device structure is a container for the n64 submodules
86 * It contains all state related to the emulated system. */
87struct device
88{
89 struct r4300_core r4300;
90 struct rdp_core dp;
91 struct rsp_core sp;
92 struct ai_controller ai;
93 struct mi_controller mi;
94 struct pi_controller pi;
95 struct ri_controller ri;
96 struct si_controller si;
97 struct vi_controller vi;
98 struct pif pif;
99 struct rdram rdram;
100 struct memory mem;
101
102 struct game_controller controllers[GAME_CONTROLLERS_COUNT];
103 struct biopak biopaks[GAME_CONTROLLERS_COUNT];
104 struct mempak mempaks[GAME_CONTROLLERS_COUNT];
105 struct rumblepak rumblepaks[GAME_CONTROLLERS_COUNT];
106 struct transferpak transferpaks[GAME_CONTROLLERS_COUNT];
107 struct gb_cart gb_carts[GAME_CONTROLLERS_COUNT];
108
109 struct cart cart;
110
111 struct dd_controller dd;
112};
113
114/* Setup device "static" properties. */
115void init_device(struct device* dev,
116 /* memory */
117 void* base,
118 /* r4300 */
119 unsigned int emumode,
120 unsigned int count_per_op,
121 int no_compiled_jump,
122 int randomize_interrupt,
123 /* ai */
124 void* aout, const struct audio_out_backend_interface* iaout,
125 /* si */
126 unsigned int si_dma_duration,
127 /* rdram */
128 size_t dram_size,
129 /* pif */
130 void* jbds[PIF_CHANNELS_COUNT],
131 const struct joybus_device_interface* ijbds[PIF_CHANNELS_COUNT],
132 /* vi */
133 unsigned int vi_clock, unsigned int expected_refresh_rate,
134 /* cart */
135 void* af_rtc_clock, const struct clock_backend_interface* iaf_rtc_clock,
136 size_t rom_size,
137 uint16_t eeprom_type,
138 void* eeprom_storage, const struct storage_backend_interface* ieeprom_storage,
139 uint32_t flashram_type,
140 void* flashram_storage, const struct storage_backend_interface* iflashram_storage,
141 void* sram_storage, const struct storage_backend_interface* isram_storage,
142 /* dd */
143 void* dd_rtc_clock, const struct clock_backend_interface* dd_rtc_iclock,
144 size_t dd_rom_size,
145 void* dd_disk, const struct storage_backend_interface* dd_idisk);
146
147/* Setup device such that it's state is
148 * what it should be after power on.
149 */
150void poweron_device(struct device* dev);
151
152/* Let device run.
153 * To return from this function, a call to stop_device has to be made.
154 */
155void run_device(struct device* dev);
156
157/* Terminate execution of running device.
158 */
159void stop_device(struct device* dev);
160
161/* Schedule a hard reset on running device.
162 * This is what model a poweroff/poweron action on the device.
163 */
164void hard_reset_device(struct device* dev);
165
166/* Schedule a soft reset on runnning device.
167 * This is what model a press on the device reset button.
168 */
169void soft_reset_device(struct device* dev);
170
171#endif
172