1 | /* |
2 | * KZM Board System emulation. |
3 | * |
4 | * Copyright (c) 2008 OKL and 2011 NICTA |
5 | * Written by Hans at OK-Labs |
6 | * Updated by Peter Chubb. |
7 | * |
8 | * This code is licensed under the GPL, version 2 or later. |
9 | * See the file `COPYING' in the top level directory. |
10 | * |
11 | * It (partially) emulates a Kyoto Microcomputer |
12 | * KZM-ARM11-01 evaluation board, with a Freescale |
13 | * i.MX31 SoC |
14 | */ |
15 | |
16 | #include "qemu/osdep.h" |
17 | #include "qapi/error.h" |
18 | #include "cpu.h" |
19 | #include "hw/arm/fsl-imx31.h" |
20 | #include "hw/boards.h" |
21 | #include "qemu/error-report.h" |
22 | #include "exec/address-spaces.h" |
23 | #include "net/net.h" |
24 | #include "hw/net/lan9118.h" |
25 | #include "hw/char/serial.h" |
26 | #include "sysemu/qtest.h" |
27 | #include "sysemu/sysemu.h" |
28 | |
29 | /* Memory map for Kzm Emulation Baseboard: |
30 | * 0x00000000-0x7fffffff See i.MX31 SOC for support |
31 | * 0x80000000-0x8fffffff RAM EMULATED |
32 | * 0x90000000-0x9fffffff RAM EMULATED |
33 | * 0xa0000000-0xafffffff Flash IGNORED |
34 | * 0xb0000000-0xb3ffffff Unavailable IGNORED |
35 | * 0xb4000000-0xb4000fff 8-bit free space IGNORED |
36 | * 0xb4001000-0xb400100f Board control IGNORED |
37 | * 0xb4001003 DIP switch |
38 | * 0xb4001010-0xb400101f 7-segment LED IGNORED |
39 | * 0xb4001020-0xb400102f LED IGNORED |
40 | * 0xb4001030-0xb400103f LED IGNORED |
41 | * 0xb4001040-0xb400104f FPGA, UART EMULATED |
42 | * 0xb4001050-0xb400105f FPGA, UART EMULATED |
43 | * 0xb4001060-0xb40fffff FPGA IGNORED |
44 | * 0xb6000000-0xb61fffff LAN controller EMULATED |
45 | * 0xb6200000-0xb62fffff FPGA NAND Controller IGNORED |
46 | * 0xb6300000-0xb7ffffff Free IGNORED |
47 | * 0xb8000000-0xb8004fff Memory control registers IGNORED |
48 | * 0xc0000000-0xc3ffffff PCMCIA/CF IGNORED |
49 | * 0xc4000000-0xffffffff Reserved IGNORED |
50 | */ |
51 | |
52 | typedef struct IMX31KZM { |
53 | FslIMX31State soc; |
54 | MemoryRegion ram; |
55 | MemoryRegion ram_alias; |
56 | } IMX31KZM; |
57 | |
58 | #define KZM_RAM_ADDR (FSL_IMX31_SDRAM0_ADDR) |
59 | #define KZM_FPGA_ADDR (FSL_IMX31_CS4_ADDR + 0x1040) |
60 | #define KZM_LAN9118_ADDR (FSL_IMX31_CS5_ADDR) |
61 | |
62 | static struct arm_boot_info kzm_binfo = { |
63 | .loader_start = KZM_RAM_ADDR, |
64 | .board_id = 1722, |
65 | }; |
66 | |
67 | static void kzm_init(MachineState *machine) |
68 | { |
69 | IMX31KZM *s = g_new0(IMX31KZM, 1); |
70 | unsigned int ram_size; |
71 | unsigned int alias_offset; |
72 | unsigned int i; |
73 | |
74 | object_initialize_child(OBJECT(machine), "soc" , &s->soc, sizeof(s->soc), |
75 | TYPE_FSL_IMX31, &error_abort, NULL); |
76 | |
77 | object_property_set_bool(OBJECT(&s->soc), true, "realized" , &error_fatal); |
78 | |
79 | /* Check the amount of memory is compatible with the SOC */ |
80 | if (machine->ram_size > (FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE)) { |
81 | warn_report("RAM size " RAM_ADDR_FMT " above max supported, " |
82 | "reduced to %x" , machine->ram_size, |
83 | FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE); |
84 | machine->ram_size = FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE; |
85 | } |
86 | |
87 | memory_region_allocate_system_memory(&s->ram, NULL, "kzm.ram" , |
88 | machine->ram_size); |
89 | memory_region_add_subregion(get_system_memory(), FSL_IMX31_SDRAM0_ADDR, |
90 | &s->ram); |
91 | |
92 | /* initialize the alias memory if any */ |
93 | for (i = 0, ram_size = machine->ram_size, alias_offset = 0; |
94 | (i < 2) && ram_size; i++) { |
95 | unsigned int size; |
96 | static const struct { |
97 | hwaddr addr; |
98 | unsigned int size; |
99 | } ram[2] = { |
100 | { FSL_IMX31_SDRAM0_ADDR, FSL_IMX31_SDRAM0_SIZE }, |
101 | { FSL_IMX31_SDRAM1_ADDR, FSL_IMX31_SDRAM1_SIZE }, |
102 | }; |
103 | |
104 | size = MIN(ram_size, ram[i].size); |
105 | |
106 | ram_size -= size; |
107 | |
108 | if (size < ram[i].size) { |
109 | memory_region_init_alias(&s->ram_alias, NULL, "ram.alias" , |
110 | &s->ram, alias_offset, ram[i].size - size); |
111 | memory_region_add_subregion(get_system_memory(), |
112 | ram[i].addr + size, &s->ram_alias); |
113 | } |
114 | |
115 | alias_offset += ram[i].size; |
116 | } |
117 | |
118 | if (nd_table[0].used) { |
119 | lan9118_init(&nd_table[0], KZM_LAN9118_ADDR, |
120 | qdev_get_gpio_in(DEVICE(&s->soc.avic), 52)); |
121 | } |
122 | |
123 | if (serial_hd(2)) { /* touchscreen */ |
124 | serial_mm_init(get_system_memory(), KZM_FPGA_ADDR+0x10, 0, |
125 | qdev_get_gpio_in(DEVICE(&s->soc.avic), 52), |
126 | 14745600, serial_hd(2), DEVICE_NATIVE_ENDIAN); |
127 | } |
128 | |
129 | kzm_binfo.ram_size = machine->ram_size; |
130 | kzm_binfo.nb_cpus = 1; |
131 | |
132 | if (!qtest_enabled()) { |
133 | arm_load_kernel(&s->soc.cpu, machine, &kzm_binfo); |
134 | } |
135 | } |
136 | |
137 | static void kzm_machine_init(MachineClass *mc) |
138 | { |
139 | mc->desc = "ARM KZM Emulation Baseboard (ARM1136)" ; |
140 | mc->init = kzm_init; |
141 | mc->ignore_memory_transaction_failures = true; |
142 | } |
143 | |
144 | DEFINE_MACHINE("kzm" , kzm_machine_init) |
145 | |