1/*
2 * ACPI implementation
3 *
4 * Copyright (c) 2006 Fabrice Bellard
5 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
6 * VA Linux Systems Japan K.K.
7 * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, see <http://www.gnu.org/licenses/>
21 */
22
23#include "qemu/osdep.h"
24#include "hw/i2c/pm_smbus.h"
25#include "hw/pci/pci.h"
26#include "migration/vmstate.h"
27#include "qemu/module.h"
28
29#include "hw/i386/ich9.h"
30
31#define ICH9_SMB_DEVICE(obj) \
32 OBJECT_CHECK(ICH9SMBState, (obj), TYPE_ICH9_SMB_DEVICE)
33
34typedef struct ICH9SMBState {
35 PCIDevice dev;
36
37 bool irq_enabled;
38
39 PMSMBus smb;
40} ICH9SMBState;
41
42static bool ich9_vmstate_need_smbus(void *opaque, int version_id)
43{
44 return pm_smbus_vmstate_needed();
45}
46
47static const VMStateDescription vmstate_ich9_smbus = {
48 .name = "ich9_smb",
49 .version_id = 1,
50 .minimum_version_id = 1,
51 .fields = (VMStateField[]) {
52 VMSTATE_PCI_DEVICE(dev, ICH9SMBState),
53 VMSTATE_BOOL_TEST(irq_enabled, ICH9SMBState, ich9_vmstate_need_smbus),
54 VMSTATE_STRUCT_TEST(smb, ICH9SMBState, ich9_vmstate_need_smbus, 1,
55 pmsmb_vmstate, PMSMBus),
56 VMSTATE_END_OF_LIST()
57 }
58};
59
60static void ich9_smbus_write_config(PCIDevice *d, uint32_t address,
61 uint32_t val, int len)
62{
63 ICH9SMBState *s = ICH9_SMB_DEVICE(d);
64
65 pci_default_write_config(d, address, val, len);
66 if (range_covers_byte(address, len, ICH9_SMB_HOSTC)) {
67 uint8_t hostc = s->dev.config[ICH9_SMB_HOSTC];
68 if (hostc & ICH9_SMB_HOSTC_HST_EN) {
69 memory_region_set_enabled(&s->smb.io, true);
70 } else {
71 memory_region_set_enabled(&s->smb.io, false);
72 }
73 s->smb.i2c_enable = (hostc & ICH9_SMB_HOSTC_I2C_EN) != 0;
74 if (hostc & ICH9_SMB_HOSTC_SSRESET) {
75 s->smb.reset(&s->smb);
76 s->dev.config[ICH9_SMB_HOSTC] &= ~ICH9_SMB_HOSTC_SSRESET;
77 }
78 }
79}
80
81static void ich9_smbus_realize(PCIDevice *d, Error **errp)
82{
83 ICH9SMBState *s = ICH9_SMB_DEVICE(d);
84
85 /* TODO? D31IP.SMIP in chipset configuration space */
86 pci_config_set_interrupt_pin(d->config, 0x01); /* interrupt pin 1 */
87
88 pci_set_byte(d->config + ICH9_SMB_HOSTC, 0);
89 /* TODO bar0, bar1: 64bit BAR support*/
90
91 pm_smbus_init(&d->qdev, &s->smb, false);
92 pci_register_bar(d, ICH9_SMB_SMB_BASE_BAR, PCI_BASE_ADDRESS_SPACE_IO,
93 &s->smb.io);
94}
95
96static void ich9_smb_class_init(ObjectClass *klass, void *data)
97{
98 DeviceClass *dc = DEVICE_CLASS(klass);
99 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
100
101 k->vendor_id = PCI_VENDOR_ID_INTEL;
102 k->device_id = PCI_DEVICE_ID_INTEL_ICH9_6;
103 k->revision = ICH9_A2_SMB_REVISION;
104 k->class_id = PCI_CLASS_SERIAL_SMBUS;
105 dc->vmsd = &vmstate_ich9_smbus;
106 dc->desc = "ICH9 SMBUS Bridge";
107 k->realize = ich9_smbus_realize;
108 k->config_write = ich9_smbus_write_config;
109 /*
110 * Reason: part of ICH9 southbridge, needs to be wired up by
111 * pc_q35_init()
112 */
113 dc->user_creatable = false;
114}
115
116static void ich9_smb_set_irq(PMSMBus *pmsmb, bool enabled)
117{
118 ICH9SMBState *s = pmsmb->opaque;
119
120 if (enabled == s->irq_enabled) {
121 return;
122 }
123
124 s->irq_enabled = enabled;
125 pci_set_irq(&s->dev, enabled);
126}
127
128I2CBus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base)
129{
130 PCIDevice *d =
131 pci_create_simple_multifunction(bus, devfn, true, TYPE_ICH9_SMB_DEVICE);
132 ICH9SMBState *s = ICH9_SMB_DEVICE(d);
133 s->smb.set_irq = ich9_smb_set_irq;
134 s->smb.opaque = s;
135 return s->smb.smbus;
136}
137
138static const TypeInfo ich9_smb_info = {
139 .name = TYPE_ICH9_SMB_DEVICE,
140 .parent = TYPE_PCI_DEVICE,
141 .instance_size = sizeof(ICH9SMBState),
142 .class_init = ich9_smb_class_init,
143 .interfaces = (InterfaceInfo[]) {
144 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
145 { },
146 },
147};
148
149static void ich9_smb_register(void)
150{
151 type_register_static(&ich9_smb_info);
152}
153
154type_init(ich9_smb_register);
155