1 | /* |
2 | * QEMU sPAPR NVRAM emulation |
3 | * |
4 | * Copyright (C) 2012 David Gibson, IBM Corporation. |
5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
7 | * of this software and associated documentation files (the "Software"), to deal |
8 | * in the Software without restriction, including without limitation the rights |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
10 | * copies of the Software, and to permit persons to whom the Software is |
11 | * furnished to do so, subject to the following conditions: |
12 | * |
13 | * The above copyright notice and this permission notice shall be included in |
14 | * all copies or substantial portions of the Software. |
15 | * |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
22 | * THE SOFTWARE. |
23 | */ |
24 | |
25 | #include "qemu/osdep.h" |
26 | #include "qemu/module.h" |
27 | #include "qemu/units.h" |
28 | #include "qapi/error.h" |
29 | #include "cpu.h" |
30 | #include <libfdt.h> |
31 | |
32 | #include "sysemu/block-backend.h" |
33 | #include "sysemu/device_tree.h" |
34 | #include "sysemu/sysemu.h" |
35 | #include "sysemu/runstate.h" |
36 | #include "hw/sysbus.h" |
37 | #include "migration/vmstate.h" |
38 | #include "hw/nvram/chrp_nvram.h" |
39 | #include "hw/ppc/spapr.h" |
40 | #include "hw/ppc/spapr_vio.h" |
41 | #include "hw/qdev-properties.h" |
42 | |
43 | typedef struct SpaprNvram { |
44 | SpaprVioDevice sdev; |
45 | uint32_t size; |
46 | uint8_t *buf; |
47 | BlockBackend *blk; |
48 | VMChangeStateEntry *vmstate; |
49 | } SpaprNvram; |
50 | |
51 | #define TYPE_VIO_SPAPR_NVRAM "spapr-nvram" |
52 | #define VIO_SPAPR_NVRAM(obj) \ |
53 | OBJECT_CHECK(SpaprNvram, (obj), TYPE_VIO_SPAPR_NVRAM) |
54 | |
55 | #define MIN_NVRAM_SIZE (8 * KiB) |
56 | #define DEFAULT_NVRAM_SIZE (64 * KiB) |
57 | #define MAX_NVRAM_SIZE (1 * MiB) |
58 | |
59 | static void rtas_nvram_fetch(PowerPCCPU *cpu, SpaprMachineState *spapr, |
60 | uint32_t token, uint32_t nargs, |
61 | target_ulong args, |
62 | uint32_t nret, target_ulong rets) |
63 | { |
64 | SpaprNvram *nvram = spapr->nvram; |
65 | hwaddr offset, buffer, len; |
66 | void *membuf; |
67 | |
68 | if ((nargs != 3) || (nret != 2)) { |
69 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
70 | return; |
71 | } |
72 | |
73 | if (!nvram) { |
74 | rtas_st(rets, 0, RTAS_OUT_HW_ERROR); |
75 | rtas_st(rets, 1, 0); |
76 | return; |
77 | } |
78 | |
79 | offset = rtas_ld(args, 0); |
80 | buffer = rtas_ld(args, 1); |
81 | len = rtas_ld(args, 2); |
82 | |
83 | if (((offset + len) < offset) |
84 | || ((offset + len) > nvram->size)) { |
85 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
86 | rtas_st(rets, 1, 0); |
87 | return; |
88 | } |
89 | |
90 | assert(nvram->buf); |
91 | |
92 | membuf = cpu_physical_memory_map(buffer, &len, 1); |
93 | memcpy(membuf, nvram->buf + offset, len); |
94 | cpu_physical_memory_unmap(membuf, len, 1, len); |
95 | |
96 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
97 | rtas_st(rets, 1, len); |
98 | } |
99 | |
100 | static void rtas_nvram_store(PowerPCCPU *cpu, SpaprMachineState *spapr, |
101 | uint32_t token, uint32_t nargs, |
102 | target_ulong args, |
103 | uint32_t nret, target_ulong rets) |
104 | { |
105 | SpaprNvram *nvram = spapr->nvram; |
106 | hwaddr offset, buffer, len; |
107 | int alen; |
108 | void *membuf; |
109 | |
110 | if ((nargs != 3) || (nret != 2)) { |
111 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
112 | return; |
113 | } |
114 | |
115 | if (!nvram) { |
116 | rtas_st(rets, 0, RTAS_OUT_HW_ERROR); |
117 | return; |
118 | } |
119 | |
120 | offset = rtas_ld(args, 0); |
121 | buffer = rtas_ld(args, 1); |
122 | len = rtas_ld(args, 2); |
123 | |
124 | if (((offset + len) < offset) |
125 | || ((offset + len) > nvram->size)) { |
126 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
127 | return; |
128 | } |
129 | |
130 | membuf = cpu_physical_memory_map(buffer, &len, 0); |
131 | |
132 | alen = len; |
133 | if (nvram->blk) { |
134 | alen = blk_pwrite(nvram->blk, offset, membuf, len, 0); |
135 | } |
136 | |
137 | assert(nvram->buf); |
138 | memcpy(nvram->buf + offset, membuf, len); |
139 | |
140 | cpu_physical_memory_unmap(membuf, len, 0, len); |
141 | |
142 | rtas_st(rets, 0, (alen < len) ? RTAS_OUT_HW_ERROR : RTAS_OUT_SUCCESS); |
143 | rtas_st(rets, 1, (alen < 0) ? 0 : alen); |
144 | } |
145 | |
146 | static void spapr_nvram_realize(SpaprVioDevice *dev, Error **errp) |
147 | { |
148 | SpaprNvram *nvram = VIO_SPAPR_NVRAM(dev); |
149 | int ret; |
150 | |
151 | if (nvram->blk) { |
152 | int64_t len = blk_getlength(nvram->blk); |
153 | |
154 | if (len < 0) { |
155 | error_setg_errno(errp, -len, |
156 | "could not get length of backing image" ); |
157 | return; |
158 | } |
159 | |
160 | nvram->size = len; |
161 | |
162 | ret = blk_set_perm(nvram->blk, |
163 | BLK_PERM_CONSISTENT_READ | BLK_PERM_WRITE, |
164 | BLK_PERM_ALL, errp); |
165 | if (ret < 0) { |
166 | return; |
167 | } |
168 | } else { |
169 | nvram->size = DEFAULT_NVRAM_SIZE; |
170 | } |
171 | |
172 | nvram->buf = g_malloc0(nvram->size); |
173 | |
174 | if ((nvram->size < MIN_NVRAM_SIZE) || (nvram->size > MAX_NVRAM_SIZE)) { |
175 | error_setg(errp, |
176 | "spapr-nvram must be between %" PRId64 |
177 | " and %" PRId64 " bytes in size" , |
178 | MIN_NVRAM_SIZE, MAX_NVRAM_SIZE); |
179 | return; |
180 | } |
181 | |
182 | if (nvram->blk) { |
183 | int alen = blk_pread(nvram->blk, 0, nvram->buf, nvram->size); |
184 | |
185 | if (alen != nvram->size) { |
186 | error_setg(errp, "can't read spapr-nvram contents" ); |
187 | return; |
188 | } |
189 | } else if (nb_prom_envs > 0) { |
190 | /* Create a system partition to pass the -prom-env variables */ |
191 | chrp_nvram_create_system_partition(nvram->buf, MIN_NVRAM_SIZE / 4); |
192 | chrp_nvram_create_free_partition(&nvram->buf[MIN_NVRAM_SIZE / 4], |
193 | nvram->size - MIN_NVRAM_SIZE / 4); |
194 | } |
195 | |
196 | spapr_rtas_register(RTAS_NVRAM_FETCH, "nvram-fetch" , rtas_nvram_fetch); |
197 | spapr_rtas_register(RTAS_NVRAM_STORE, "nvram-store" , rtas_nvram_store); |
198 | } |
199 | |
200 | static int spapr_nvram_devnode(SpaprVioDevice *dev, void *fdt, int node_off) |
201 | { |
202 | SpaprNvram *nvram = VIO_SPAPR_NVRAM(dev); |
203 | |
204 | return fdt_setprop_cell(fdt, node_off, "#bytes" , nvram->size); |
205 | } |
206 | |
207 | static int spapr_nvram_pre_load(void *opaque) |
208 | { |
209 | SpaprNvram *nvram = VIO_SPAPR_NVRAM(opaque); |
210 | |
211 | g_free(nvram->buf); |
212 | nvram->buf = NULL; |
213 | nvram->size = 0; |
214 | |
215 | return 0; |
216 | } |
217 | |
218 | static void postload_update_cb(void *opaque, int running, RunState state) |
219 | { |
220 | SpaprNvram *nvram = opaque; |
221 | |
222 | /* This is called after bdrv_invalidate_cache_all. */ |
223 | |
224 | qemu_del_vm_change_state_handler(nvram->vmstate); |
225 | nvram->vmstate = NULL; |
226 | |
227 | blk_pwrite(nvram->blk, 0, nvram->buf, nvram->size, 0); |
228 | } |
229 | |
230 | static int spapr_nvram_post_load(void *opaque, int version_id) |
231 | { |
232 | SpaprNvram *nvram = VIO_SPAPR_NVRAM(opaque); |
233 | |
234 | if (nvram->blk) { |
235 | nvram->vmstate = qemu_add_vm_change_state_handler(postload_update_cb, |
236 | nvram); |
237 | } |
238 | |
239 | return 0; |
240 | } |
241 | |
242 | static const VMStateDescription vmstate_spapr_nvram = { |
243 | .name = "spapr_nvram" , |
244 | .version_id = 1, |
245 | .minimum_version_id = 1, |
246 | .pre_load = spapr_nvram_pre_load, |
247 | .post_load = spapr_nvram_post_load, |
248 | .fields = (VMStateField[]) { |
249 | VMSTATE_UINT32(size, SpaprNvram), |
250 | VMSTATE_VBUFFER_ALLOC_UINT32(buf, SpaprNvram, 1, NULL, size), |
251 | VMSTATE_END_OF_LIST() |
252 | }, |
253 | }; |
254 | |
255 | static Property spapr_nvram_properties[] = { |
256 | DEFINE_SPAPR_PROPERTIES(SpaprNvram, sdev), |
257 | DEFINE_PROP_DRIVE("drive" , SpaprNvram, blk), |
258 | DEFINE_PROP_END_OF_LIST(), |
259 | }; |
260 | |
261 | static void spapr_nvram_class_init(ObjectClass *klass, void *data) |
262 | { |
263 | DeviceClass *dc = DEVICE_CLASS(klass); |
264 | SpaprVioDeviceClass *k = VIO_SPAPR_DEVICE_CLASS(klass); |
265 | |
266 | k->realize = spapr_nvram_realize; |
267 | k->devnode = spapr_nvram_devnode; |
268 | k->dt_name = "nvram" ; |
269 | k->dt_type = "nvram" ; |
270 | k->dt_compatible = "qemu,spapr-nvram" ; |
271 | set_bit(DEVICE_CATEGORY_MISC, dc->categories); |
272 | dc->props = spapr_nvram_properties; |
273 | dc->vmsd = &vmstate_spapr_nvram; |
274 | /* Reason: Internal device only, uses spapr_rtas_register() in realize() */ |
275 | dc->user_creatable = false; |
276 | } |
277 | |
278 | static const TypeInfo spapr_nvram_type_info = { |
279 | .name = TYPE_VIO_SPAPR_NVRAM, |
280 | .parent = TYPE_VIO_SPAPR_DEVICE, |
281 | .instance_size = sizeof(SpaprNvram), |
282 | .class_init = spapr_nvram_class_init, |
283 | }; |
284 | |
285 | static void spapr_nvram_register_types(void) |
286 | { |
287 | type_register_static(&spapr_nvram_type_info); |
288 | } |
289 | |
290 | type_init(spapr_nvram_register_types) |
291 | |