1 | /* |
2 | * QEMU Grackle PCI host (heathrow OldWorld PowerMac) |
3 | * |
4 | * Copyright (c) 2006-2007 Fabrice Bellard |
5 | * Copyright (c) 2007 Jocelyn Mayer |
6 | * |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
8 | * of this software and associated documentation files (the "Software"), to deal |
9 | * in the Software without restriction, including without limitation the rights |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
11 | * copies of the Software, and to permit persons to whom the Software is |
12 | * furnished to do so, subject to the following conditions: |
13 | * |
14 | * The above copyright notice and this permission notice shall be included in |
15 | * all copies or substantial portions of the Software. |
16 | * |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
23 | * THE SOFTWARE. |
24 | */ |
25 | |
26 | #include "qemu/osdep.h" |
27 | #include "hw/pci/pci_host.h" |
28 | #include "hw/ppc/mac.h" |
29 | #include "hw/qdev-properties.h" |
30 | #include "hw/pci/pci.h" |
31 | #include "hw/intc/heathrow_pic.h" |
32 | #include "hw/irq.h" |
33 | #include "qapi/error.h" |
34 | #include "qemu/module.h" |
35 | #include "trace.h" |
36 | |
37 | #define GRACKLE_PCI_HOST_BRIDGE(obj) \ |
38 | OBJECT_CHECK(GrackleState, (obj), TYPE_GRACKLE_PCI_HOST_BRIDGE) |
39 | |
40 | typedef struct GrackleState { |
41 | PCIHostState parent_obj; |
42 | |
43 | uint32_t ofw_addr; |
44 | HeathrowState *pic; |
45 | qemu_irq irqs[4]; |
46 | MemoryRegion pci_mmio; |
47 | MemoryRegion pci_hole; |
48 | MemoryRegion pci_io; |
49 | } GrackleState; |
50 | |
51 | /* Don't know if this matches real hardware, but it agrees with OHW. */ |
52 | static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num) |
53 | { |
54 | return (irq_num + (pci_dev->devfn >> 3)) & 3; |
55 | } |
56 | |
57 | static void pci_grackle_set_irq(void *opaque, int irq_num, int level) |
58 | { |
59 | GrackleState *s = opaque; |
60 | |
61 | trace_grackle_set_irq(irq_num, level); |
62 | qemu_set_irq(s->irqs[irq_num], level); |
63 | } |
64 | |
65 | static void grackle_init_irqs(GrackleState *s) |
66 | { |
67 | int i; |
68 | |
69 | for (i = 0; i < ARRAY_SIZE(s->irqs); i++) { |
70 | s->irqs[i] = qdev_get_gpio_in(DEVICE(s->pic), 0x15 + i); |
71 | } |
72 | } |
73 | |
74 | static void grackle_realize(DeviceState *dev, Error **errp) |
75 | { |
76 | GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(dev); |
77 | PCIHostState *phb = PCI_HOST_BRIDGE(dev); |
78 | |
79 | phb->bus = pci_register_root_bus(dev, NULL, |
80 | pci_grackle_set_irq, |
81 | pci_grackle_map_irq, |
82 | s, |
83 | &s->pci_mmio, |
84 | &s->pci_io, |
85 | 0, 4, TYPE_PCI_BUS); |
86 | |
87 | pci_create_simple(phb->bus, 0, "grackle" ); |
88 | grackle_init_irqs(s); |
89 | } |
90 | |
91 | static void grackle_init(Object *obj) |
92 | { |
93 | GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(obj); |
94 | SysBusDevice *sbd = SYS_BUS_DEVICE(obj); |
95 | PCIHostState *phb = PCI_HOST_BRIDGE(obj); |
96 | |
97 | memory_region_init(&s->pci_mmio, OBJECT(s), "pci-mmio" , 0x100000000ULL); |
98 | memory_region_init_io(&s->pci_io, OBJECT(s), &unassigned_io_ops, obj, |
99 | "pci-isa-mmio" , 0x00200000); |
100 | |
101 | memory_region_init_alias(&s->pci_hole, OBJECT(s), "pci-hole" , &s->pci_mmio, |
102 | 0x80000000ULL, 0x7e000000ULL); |
103 | |
104 | memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops, |
105 | DEVICE(obj), "pci-conf-idx" , 0x1000); |
106 | memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, |
107 | DEVICE(obj), "pci-data-idx" , 0x1000); |
108 | |
109 | object_property_add_link(obj, "pic" , TYPE_HEATHROW, |
110 | (Object **) &s->pic, |
111 | qdev_prop_allow_set_link_before_realize, |
112 | 0, NULL); |
113 | |
114 | sysbus_init_mmio(sbd, &phb->conf_mem); |
115 | sysbus_init_mmio(sbd, &phb->data_mem); |
116 | sysbus_init_mmio(sbd, &s->pci_hole); |
117 | sysbus_init_mmio(sbd, &s->pci_io); |
118 | } |
119 | |
120 | static void grackle_pci_realize(PCIDevice *d, Error **errp) |
121 | { |
122 | d->config[0x09] = 0x01; |
123 | } |
124 | |
125 | static void grackle_pci_class_init(ObjectClass *klass, void *data) |
126 | { |
127 | DeviceClass *dc = DEVICE_CLASS(klass); |
128 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
129 | |
130 | k->realize = grackle_pci_realize; |
131 | k->vendor_id = PCI_VENDOR_ID_MOTOROLA; |
132 | k->device_id = PCI_DEVICE_ID_MOTOROLA_MPC106; |
133 | k->revision = 0x00; |
134 | k->class_id = PCI_CLASS_BRIDGE_HOST; |
135 | /* |
136 | * PCI-facing part of the host bridge, not usable without the |
137 | * host-facing part, which can't be device_add'ed, yet. |
138 | */ |
139 | dc->user_creatable = false; |
140 | } |
141 | |
142 | static const TypeInfo grackle_pci_info = { |
143 | .name = "grackle" , |
144 | .parent = TYPE_PCI_DEVICE, |
145 | .instance_size = sizeof(PCIDevice), |
146 | .class_init = grackle_pci_class_init, |
147 | .interfaces = (InterfaceInfo[]) { |
148 | { INTERFACE_CONVENTIONAL_PCI_DEVICE }, |
149 | { }, |
150 | }, |
151 | }; |
152 | |
153 | static char *grackle_ofw_unit_address(const SysBusDevice *dev) |
154 | { |
155 | GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(dev); |
156 | |
157 | return g_strdup_printf("%x" , s->ofw_addr); |
158 | } |
159 | |
160 | static Property grackle_properties[] = { |
161 | DEFINE_PROP_UINT32("ofw-addr" , GrackleState, ofw_addr, -1), |
162 | DEFINE_PROP_END_OF_LIST() |
163 | }; |
164 | |
165 | static void grackle_class_init(ObjectClass *klass, void *data) |
166 | { |
167 | DeviceClass *dc = DEVICE_CLASS(klass); |
168 | SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass); |
169 | |
170 | dc->realize = grackle_realize; |
171 | dc->props = grackle_properties; |
172 | set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); |
173 | dc->fw_name = "pci" ; |
174 | sbc->explicit_ofw_unit_address = grackle_ofw_unit_address; |
175 | } |
176 | |
177 | static const TypeInfo grackle_host_info = { |
178 | .name = TYPE_GRACKLE_PCI_HOST_BRIDGE, |
179 | .parent = TYPE_PCI_HOST_BRIDGE, |
180 | .instance_size = sizeof(GrackleState), |
181 | .instance_init = grackle_init, |
182 | .class_init = grackle_class_init, |
183 | }; |
184 | |
185 | static void grackle_register_types(void) |
186 | { |
187 | type_register_static(&grackle_pci_info); |
188 | type_register_static(&grackle_host_info); |
189 | } |
190 | |
191 | type_init(grackle_register_types) |
192 | |