1 | /* |
2 | * QEMU M48T59 and M48T08 NVRAM emulation (common header) |
3 | * |
4 | * Copyright (c) 2003-2005, 2007 Jocelyn Mayer |
5 | * Copyright (c) 2013 Hervé Poussineau |
6 | * |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
8 | * of this software and associated documentation files (the "Software"), to deal |
9 | * in the Software without restriction, including without limitation the rights |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
11 | * copies of the Software, and to permit persons to whom the Software is |
12 | * furnished to do so, subject to the following conditions: |
13 | * |
14 | * The above copyright notice and this permission notice shall be included in |
15 | * all copies or substantial portions of the Software. |
16 | * |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
23 | * THE SOFTWARE. |
24 | */ |
25 | |
26 | #ifndef HW_M48T59_INTERNAL_H |
27 | #define HW_M48T59_INTERNAL_H |
28 | |
29 | #define M48T59_DEBUG 0 |
30 | |
31 | #define NVRAM_PRINTF(fmt, ...) do { \ |
32 | if (M48T59_DEBUG) { printf(fmt , ## __VA_ARGS__); } } while (0) |
33 | |
34 | /* |
35 | * The M48T02, M48T08 and M48T59 chips are very similar. The newer '59 has |
36 | * alarm and a watchdog timer and related control registers. In the |
37 | * PPC platform there is also a nvram lock function. |
38 | */ |
39 | |
40 | typedef struct M48txxInfo { |
41 | const char *bus_name; |
42 | uint32_t model; /* 2 = m48t02, 8 = m48t08, 59 = m48t59 */ |
43 | uint32_t size; |
44 | } M48txxInfo; |
45 | |
46 | typedef struct M48t59State { |
47 | /* Hardware parameters */ |
48 | qemu_irq IRQ; |
49 | MemoryRegion iomem; |
50 | uint32_t size; |
51 | int32_t base_year; |
52 | /* RTC management */ |
53 | time_t time_offset; |
54 | time_t stop_time; |
55 | /* Alarm & watchdog */ |
56 | struct tm alarm; |
57 | QEMUTimer *alrm_timer; |
58 | QEMUTimer *wd_timer; |
59 | /* NVRAM storage */ |
60 | uint8_t *buffer; |
61 | /* Model parameters */ |
62 | uint32_t model; /* 2 = m48t02, 8 = m48t08, 59 = m48t59 */ |
63 | /* NVRAM storage */ |
64 | uint16_t addr; |
65 | uint8_t lock; |
66 | } M48t59State; |
67 | |
68 | uint32_t m48t59_read(M48t59State *NVRAM, uint32_t addr); |
69 | void m48t59_write(M48t59State *NVRAM, uint32_t addr, uint32_t val); |
70 | void m48t59_reset_common(M48t59State *NVRAM); |
71 | void m48t59_realize_common(M48t59State *s, Error **errp); |
72 | |
73 | static inline void m48t59_toggle_lock(M48t59State *NVRAM, int lock) |
74 | { |
75 | NVRAM->lock ^= 1 << lock; |
76 | } |
77 | |
78 | extern const MemoryRegionOps m48t59_io_ops; |
79 | |
80 | #endif /* HW_M48T59_INTERNAL_H */ |
81 | |